arch/arc/boot/dts/eznps.dts

   1 /*
   2  * Copyright(c) 2015 EZchip Technologies.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  */
  16
  17 /dts-v1/;
  18
  19 / {
  20         compatible = "ezchip,arc-nps";
  21         clock-frequency = <83333333>;   /* 83.333333 MHZ */
  22         #address-cells = <1>;
  23         #size-cells = <1>;
  24         interrupt-parent = <&intc>;
  25         present-cpus = "0-1,16-17";
  26         possible-cpus = "0-4095";
  27
  28         aliases {
  29                 ethernet0 = &gmac0;
  30         };
  31
  32         chosen {
  33                 bootargs = "earlycon=uart8250,mmio32be,0xf7209000,115200n8 console=ttyS0,115200n8";
  34         };
  35
  36         memory {
  37                 device_type = "memory";
  38                 reg = <0x80000000 0x20000000>;  /* 512M */
  39         };
  40
  41         clocks {
  42                 sysclk: sysclk {
  43                         compatible = "fixed-clock";
  44                         #clock-cells = <0>;
  45                         clock-frequency = <83333333>;
  46                 };
  47         };
  48
  49         soc {
  50                 compatible = "simple-bus";
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53
  54                 /* child and parent address space 1:1 mapped */
  55                 ranges;
  56
  57                 intc: interrupt-controller {
  58                         compatible = "ezchip,nps400-ic";
  59                         interrupt-controller;
  60                         #interrupt-cells = <1>;
  61                 };
  62
  63                 timer0: timer_clkevt {
  64                         compatible = "snps,arc-timer";
  65                         interrupts = <3>;
  66                         clocks = <&sysclk>;
  67                 };
  68
  69                 timer1: timer_clksrc {
  70                         compatible = "ezchip,nps400-timer";
  71                         clocks = <&sysclk>;
  72                         clock-names="sysclk";
  73                 };
  74
  75                 uart@f7209000 {
  76                         compatible = "snps,dw-apb-uart";
  77                         device_type = "serial";
  78                         reg = <0xf7209000 0x100>;
  79                         interrupts = <6>;
  80                         clocks = <&sysclk>;
  81                         clock-names="baudclk";
  82                         baud = <115200>;
  83                         reg-shift = <2>;
  84                         reg-io-width = <4>;
  85                         native-endian;
  86                 };
  87
  88                 gmac0: ethernet@f7470000 {
  89                         compatible = "ezchip,nps-mgt-enet";
  90                         reg = <0xf7470000 0x1940>;
  91                         interrupts = <7>;
  92                         /* Filled in by U-Boot */
  93                         mac-address = [ 00 C0 00 F0 04 03 ];
  94                 };
  95         };
  96 };