2 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 * Licensed under GPLv2 or later.
11 /include/ "skeleton.dtsi"
14 model = "Atmel AT91SAM9G20 family SoC";
15 compatible = "atmel,at91sam9g20";
16 interrupt-parent = <&aic>;
34 compatible = "arm,arm926ejs";
39 reg = <0x20000000 0x08000000>;
43 compatible = "simple-bus";
49 compatible = "simple-bus";
54 aic: interrupt-controller@fffff000 {
55 #interrupt-cells = <2>;
56 compatible = "atmel,at91rm9200-aic";
59 reg = <0xfffff000 0x200>;
62 ramc0: ramc@ffffea00 {
63 compatible = "atmel,at91sam9260-sdramc";
64 reg = <0xffffea00 0x200>;
68 compatible = "atmel,at91rm9200-pmc";
69 reg = <0xfffffc00 0x100>;
73 compatible = "atmel,at91sam9260-rstc";
74 reg = <0xfffffd00 0x10>;
78 compatible = "atmel,at91sam9260-pit";
79 reg = <0xfffffd30 0xf>;
83 tcb0: timer@fffa0000 {
84 compatible = "atmel,at91rm9200-tcb";
85 reg = <0xfffa0000 0x100>;
86 interrupts = <17 4 18 4 19 4>;
89 tcb1: timer@fffdc000 {
90 compatible = "atmel,at91rm9200-tcb";
91 reg = <0xfffdc000 0x100>;
92 interrupts = <26 4 27 4 28 4>;
96 compatible = "atmel,at91rm9200-gpio";
97 reg = <0xfffff400 0x100>;
101 interrupt-controller;
104 pioB: gpio@fffff600 {
105 compatible = "atmel,at91rm9200-gpio";
106 reg = <0xfffff600 0x100>;
110 interrupt-controller;
113 pioC: gpio@fffff800 {
114 compatible = "atmel,at91rm9200-gpio";
115 reg = <0xfffff800 0x100>;
119 interrupt-controller;
122 dbgu: serial@fffff200 {
123 compatible = "atmel,at91sam9260-usart";
124 reg = <0xfffff200 0x200>;
129 usart0: serial@fffb0000 {
130 compatible = "atmel,at91sam9260-usart";
131 reg = <0xfffb0000 0x200>;
138 usart1: serial@fffb4000 {
139 compatible = "atmel,at91sam9260-usart";
140 reg = <0xfffb4000 0x200>;
147 usart2: serial@fffb8000 {
148 compatible = "atmel,at91sam9260-usart";
149 reg = <0xfffb8000 0x200>;
156 usart3: serial@fffd0000 {
157 compatible = "atmel,at91sam9260-usart";
158 reg = <0xfffd0000 0x200>;
165 usart4: serial@fffd4000 {
166 compatible = "atmel,at91sam9260-usart";
167 reg = <0xfffd4000 0x200>;
174 usart5: serial@fffd8000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffd8000 0x200>;
183 macb0: ethernet@fffc4000 {
184 compatible = "cdns,at32ap7000-macb", "cdns,macb";
185 reg = <0xfffc4000 0x100>;
191 nand0: nand@40000000 {
192 compatible = "atmel,at91rm9200-nand";
193 #address-cells = <1>;
195 reg = <0x40000000 0x10000000
198 atmel,nand-addr-offset = <21>;
199 atmel,nand-cmd-offset = <22>;
209 compatible = "i2c-gpio";
210 gpios = <&pioA 23 0 /* sda */
213 i2c-gpio,sda-open-drain;
214 i2c-gpio,scl-open-drain;
215 i2c-gpio,delay-us = <2>; /* ~100 kHz */
216 #address-cells = <1>;