arch/arm/boot/dts/dm814x.dtsi

   1 /*
   2  * This file is licensed under the terms of the GNU General Public License
   3  * version 2.  This program is licensed "as is" without any warranty of any
   4  * kind, whether express or implied.
   5  */
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/pinctrl/dm814x.h>
   9
  10 #include "skeleton.dtsi"
  11
  12 / {
  13         compatible = "ti,dm814";
  14         interrupt-parent = <&intc>;
  15
  16         aliases {
  17                 i2c0 = &i2c1;
  18                 i2c1 = &i2c2;
  19                 serial0 = &uart1;
  20                 serial1 = &uart2;
  21                 serial2 = &uart3;
  22                 ethernet0 = &cpsw_emac0;
  23                 ethernet1 = &cpsw_emac1;
  24         };
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29                 cpu@0 {
  30                         compatible = "arm,cortex-a8";
  31                         device_type = "cpu";
  32                         reg = <0>;
  33                 };
  34         };
  35
  36         pmu {
  37                 compatible = "arm,cortex-a8-pmu";
  38                 interrupts = <3>;
  39         };
  40
  41         /*
  42          * The soc node represents the soc top level view. It is used for IPs
  43          * that are not memory mapped in the MPU view or for the MPU itself.
  44          */
  45         soc {
  46                 compatible = "ti,omap-infra";
  47                 mpu {
  48                         compatible = "ti,omap3-mpu";
  49                         ti,hwmods = "mpu";
  50                 };
  51         };
  52
  53         ocp {
  54                 compatible = "simple-bus";
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 ranges;
  58                 ti,hwmods = "l3_main";
  59
  60                 /*
  61                  * See TRM "Table 1-317. L4LS Instance Summary" for hints.
  62                  * It shows the module target agent registers though, so the
  63                  * actual device is typically 0x1000 before the target agent
  64                  * except in cases where the module is larger than 0x1000.
  65                  */
  66                 l4ls: l4ls@48000000 {
  67                         compatible = "ti,dm814-l4ls", "simple-bus";
  68                         #address-cells = <1>;
  69                         #size-cells = <1>;
  70                         ranges = <0 0x48000000 0x2000000>;
  71
  72                         i2c1: i2c@28000 {
  73                                 compatible = "ti,omap4-i2c";
  74                                 #address-cells = <1>;
  75                                 #size-cells = <0>;
  76                                 ti,hwmods = "i2c1";
  77                                 reg = <0x28000 0x1000>;
  78                                 interrupts = <70>;
  79                         };
  80
  81                         elm: elm@80000 {
  82                                 compatible = "ti,814-elm";
  83                                 ti,hwmods = "elm";
  84                                 reg = <0x80000 0x2000>;
  85                                 interrupts = <4>;
  86                         };
  87
  88                         gpio1: gpio@32000 {
  89                                 compatible = "ti,omap4-gpio";
  90                                 ti,hwmods = "gpio1";
  91                                 ti,gpio-always-on;
  92                                 reg = <0x32000 0x2000>;
  93                                 interrupts = <96>;
  94                                 gpio-controller;
  95                                 #gpio-cells = <2>;
  96                                 interrupt-controller;
  97                                 #interrupt-cells = <2>;
  98                         };
  99
 100                         gpio2: gpio@4c000 {
 101                                 compatible = "ti,omap4-gpio";
 102                                 ti,hwmods = "gpio2";
 103                                 ti,gpio-always-on;
 104                                 reg = <0x4c000 0x2000>;
 105                                 interrupts = <98>;
 106                                 gpio-controller;
 107                                 #gpio-cells = <2>;
 108                                 interrupt-controller;
 109                                 #interrupt-cells = <2>;
 110                         };
 111
 112                         i2c2: i2c@2a000 {
 113                                 compatible = "ti,omap4-i2c";
 114                                 #address-cells = <1>;
 115                                 #size-cells = <0>;
 116                                 ti,hwmods = "i2c2";
 117                                 reg = <0x2a000 0x1000>;
 118                                 interrupts = <71>;
 119                         };
 120
 121                         mcspi1: spi@30000 {
 122                                 compatible = "ti,omap4-mcspi";
 123                                 reg = <0x30000 0x1000>;
 124                                 #address-cells = <1>;
 125                                 #size-cells = <0>;
 126                                 interrupts = <65>;
 127                                 ti,spi-num-cs = <4>;
 128                                 ti,hwmods = "mcspi1";
 129                                 dmas = <&edma 16 0 &edma 17 0
 130                                         &edma 18 0 &edma 19 0>;
 131                                 dma-names = "tx0", "rx0", "tx1", "rx1";
 132                         };
 133
 134                         timer1: timer@2e000 {
 135                                 compatible = "ti,dm814-timer";
 136                                 reg = <0x2e000 0x2000>;
 137                                 interrupts = <67>;
 138                                 ti,hwmods = "timer1";
 139                                 ti,timer-alwon;
 140                         };
 141
 142                         uart1: uart@20000 {
 143                                 compatible = "ti,omap3-uart";
 144                                 ti,hwmods = "uart1";
 145                                 reg = <0x20000 0x2000>;
 146                                 clock-frequency = <48000000>;
 147                                 interrupts = <72>;
 148                                 dmas = <&edma 26 0 &edma 27 0>;
 149                                 dma-names = "tx", "rx";
 150                         };
 151
 152                         uart2: uart@22000 {
 153                                 compatible = "ti,omap3-uart";
 154                                 ti,hwmods = "uart2";
 155                                 reg = <0x22000 0x2000>;
 156                                 clock-frequency = <48000000>;
 157                                 interrupts = <73>;
 158                                 dmas = <&edma 28 0 &edma 29 0>;
 159                                 dma-names = "tx", "rx";
 160                         };
 161
 162                         uart3: uart@24000 {
 163                                 compatible = "ti,omap3-uart";
 164                                 ti,hwmods = "uart3";
 165                                 reg = <0x24000 0x2000>;
 166                                 clock-frequency = <48000000>;
 167                                 interrupts = <74>;
 168                                 dmas = <&edma 30 0 &edma 31 0>;
 169                                 dma-names = "tx", "rx";
 170                         };
 171
 172                         timer2: timer@40000 {
 173                                 compatible = "ti,dm814-timer";
 174                                 reg = <0x40000 0x2000>;
 175                                 interrupts = <68>;
 176                                 ti,hwmods = "timer2";
 177                         };
 178
 179                         timer3: timer@42000 {
 180                                 compatible = "ti,dm814-timer";
 181                                 reg = <0x42000 0x2000>;
 182                                 interrupts = <69>;
 183                                 ti,hwmods = "timer3";
 184                         };
 185
 186                         mmc1: mmc@60000 {
 187                                 compatible = "ti,omap4-hsmmc";
 188                                 ti,hwmods = "mmc1";
 189                                 dmas = <&edma 24 0
 190                                         &edma 25 0>;
 191                                 dma-names = "tx", "rx";
 192                                 interrupts = <64>;
 193                                 interrupt-parent = <&intc>;
 194                                 reg = <0x60000 0x1000>;
 195                         };
 196
 197                         mmc2: mmc@1d8000 {
 198                                 compatible = "ti,omap4-hsmmc";
 199                                 ti,hwmods = "mmc2";
 200                                 dmas = <&edma 2 0
 201                                         &edma 3 0>;
 202                                 dma-names = "tx", "rx";
 203                                 interrupts = <28>;
 204                                 interrupt-parent = <&intc>;
 205                                 reg = <0x1d8000 0x1000>;
 206                         };
 207
 208                         control: control@140000 {
 209                                 compatible = "ti,dm814-scm", "simple-bus";
 210                                 reg = <0x140000 0x20000>;
 211                                 #address-cells = <1>;
 212                                 #size-cells = <1>;
 213                                 ranges = <0 0x140000 0x20000>;
 214
 215                                 scm_conf: scm_conf@0 {
 216                                         compatible = "syscon";
 217                                         reg = <0x0 0x800>;
 218                                         #address-cells = <1>;
 219                                         #size-cells = <1>;
 220
 221                                         scm_clocks: clocks {
 222                                                 #address-cells = <1>;
 223                                                 #size-cells = <0>;
 224                                         };
 225
 226                                         scm_clockdomains: clockdomains {
 227                                         };
 228                                 };
 229
 230                                 edma_xbar: dma-router@f90 {
 231                                         compatible = "ti,am335x-edma-crossbar";
 232                                         reg = <0xf90 0x40>;
 233                                         #dma-cells = <3>;
 234                                         dma-requests = <32>;
 235                                         dma-masters = <&edma>;
 236                                 };
 237
 238                                 /*
 239                                  * Note that silicon revision 2.1 and older
 240                                  * require input enabled (bit 18 set) for all
 241                                  * 3.3V I/Os to avoid cumulative hardware damage.
 242                                  * For more info, see errata advisory 2.1.87.
 243                                  * We leave bit 18 out of function-mask and rely
 244                                  * on the bootloader for it.
 245                                  */
 246                                 pincntl: pinmux@800 {
 247                                         compatible = "pinctrl-single";
 248                                         reg = <0x800 0x438>;
 249                                         #address-cells = <1>;
 250                                         #size-cells = <0>;
 251                                         pinctrl-single,register-width = <32>;
 252                                         pinctrl-single,function-mask = <0x307ff>;
 253                                 };
 254                         };
 255
 256                         prcm: prcm@180000 {
 257                                 compatible = "ti,dm814-prcm", "simple-bus";
 258                                 reg = <0x180000 0x2000>;
 259                                 #address-cells = <1>;
 260                                 #size-cells = <1>;
 261                                 ranges = <0 0x180000 0x2000>;
 262
 263                                 prcm_clocks: clocks {
 264                                         #address-cells = <1>;
 265                                         #size-cells = <0>;
 266                                 };
 267
 268                                 prcm_clockdomains: clockdomains {
 269                                 };
 270                         };
 271
 272                         /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
 273                         pllss: pllss@1c5000 {
 274                                 compatible = "ti,dm814-pllss", "simple-bus";
 275                                 reg = <0x1c5000 0x1000>;
 276                                 #address-cells = <1>;
 277                                 #size-cells = <1>;
 278                                 ranges = <0 0x1c5000 0x1000>;
 279
 280                                 pllss_clocks: clocks {
 281                                         #address-cells = <1>;
 282                                         #size-cells = <0>;
 283                                 };
 284
 285                                 pllss_clockdomains: clockdomains {
 286                                 };
 287                         };
 288
 289                         wdt1: wdt@1c7000 {
 290                                 compatible = "ti,omap3-wdt";
 291                                 ti,hwmods = "wd_timer";
 292                                 reg = <0x1c7000 0x1000>;
 293                                 interrupts = <91>;
 294                         };
 295                 };
 296
 297                 intc: interrupt-controller@48200000 {
 298                         compatible = "ti,dm814-intc";
 299                         interrupt-controller;
 300                         #interrupt-cells = <1>;
 301                         reg = <0x48200000 0x1000>;
 302                 };
 303
 304                 /* Board must configure evtmux with edma_xbar for EDMA */
 305                 mmc3: mmc@47810000 {
 306                         compatible = "ti,omap4-hsmmc";
 307                         ti,hwmods = "mmc3";
 308                         interrupts = <29>;
 309                         interrupt-parent = <&intc>;
 310                         reg = <0x47810000 0x1000>;
 311                 };
 312
 313                 edma: edma@49000000 {
 314                         compatible = "ti,edma3-tpcc";
 315                         ti,hwmods = "tpcc";
 316                         reg =   <0x49000000 0x10000>;
 317                         reg-names = "edma3_cc";
 318                         interrupts = <12 13 14>;
 319                         interrupt-names = "edma3_ccint", "emda3_mperr",
 320                                           "edma3_ccerrint";
 321                         dma-requests = <64>;
 322                         #dma-cells = <2>;
 323
 324                         ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 325                                    <&edma_tptc2 3>, <&edma_tptc3 0>;
 326
 327                         ti,edma-memcpy-channels = <20 21>;
 328                 };
 329
 330                 edma_tptc0: tptc@49800000 {
 331                         compatible = "ti,edma3-tptc";
 332                         ti,hwmods = "tptc0";
 333                         reg =   <0x49800000 0x100000>;
 334                         interrupts = <112>;
 335                         interrupt-names = "edma3_tcerrint";
 336                 };
 337
 338                 edma_tptc1: tptc@49900000 {
 339                         compatible = "ti,edma3-tptc";
 340                         ti,hwmods = "tptc1";
 341                         reg =   <0x49900000 0x100000>;
 342                         interrupts = <113>;
 343                         interrupt-names = "edma3_tcerrint";
 344                 };
 345
 346                 edma_tptc2: tptc@49a00000 {
 347                         compatible = "ti,edma3-tptc";
 348                         ti,hwmods = "tptc2";
 349                         reg =   <0x49a00000 0x100000>;
 350                         interrupts = <114>;
 351                         interrupt-names = "edma3_tcerrint";
 352                 };
 353
 354                 edma_tptc3: tptc@49b00000 {
 355                         compatible = "ti,edma3-tptc";
 356                         ti,hwmods = "tptc3";
 357                         reg =   <0x49b00000 0x100000>;
 358                         interrupts = <115>;
 359                         interrupt-names = "edma3_tcerrint";
 360                 };
 361
 362                 /* See TRM "Table 1-318. L4HS Instance Summary" */
 363                 l4hs: l4hs@4a000000 {
 364                         compatible = "ti,dm814-l4hs", "simple-bus";
 365                         #address-cells = <1>;
 366                         #size-cells = <1>;
 367                         ranges = <0 0x4a000000 0x1b4040>;
 368                 };
 369
 370                 /* REVISIT: Move to live under l4hs once driver is fixed */
 371                 mac: ethernet@4a100000 {
 372                         compatible = "ti,cpsw";
 373                         ti,hwmods = "cpgmac0";
 374                         clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
 375                         clock-names = "fck", "cpts";
 376                         cpdma_channels = <8>;
 377                         ale_entries = <1024>;
 378                         bd_ram_size = <0x2000>;
 379                         no_bd_ram = <0>;
 380                         rx_descs = <64>;
 381                         mac_control = <0x20>;
 382                         slaves = <2>;
 383                         active_slave = <0>;
 384                         cpts_clock_mult = <0x80000000>;
 385                         cpts_clock_shift = <29>;
 386                         reg = <0x4a100000 0x800
 387                                0x4a100900 0x100>;
 388                         #address-cells = <1>;
 389                         #size-cells = <1>;
 390                         interrupt-parent = <&intc>;
 391                         /*
 392                          * c0_rx_thresh_pend
 393                          * c0_rx_pend
 394                          * c0_tx_pend
 395                          * c0_misc_pend
 396                          */
 397                         interrupts = <40 41 42 43>;
 398                         ranges;
 399                         syscon = <&scm_conf>;
 400
 401                         davinci_mdio: mdio@4a100800 {
 402                                 compatible = "ti,davinci_mdio";
 403                                 #address-cells = <1>;
 404                                 #size-cells = <0>;
 405                                 ti,hwmods = "davinci_mdio";
 406                                 bus_freq = <1000000>;
 407                                 reg = <0x4a100800 0x100>;
 408                         };
 409
 410                         cpsw_emac0: slave@4a100200 {
 411                                 /* Filled in by U-Boot */
 412                                 mac-address = [ 00 00 00 00 00 00 ];
 413                         };
 414
 415                         cpsw_emac1: slave@4a100300 {
 416                                 /* Filled in by U-Boot */
 417                                 mac-address = [ 00 00 00 00 00 00 ];
 418                         };
 419
 420                         phy_sel: cpsw-phy-sel@48140650 {
 421                                 compatible = "ti,am3352-cpsw-phy-sel";
 422                                 reg= <0x48140650 0x4>;
 423                                 reg-names = "gmii-sel";
 424                         };
 425                 };
 426         };
 427 };
 428
 429 #include "dm814x-clocks.dtsi"