arch/arm/boot/dts/dm814x.dtsi

   1 /*
   2  * This file is licensed under the terms of the GNU General Public License
   3  * version 2.  This program is licensed "as is" without any warranty of any
   4  * kind, whether express or implied.
   5  */
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/pinctrl/omap.h>
   9
  10 #include "skeleton.dtsi"
  11
  12 / {
  13         compatible = "ti,dm814";
  14         interrupt-parent = <&intc>;
  15
  16         aliases {
  17                 i2c0 = &i2c1;
  18                 i2c1 = &i2c2;
  19                 serial0 = &uart1;
  20                 serial1 = &uart2;
  21                 serial2 = &uart3;
  22                 ethernet0 = &cpsw_emac0;
  23                 ethernet1 = &cpsw_emac1;
  24         };
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29                 cpu@0 {
  30                         compatible = "arm,cortex-a8";
  31                         device_type = "cpu";
  32                         reg = <0>;
  33                 };
  34         };
  35
  36         pmu {
  37                 compatible = "arm,cortex-a8-pmu";
  38                 interrupts = <3>;
  39         };
  40
  41         /*
  42          * The soc node represents the soc top level view. It is used for IPs
  43          * that are not memory mapped in the MPU view or for the MPU itself.
  44          */
  45         soc {
  46                 compatible = "ti,omap-infra";
  47                 mpu {
  48                         compatible = "ti,omap3-mpu";
  49                         ti,hwmods = "mpu";
  50                 };
  51         };
  52
  53         ocp {
  54                 compatible = "simple-bus";
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 ranges;
  58                 ti,hwmods = "l3_main";
  59
  60                 /*
  61                  * See TRM "Table 1-317. L4LS Instance Summary" for hints.
  62                  * It shows the module target agent registers though, so the
  63                  * actual device is typically 0x1000 before the target agent
  64                  * except in cases where the module is larger than 0x1000.
  65                  */
  66                 l4ls: l4ls@48000000 {
  67                         compatible = "ti,dm814-l4ls", "simple-bus";
  68                         #address-cells = <1>;
  69                         #size-cells = <1>;
  70                         ranges = <0 0x48000000 0x2000000>;
  71
  72                         i2c1: i2c@28000 {
  73                                 compatible = "ti,omap4-i2c";
  74                                 #address-cells = <1>;
  75                                 #size-cells = <0>;
  76                                 ti,hwmods = "i2c1";
  77                                 reg = <0x28000 0x1000>;
  78                                 interrupts = <70>;
  79                         };
  80
  81                         elm: elm@80000 {
  82                                 compatible = "ti,814-elm";
  83                                 ti,hwmods = "elm";
  84                                 reg = <0x80000 0x2000>;
  85                                 interrupts = <4>;
  86                         };
  87
  88                         gpio1: gpio@32000 {
  89                                 compatible = "ti,omap4-gpio";
  90                                 ti,hwmods = "gpio1";
  91                                 ti,gpio-always-on;
  92                                 reg = <0x32000 0x2000>;
  93                                 interrupts = <96>;
  94                                 gpio-controller;
  95                                 #gpio-cells = <2>;
  96                                 interrupt-controller;
  97                                 #interrupt-cells = <2>;
  98                         };
  99
 100                         gpio2: gpio@4c000 {
 101                                 compatible = "ti,omap4-gpio";
 102                                 ti,hwmods = "gpio2";
 103                                 ti,gpio-always-on;
 104                                 reg = <0x4c000 0x2000>;
 105                                 interrupts = <98>;
 106                                 gpio-controller;
 107                                 #gpio-cells = <2>;
 108                                 interrupt-controller;
 109                                 #interrupt-cells = <2>;
 110                         };
 111
 112                         i2c2: i2c@2a000 {
 113                                 compatible = "ti,omap4-i2c";
 114                                 #address-cells = <1>;
 115                                 #size-cells = <0>;
 116                                 ti,hwmods = "i2c2";
 117                                 reg = <0x2a000 0x1000>;
 118                                 interrupts = <71>;
 119                         };
 120
 121                         mcspi1: spi@30000 {
 122                                 compatible = "ti,omap4-mcspi";
 123                                 reg = <0x30000 0x1000>;
 124                                 #address-cells = <1>;
 125                                 #size-cells = <0>;
 126                                 interrupts = <65>;
 127                                 ti,spi-num-cs = <4>;
 128                                 ti,hwmods = "mcspi1";
 129                                 dmas = <&edma 16 &edma 17
 130                                         &edma 18 &edma 19>;
 131                                 dma-names = "tx0", "rx0", "tx1", "rx1";
 132                         };
 133
 134                         timer1: timer@2e000 {
 135                                 compatible = "ti,dm814-timer";
 136                                 reg = <0x2e000 0x2000>;
 137                                 interrupts = <67>;
 138                                 ti,hwmods = "timer1";
 139                                 ti,timer-alwon;
 140                         };
 141
 142                         uart1: uart@20000 {
 143                                 compatible = "ti,omap3-uart";
 144                                 ti,hwmods = "uart1";
 145                                 reg = <0x20000 0x2000>;
 146                                 clock-frequency = <48000000>;
 147                                 interrupts = <72>;
 148                                 dmas = <&edma 26 &edma 27>;
 149                                 dma-names = "tx", "rx";
 150                         };
 151
 152                         uart2: uart@22000 {
 153                                 compatible = "ti,omap3-uart";
 154                                 ti,hwmods = "uart2";
 155                                 reg = <0x22000 0x2000>;
 156                                 clock-frequency = <48000000>;
 157                                 interrupts = <73>;
 158                                 dmas = <&edma 28 &edma 29>;
 159                                 dma-names = "tx", "rx";
 160                         };
 161
 162                         uart3: uart@24000 {
 163                                 compatible = "ti,omap3-uart";
 164                                 ti,hwmods = "uart3";
 165                                 reg = <0x24000 0x2000>;
 166                                 clock-frequency = <48000000>;
 167                                 interrupts = <74>;
 168                                 dmas = <&edma 30 &edma 31>;
 169                                 dma-names = "tx", "rx";
 170                         };
 171
 172                         timer2: timer@40000 {
 173                                 compatible = "ti,dm814-timer";
 174                                 reg = <0x40000 0x2000>;
 175                                 interrupts = <68>;
 176                                 ti,hwmods = "timer2";
 177                         };
 178
 179                         timer3: timer@42000 {
 180                                 compatible = "ti,dm814-timer";
 181                                 reg = <0x42000 0x2000>;
 182                                 interrupts = <69>;
 183                                 ti,hwmods = "timer3";
 184                         };
 185
 186                         control: control@140000 {
 187                                 compatible = "ti,dm814-scm", "simple-bus";
 188                                 reg = <0x140000 0x20000>;
 189                                 #address-cells = <1>;
 190                                 #size-cells = <1>;
 191                                 ranges = <0 0x140000 0x20000>;
 192
 193                                 scm_conf: scm_conf@0 {
 194                                         compatible = "syscon";
 195                                         reg = <0x0 0x800>;
 196                                         #address-cells = <1>;
 197                                         #size-cells = <1>;
 198
 199                                         scm_clocks: clocks {
 200                                                 #address-cells = <1>;
 201                                                 #size-cells = <0>;
 202                                         };
 203
 204                                         scm_clockdomains: clockdomains {
 205                                         };
 206                                 };
 207
 208                                 /*
 209                                  * Note that silicon revision 2.1 and older
 210                                  * require input enabled (bit 18 set) for all
 211                                  * 3.3V I/Os to avoid cumulative hardware damage.
 212                                  * For more info, see errata advisory 2.1.87.
 213                                  * We leave bit 18 out of function-mask and rely
 214                                  * on the bootloader for it.
 215                                  */
 216                                 pincntl: pinmux@800 {
 217                                         compatible = "pinctrl-single";
 218                                         reg = <0x800 0x438>;
 219                                         #address-cells = <1>;
 220                                         #size-cells = <0>;
 221                                         pinctrl-single,register-width = <32>;
 222                                         pinctrl-single,function-mask = <0x307ff>;
 223                                 };
 224                         };
 225
 226                         prcm: prcm@180000 {
 227                                 compatible = "ti,dm814-prcm", "simple-bus";
 228                                 reg = <0x180000 0x2000>;
 229                                 #address-cells = <1>;
 230                                 #size-cells = <1>;
 231                                 ranges = <0 0x180000 0x2000>;
 232
 233                                 prcm_clocks: clocks {
 234                                         #address-cells = <1>;
 235                                         #size-cells = <0>;
 236                                 };
 237
 238                                 prcm_clockdomains: clockdomains {
 239                                 };
 240                         };
 241
 242                         /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
 243                         pllss: pllss@1c5000 {
 244                                 compatible = "ti,dm814-pllss", "simple-bus";
 245                                 reg = <0x1c5000 0x1000>;
 246                                 #address-cells = <1>;
 247                                 #size-cells = <1>;
 248                                 ranges = <0 0x1c5000 0x1000>;
 249
 250                                 pllss_clocks: clocks {
 251                                         #address-cells = <1>;
 252                                         #size-cells = <0>;
 253                                 };
 254
 255                                 pllss_clockdomains: clockdomains {
 256                                 };
 257                         };
 258
 259                         wdt1: wdt@1c7000 {
 260                                 compatible = "ti,omap3-wdt";
 261                                 ti,hwmods = "wd_timer";
 262                                 reg = <0x1c7000 0x1000>;
 263                                 interrupts = <91>;
 264                         };
 265                 };
 266
 267                 intc: interrupt-controller@48200000 {
 268                         compatible = "ti,dm814-intc";
 269                         interrupt-controller;
 270                         #interrupt-cells = <1>;
 271                         reg = <0x48200000 0x1000>;
 272                 };
 273
 274                 edma: edma@49000000 {
 275                         compatible = "ti,edma3";
 276                         ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
 277                         reg =   <0x49000000 0x10000>,
 278                                 <0x44e10f90 0x40>;
 279                         interrupts = <12 13 14>;
 280                         #dma-cells = <1>;
 281                 };
 282
 283                 /* See TRM "Table 1-318. L4HS Instance Summary" */
 284                 l4hs: l4hs@4a000000 {
 285                         compatible = "ti,dm814-l4hs", "simple-bus";
 286                         #address-cells = <1>;
 287                         #size-cells = <1>;
 288                         ranges = <0 0x4a000000 0x1b4040>;
 289                 };
 290
 291                 /* REVISIT: Move to live under l4hs once driver is fixed */
 292                 mac: ethernet@4a100000 {
 293                         compatible = "ti,cpsw";
 294                         ti,hwmods = "cpgmac0";
 295                         clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
 296                         clock-names = "fck", "cpts";
 297                         cpdma_channels = <8>;
 298                         ale_entries = <1024>;
 299                         bd_ram_size = <0x2000>;
 300                         no_bd_ram = <0>;
 301                         rx_descs = <64>;
 302                         mac_control = <0x20>;
 303                         slaves = <2>;
 304                         active_slave = <0>;
 305                         cpts_clock_mult = <0x80000000>;
 306                         cpts_clock_shift = <29>;
 307                         reg = <0x4a100000 0x800
 308                                0x4a100900 0x100>;
 309                         #address-cells = <1>;
 310                         #size-cells = <1>;
 311                         interrupt-parent = <&intc>;
 312                         /*
 313                          * c0_rx_thresh_pend
 314                          * c0_rx_pend
 315                          * c0_tx_pend
 316                          * c0_misc_pend
 317                          */
 318                         interrupts = <40 41 42 43>;
 319                         ranges;
 320                         syscon = <&scm_conf>;
 321
 322                         davinci_mdio: mdio@4a100800 {
 323                                 compatible = "ti,davinci_mdio";
 324                                 #address-cells = <1>;
 325                                 #size-cells = <0>;
 326                                 ti,hwmods = "davinci_mdio";
 327                                 bus_freq = <1000000>;
 328                                 reg = <0x4a100800 0x100>;
 329                         };
 330
 331                         cpsw_emac0: slave@4a100200 {
 332                                 /* Filled in by U-Boot */
 333                                 mac-address = [ 00 00 00 00 00 00 ];
 334                         };
 335
 336                         cpsw_emac1: slave@4a100300 {
 337                                 /* Filled in by U-Boot */
 338                                 mac-address = [ 00 00 00 00 00 00 ];
 339                         };
 340
 341                         phy_sel: cpsw-phy-sel@48140650 {
 342                                 compatible = "ti,am3352-cpsw-phy-sel";
 343                                 reg= <0x48140650 0x4>;
 344                                 reg-names = "gmii-sel";
 345                         };
 346                 };
 347         };
 348 };
 349
 350 #include "dm814x-clocks.dtsi"