arch/arm/boot/dts/dra7-evm.dts

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 /dts-v1/;
   9
  10 #include "dra74x.dtsi"
  11
  12 / {
  13         model = "TI DRA742";
  14         compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
  15
  16         memory {
  17                 device_type = "memory";
  18                 reg = <0x80000000 0x60000000>; /* 1536 MB */
  19         };
  20
  21         mmc2_3v3: fixedregulator-mmc2 {
  22                 compatible = "regulator-fixed";
  23                 regulator-name = "mmc2_3v3";
  24                 regulator-min-microvolt = <3300000>;
  25                 regulator-max-microvolt = <3300000>;
  26         };
  27 };
  28
  29 &dra7_pmx_core {
  30         i2c1_pins: pinmux_i2c1_pins {
  31                 pinctrl-single,pins = <
  32                         0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
  33                         0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
  34                 >;
  35         };
  36
  37         i2c2_pins: pinmux_i2c2_pins {
  38                 pinctrl-single,pins = <
  39                         0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
  40                         0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
  41                 >;
  42         };
  43
  44         i2c3_pins: pinmux_i2c3_pins {
  45                 pinctrl-single,pins = <
  46                         0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
  47                         0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
  48                 >;
  49         };
  50
  51         mcspi1_pins: pinmux_mcspi1_pins {
  52                 pinctrl-single,pins = <
  53                         0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */
  54                         0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */
  55                         0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */
  56                         0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
  57                         0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */
  58                         0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */
  59                         0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */
  60                 >;
  61         };
  62
  63         mcspi2_pins: pinmux_mcspi2_pins {
  64                 pinctrl-single,pins = <
  65                         0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
  66                         0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
  67                         0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
  68                         0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
  69                 >;
  70         };
  71
  72         uart1_pins: pinmux_uart1_pins {
  73                 pinctrl-single,pins = <
  74                         0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
  75                         0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
  76                         0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
  77                         0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
  78                 >;
  79         };
  80
  81         uart2_pins: pinmux_uart2_pins {
  82                 pinctrl-single,pins = <
  83                         0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */
  84                         0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */
  85                         0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
  86                         0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
  87                 >;
  88         };
  89
  90         uart3_pins: pinmux_uart3_pins {
  91                 pinctrl-single,pins = <
  92                         0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
  93                         0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
  94                 >;
  95         };
  96
  97         qspi1_pins: pinmux_qspi1_pins {
  98                 pinctrl-single,pins = <
  99                         0x4c (PIN_INPUT | MUX_MODE1)  /* gpmc_a3.qspi1_cs2 */
 100                         0x50 (PIN_INPUT | MUX_MODE1)  /* gpmc_a4.qspi1_cs3 */
 101                         0x74 (PIN_INPUT | MUX_MODE1)  /* gpmc_a13.qspi1_rtclk */
 102                         0x78 (PIN_INPUT | MUX_MODE1)  /* gpmc_a14.qspi1_d3 */
 103                         0x7c (PIN_INPUT | MUX_MODE1)  /* gpmc_a15.qspi1_d2 */
 104                         0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
 105                         0x84 (PIN_INPUT | MUX_MODE1)  /* gpmc_a17.qspi1_d0 */
 106                         0x88 (PIN_INPUT | MUX_MODE1)  /* qpmc_a18.qspi1_sclk */
 107                         0xb8 (PIN_INPUT_PULLUP | MUX_MODE1)  /* gpmc_cs2.qspi1_cs0 */
 108                         0xbc (PIN_INPUT_PULLUP | MUX_MODE1)  /* gpmc_cs3.qspi1_cs1 */
 109                 >;
 110         };
 111
 112         usb1_pins: pinmux_usb1_pins {
 113                 pinctrl-single,pins = <
 114                         0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
 115                 >;
 116         };
 117
 118         usb2_pins: pinmux_usb2_pins {
 119                 pinctrl-single,pins = <
 120                         0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
 121                 >;
 122         };
 123 };
 124
 125 &i2c1 {
 126         status = "okay";
 127         pinctrl-names = "default";
 128         pinctrl-0 = <&i2c1_pins>;
 129         clock-frequency = <400000>;
 130
 131         tps659038: tps659038@58 {
 132                 compatible = "ti,tps659038";
 133                 reg = <0x58>;
 134
 135                 tps659038_pmic {
 136                         compatible = "ti,tps659038-pmic";
 137
 138                         regulators {
 139                                 smps123_reg: smps123 {
 140                                         /* VDD_MPU */
 141                                         regulator-name = "smps123";
 142                                         regulator-min-microvolt = < 850000>;
 143                                         regulator-max-microvolt = <1250000>;
 144                                         regulator-always-on;
 145                                         regulator-boot-on;
 146                                 };
 147
 148                                 smps45_reg: smps45 {
 149                                         /* VDD_DSPEVE */
 150                                         regulator-name = "smps45";
 151                                         regulator-min-microvolt = < 850000>;
 152                                         regulator-max-microvolt = <1150000>;
 153                                         regulator-boot-on;
 154                                 };
 155
 156                                 smps6_reg: smps6 {
 157                                         /* VDD_GPU - over VDD_SMPS6 */
 158                                         regulator-name = "smps6";
 159                                         regulator-min-microvolt = <850000>;
 160                                         regulator-max-microvolt = <12500000>;
 161                                         regulator-boot-on;
 162                                 };
 163
 164                                 smps7_reg: smps7 {
 165                                         /* CORE_VDD */
 166                                         regulator-name = "smps7";
 167                                         regulator-min-microvolt = <850000>;
 168                                         regulator-max-microvolt = <1030000>;
 169                                         regulator-always-on;
 170                                         regulator-boot-on;
 171                                 };
 172
 173                                 smps8_reg: smps8 {
 174                                         /* VDD_IVAHD */
 175                                         regulator-name = "smps8";
 176                                         regulator-min-microvolt = < 850000>;
 177                                         regulator-max-microvolt = <1250000>;
 178                                         regulator-boot-on;
 179                                 };
 180
 181                                 smps9_reg: smps9 {
 182                                         /* VDDS1V8 */
 183                                         regulator-name = "smps9";
 184                                         regulator-min-microvolt = <1800000>;
 185                                         regulator-max-microvolt = <1800000>;
 186                                         regulator-always-on;
 187                                         regulator-boot-on;
 188                                 };
 189
 190                                 ldo1_reg: ldo1 {
 191                                         /* LDO1_OUT --> SDIO  */
 192                                         regulator-name = "ldo1";
 193                                         regulator-min-microvolt = <1800000>;
 194                                         regulator-max-microvolt = <3300000>;
 195                                         regulator-boot-on;
 196                                 };
 197
 198                                 ldo2_reg: ldo2 {
 199                                         /* VDD_RTCIO */
 200                                         /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
 201                                         regulator-name = "ldo2";
 202                                         regulator-min-microvolt = <3300000>;
 203                                         regulator-max-microvolt = <3300000>;
 204                                         regulator-boot-on;
 205                                 };
 206
 207                                 ldo3_reg: ldo3 {
 208                                         /* VDDA_1V8_PHY */
 209                                         regulator-name = "ldo3";
 210                                         regulator-min-microvolt = <1800000>;
 211                                         regulator-max-microvolt = <1800000>;
 212                                         regulator-boot-on;
 213                                 };
 214
 215                                 ldo9_reg: ldo9 {
 216                                         /* VDD_RTC */
 217                                         regulator-name = "ldo9";
 218                                         regulator-min-microvolt = <1050000>;
 219                                         regulator-max-microvolt = <1050000>;
 220                                         regulator-boot-on;
 221                                 };
 222
 223                                 ldoln_reg: ldoln {
 224                                         /* VDDA_1V8_PLL */
 225                                         regulator-name = "ldoln";
 226                                         regulator-min-microvolt = <1800000>;
 227                                         regulator-max-microvolt = <1800000>;
 228                                         regulator-always-on;
 229                                         regulator-boot-on;
 230                                 };
 231
 232                                 ldousb_reg: ldousb {
 233                                         /* VDDA_3V_USB: VDDA_USBHS33 */
 234                                         regulator-name = "ldousb";
 235                                         regulator-min-microvolt = <3300000>;
 236                                         regulator-max-microvolt = <3300000>;
 237                                         regulator-boot-on;
 238                                 };
 239                         };
 240                 };
 241         };
 242 };
 243
 244 &i2c2 {
 245         status = "okay";
 246         pinctrl-names = "default";
 247         pinctrl-0 = <&i2c2_pins>;
 248         clock-frequency = <400000>;
 249 };
 250
 251 &i2c3 {
 252         status = "okay";
 253         pinctrl-names = "default";
 254         pinctrl-0 = <&i2c3_pins>;
 255         clock-frequency = <3400000>;
 256 };
 257
 258 &mcspi1 {
 259         status = "okay";
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&mcspi1_pins>;
 262 };
 263
 264 &mcspi2 {
 265         status = "okay";
 266         pinctrl-names = "default";
 267         pinctrl-0 = <&mcspi2_pins>;
 268 };
 269
 270 &uart1 {
 271         status = "okay";
 272         pinctrl-names = "default";
 273         pinctrl-0 = <&uart1_pins>;
 274 };
 275
 276 &uart2 {
 277         status = "okay";
 278         pinctrl-names = "default";
 279         pinctrl-0 = <&uart2_pins>;
 280 };
 281
 282 &uart3 {
 283         status = "okay";
 284         pinctrl-names = "default";
 285         pinctrl-0 = <&uart3_pins>;
 286 };
 287
 288 &mmc1 {
 289         status = "okay";
 290         vmmc-supply = <&ldo1_reg>;
 291         bus-width = <4>;
 292 };
 293
 294 &mmc2 {
 295         status = "okay";
 296         vmmc-supply = <&mmc2_3v3>;
 297         bus-width = <8>;
 298 };
 299
 300 &cpu0 {
 301         cpu0-supply = <&smps123_reg>;
 302 };
 303
 304 &qspi {
 305         status = "okay";
 306         pinctrl-names = "default";
 307         pinctrl-0 = <&qspi1_pins>;
 308
 309         spi-max-frequency = <48000000>;
 310         m25p80@0 {
 311                 compatible = "s25fl256s1";
 312                 spi-max-frequency = <48000000>;
 313                 reg = <0>;
 314                 spi-tx-bus-width = <1>;
 315                 spi-rx-bus-width = <4>;
 316                 spi-cpol;
 317                 spi-cpha;
 318                 #address-cells = <1>;
 319                 #size-cells = <1>;
 320
 321                 /* MTD partition table.
 322                  * The ROM checks the first four physical blocks
 323                  * for a valid file to boot and the flash here is
 324                  * 64KiB block size.
 325                  */
 326                 partition@0 {
 327                         label = "QSPI.SPL";
 328                         reg = <0x00000000 0x000010000>;
 329                 };
 330                 partition@1 {
 331                         label = "QSPI.SPL.backup1";
 332                         reg = <0x00010000 0x00010000>;
 333                 };
 334                 partition@2 {
 335                         label = "QSPI.SPL.backup2";
 336                         reg = <0x00020000 0x00010000>;
 337                 };
 338                 partition@3 {
 339                         label = "QSPI.SPL.backup3";
 340                         reg = <0x00030000 0x00010000>;
 341                 };
 342                 partition@4 {
 343                         label = "QSPI.u-boot";
 344                         reg = <0x00040000 0x00100000>;
 345                 };
 346                 partition@5 {
 347                         label = "QSPI.u-boot-spl-os";
 348                         reg = <0x00140000 0x00010000>;
 349                 };
 350                 partition@6 {
 351                         label = "QSPI.u-boot-env";
 352                         reg = <0x00150000 0x00010000>;
 353                 };
 354                 partition@7 {
 355                         label = "QSPI.u-boot-env.backup1";
 356                         reg = <0x00160000 0x0010000>;
 357                 };
 358                 partition@8 {
 359                         label = "QSPI.kernel";
 360                         reg = <0x00170000 0x0800000>;
 361                 };
 362                 partition@9 {
 363                         label = "QSPI.file-system";
 364                         reg = <0x00970000 0x01690000>;
 365                 };
 366         };
 367 };
 368
 369 &usb1 {
 370         dr_mode = "peripheral";
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&usb1_pins>;
 373 };
 374
 375 &usb2 {
 376         dr_mode = "host";
 377         pinctrl-names = "default";
 378         pinctrl-0 = <&usb2_pins>;
 379 };