arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /*
  10  * Carveout for multimedia usecases
  11  * It should be the last 48MB of the first 512MB memory part
  12  * In theory, it should not even exist. That zone should be reserved
  13  * dynamically during the .reserve callback.
  14  */
  15 /memreserve/ 0x9d000000 0x03000000;
  16
  17 /include/ "skeleton.dtsi"
  18
  19 / {
  20         compatible = "ti,omap4430", "ti,omap4";
  21         interrupt-parent = <&gic>;
  22
  23         aliases {
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28         };
  29
  30         cpus {
  31                 cpu@0 {
  32                         compatible = "arm,cortex-a9";
  33                         next-level-cache = <&L2>;
  34                 };
  35                 cpu@1 {
  36                         compatible = "arm,cortex-a9";
  37                         next-level-cache = <&L2>;
  38                 };
  39         };
  40
  41         gic: interrupt-controller@48241000 {
  42                 compatible = "arm,cortex-a9-gic";
  43                 interrupt-controller;
  44                 #interrupt-cells = <3>;
  45                 reg = <0x48241000 0x1000>,
  46                       <0x48240100 0x0100>;
  47         };
  48
  49         L2: l2-cache-controller@48242000 {
  50                 compatible = "arm,pl310-cache";
  51                 reg = <0x48242000 0x1000>;
  52                 cache-unified;
  53                 cache-level = <2>;
  54         };
  55
  56         local-timer@0x48240600 {
  57                 compatible = "arm,cortex-a9-twd-timer";
  58                 reg = <0x48240600 0x20>;
  59                 interrupts = <1 13 0x304>;
  60         };
  61
  62         /*
  63          * The soc node represents the soc top level view. It is uses for IPs
  64          * that are not memory mapped in the MPU view or for the MPU itself.
  65          */
  66         soc {
  67                 compatible = "ti,omap-infra";
  68                 mpu {
  69                         compatible = "ti,omap4-mpu";
  70                         ti,hwmods = "mpu";
  71                 };
  72
  73                 dsp {
  74                         compatible = "ti,omap3-c64";
  75                         ti,hwmods = "dsp";
  76                 };
  77
  78                 iva {
  79                         compatible = "ti,ivahd";
  80                         ti,hwmods = "iva";
  81                 };
  82         };
  83
  84         /*
  85          * XXX: Use a flat representation of the OMAP4 interconnect.
  86          * The real OMAP interconnect network is quite complex.
  87          * Since that will not bring real advantage to represent that in DT for
  88          * the moment, just use a fake OCP bus entry to represent the whole bus
  89          * hierarchy.
  90          */
  91         ocp {
  92                 compatible = "ti,omap4-l3-noc", "simple-bus";
  93                 #address-cells = <1>;
  94                 #size-cells = <1>;
  95                 ranges;
  96                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
  97
  98                 counter32k: counter@4a304000 {
  99                         compatible = "ti,omap-counter32k";
 100                         reg = <0x4a304000 0x20>;
 101                         ti,hwmods = "counter_32k";
 102                 };
 103
 104                 omap4_pmx_core: pinmux@4a100040 {
 105                         compatible = "ti,omap4-padconf", "pinctrl-single";
 106                         reg = <0x4a100040 0x0196>;
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         pinctrl-single,register-width = <16>;
 110                         pinctrl-single,function-mask = <0x7fff>;
 111                 };
 112                 omap4_pmx_wkup: pinmux@4a31e040 {
 113                         compatible = "ti,omap4-padconf", "pinctrl-single";
 114                         reg = <0x4a31e040 0x0038>;
 115                         #address-cells = <1>;
 116                         #size-cells = <0>;
 117                         pinctrl-single,register-width = <16>;
 118                         pinctrl-single,function-mask = <0x7fff>;
 119                 };
 120
 121                 sdma: dma-controller@4a056000 {
 122                         compatible = "ti,omap4430-sdma";
 123                         reg = <0x4a056000 0x1000>;
 124                         interrupts = <0 12 0x4>,
 125                                      <0 13 0x4>,
 126                                      <0 14 0x4>,
 127                                      <0 15 0x4>;
 128                         #dma-cells = <1>;
 129                         #dma-channels = <32>;
 130                         #dma-requests = <127>;
 131                 };
 132
 133                 gpio1: gpio@4a310000 {
 134                         compatible = "ti,omap4-gpio";
 135                         reg = <0x4a310000 0x200>;
 136                         interrupts = <0 29 0x4>;
 137                         ti,hwmods = "gpio1";
 138                         gpio-controller;
 139                         #gpio-cells = <2>;
 140                         interrupt-controller;
 141                         #interrupt-cells = <2>;
 142                 };
 143
 144                 gpio2: gpio@48055000 {
 145                         compatible = "ti,omap4-gpio";
 146                         reg = <0x48055000 0x200>;
 147                         interrupts = <0 30 0x4>;
 148                         ti,hwmods = "gpio2";
 149                         gpio-controller;
 150                         #gpio-cells = <2>;
 151                         interrupt-controller;
 152                         #interrupt-cells = <2>;
 153                 };
 154
 155                 gpio3: gpio@48057000 {
 156                         compatible = "ti,omap4-gpio";
 157                         reg = <0x48057000 0x200>;
 158                         interrupts = <0 31 0x4>;
 159                         ti,hwmods = "gpio3";
 160                         gpio-controller;
 161                         #gpio-cells = <2>;
 162                         interrupt-controller;
 163                         #interrupt-cells = <2>;
 164                 };
 165
 166                 gpio4: gpio@48059000 {
 167                         compatible = "ti,omap4-gpio";
 168                         reg = <0x48059000 0x200>;
 169                         interrupts = <0 32 0x4>;
 170                         ti,hwmods = "gpio4";
 171                         gpio-controller;
 172                         #gpio-cells = <2>;
 173                         interrupt-controller;
 174                         #interrupt-cells = <2>;
 175                 };
 176
 177                 gpio5: gpio@4805b000 {
 178                         compatible = "ti,omap4-gpio";
 179                         reg = <0x4805b000 0x200>;
 180                         interrupts = <0 33 0x4>;
 181                         ti,hwmods = "gpio5";
 182                         gpio-controller;
 183                         #gpio-cells = <2>;
 184                         interrupt-controller;
 185                         #interrupt-cells = <2>;
 186                 };
 187
 188                 gpio6: gpio@4805d000 {
 189                         compatible = "ti,omap4-gpio";
 190                         reg = <0x4805d000 0x200>;
 191                         interrupts = <0 34 0x4>;
 192                         ti,hwmods = "gpio6";
 193                         gpio-controller;
 194                         #gpio-cells = <2>;
 195                         interrupt-controller;
 196                         #interrupt-cells = <2>;
 197                 };
 198
 199                 gpmc: gpmc@50000000 {
 200                         compatible = "ti,omap4430-gpmc";
 201                         reg = <0x50000000 0x1000>;
 202                         #address-cells = <2>;
 203                         #size-cells = <1>;
 204                         interrupts = <0 20 0x4>;
 205                         gpmc,num-cs = <8>;
 206                         gpmc,num-waitpins = <4>;
 207                         ti,hwmods = "gpmc";
 208                 };
 209
 210                 uart1: serial@4806a000 {
 211                         compatible = "ti,omap4-uart";
 212                         reg = <0x4806a000 0x100>;
 213                         interrupts = <0 72 0x4>;
 214                         ti,hwmods = "uart1";
 215                         clock-frequency = <48000000>;
 216                 };
 217
 218                 uart2: serial@4806c000 {
 219                         compatible = "ti,omap4-uart";
 220                         reg = <0x4806c000 0x100>;
 221                         interrupts = <0 73 0x4>;
 222                         ti,hwmods = "uart2";
 223                         clock-frequency = <48000000>;
 224                 };
 225
 226                 uart3: serial@48020000 {
 227                         compatible = "ti,omap4-uart";
 228                         reg = <0x48020000 0x100>;
 229                         interrupts = <0 74 0x4>;
 230                         ti,hwmods = "uart3";
 231                         clock-frequency = <48000000>;
 232                 };
 233
 234                 uart4: serial@4806e000 {
 235                         compatible = "ti,omap4-uart";
 236                         reg = <0x4806e000 0x100>;
 237                         interrupts = <0 70 0x4>;
 238                         ti,hwmods = "uart4";
 239                         clock-frequency = <48000000>;
 240                 };
 241
 242                 i2c1: i2c@48070000 {
 243                         compatible = "ti,omap4-i2c";
 244                         reg = <0x48070000 0x100>;
 245                         interrupts = <0 56 0x4>;
 246                         #address-cells = <1>;
 247                         #size-cells = <0>;
 248                         ti,hwmods = "i2c1";
 249                 };
 250
 251                 i2c2: i2c@48072000 {
 252                         compatible = "ti,omap4-i2c";
 253                         reg = <0x48072000 0x100>;
 254                         interrupts = <0 57 0x4>;
 255                         #address-cells = <1>;
 256                         #size-cells = <0>;
 257                         ti,hwmods = "i2c2";
 258                 };
 259
 260                 i2c3: i2c@48060000 {
 261                         compatible = "ti,omap4-i2c";
 262                         reg = <0x48060000 0x100>;
 263                         interrupts = <0 61 0x4>;
 264                         #address-cells = <1>;
 265                         #size-cells = <0>;
 266                         ti,hwmods = "i2c3";
 267                 };
 268
 269                 i2c4: i2c@48350000 {
 270                         compatible = "ti,omap4-i2c";
 271                         reg = <0x48350000 0x100>;
 272                         interrupts = <0 62 0x4>;
 273                         #address-cells = <1>;
 274                         #size-cells = <0>;
 275                         ti,hwmods = "i2c4";
 276                 };
 277
 278                 mcspi1: spi@48098000 {
 279                         compatible = "ti,omap4-mcspi";
 280                         reg = <0x48098000 0x200>;
 281                         interrupts = <0 65 0x4>;
 282                         #address-cells = <1>;
 283                         #size-cells = <0>;
 284                         ti,hwmods = "mcspi1";
 285                         ti,spi-num-cs = <4>;
 286                         dmas = <&sdma 35>,
 287                                <&sdma 36>,
 288                                <&sdma 37>,
 289                                <&sdma 38>,
 290                                <&sdma 39>,
 291                                <&sdma 40>,
 292                                <&sdma 41>,
 293                                <&sdma 42>;
 294                         dma-names = "tx0", "rx0", "tx1", "rx1",
 295                                     "tx2", "rx2", "tx3", "rx3";
 296                 };
 297
 298                 mcspi2: spi@4809a000 {
 299                         compatible = "ti,omap4-mcspi";
 300                         reg = <0x4809a000 0x200>;
 301                         interrupts = <0 66 0x4>;
 302                         #address-cells = <1>;
 303                         #size-cells = <0>;
 304                         ti,hwmods = "mcspi2";
 305                         ti,spi-num-cs = <2>;
 306                         dmas = <&sdma 43>,
 307                                <&sdma 44>,
 308                                <&sdma 45>,
 309                                <&sdma 46>;
 310                         dma-names = "tx0", "rx0", "tx1", "rx1";
 311                 };
 312
 313                 mcspi3: spi@480b8000 {
 314                         compatible = "ti,omap4-mcspi";
 315                         reg = <0x480b8000 0x200>;
 316                         interrupts = <0 91 0x4>;
 317                         #address-cells = <1>;
 318                         #size-cells = <0>;
 319                         ti,hwmods = "mcspi3";
 320                         ti,spi-num-cs = <2>;
 321                         dmas = <&sdma 15>, <&sdma 16>;
 322                         dma-names = "tx0", "rx0";
 323                 };
 324
 325                 mcspi4: spi@480ba000 {
 326                         compatible = "ti,omap4-mcspi";
 327                         reg = <0x480ba000 0x200>;
 328                         interrupts = <0 48 0x4>;
 329                         #address-cells = <1>;
 330                         #size-cells = <0>;
 331                         ti,hwmods = "mcspi4";
 332                         ti,spi-num-cs = <1>;
 333                         dmas = <&sdma 70>, <&sdma 71>;
 334                         dma-names = "tx0", "rx0";
 335                 };
 336
 337                 mmc1: mmc@4809c000 {
 338                         compatible = "ti,omap4-hsmmc";
 339                         reg = <0x4809c000 0x400>;
 340                         interrupts = <0 83 0x4>;
 341                         ti,hwmods = "mmc1";
 342                         ti,dual-volt;
 343                         ti,needs-special-reset;
 344                         dmas = <&sdma 61>, <&sdma 62>;
 345                         dma-names = "tx", "rx";
 346                 };
 347
 348                 mmc2: mmc@480b4000 {
 349                         compatible = "ti,omap4-hsmmc";
 350                         reg = <0x480b4000 0x400>;
 351                         interrupts = <0 86 0x4>;
 352                         ti,hwmods = "mmc2";
 353                         ti,needs-special-reset;
 354                         dmas = <&sdma 47>, <&sdma 48>;
 355                         dma-names = "tx", "rx";
 356                 };
 357
 358                 mmc3: mmc@480ad000 {
 359                         compatible = "ti,omap4-hsmmc";
 360                         reg = <0x480ad000 0x400>;
 361                         interrupts = <0 94 0x4>;
 362                         ti,hwmods = "mmc3";
 363                         ti,needs-special-reset;
 364                         dmas = <&sdma 77>, <&sdma 78>;
 365                         dma-names = "tx", "rx";
 366                 };
 367
 368                 mmc4: mmc@480d1000 {
 369                         compatible = "ti,omap4-hsmmc";
 370                         reg = <0x480d1000 0x400>;
 371                         interrupts = <0 96 0x4>;
 372                         ti,hwmods = "mmc4";
 373                         ti,needs-special-reset;
 374                         dmas = <&sdma 57>, <&sdma 58>;
 375                         dma-names = "tx", "rx";
 376                 };
 377
 378                 mmc5: mmc@480d5000 {
 379                         compatible = "ti,omap4-hsmmc";
 380                         reg = <0x480d5000 0x400>;
 381                         interrupts = <0 59 0x4>;
 382                         ti,hwmods = "mmc5";
 383                         ti,needs-special-reset;
 384                         dmas = <&sdma 59>, <&sdma 60>;
 385                         dma-names = "tx", "rx";
 386                 };
 387
 388                 wdt2: wdt@4a314000 {
 389                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 390                         reg = <0x4a314000 0x80>;
 391                         interrupts = <0 80 0x4>;
 392                         ti,hwmods = "wd_timer2";
 393                 };
 394
 395                 mcpdm: mcpdm@40132000 {
 396                         compatible = "ti,omap4-mcpdm";
 397                         reg = <0x40132000 0x7f>, /* MPU private access */
 398                               <0x49032000 0x7f>; /* L3 Interconnect */
 399                         reg-names = "mpu", "dma";
 400                         interrupts = <0 112 0x4>;
 401                         ti,hwmods = "mcpdm";
 402                 };
 403
 404                 dmic: dmic@4012e000 {
 405                         compatible = "ti,omap4-dmic";
 406                         reg = <0x4012e000 0x7f>, /* MPU private access */
 407                               <0x4902e000 0x7f>; /* L3 Interconnect */
 408                         reg-names = "mpu", "dma";
 409                         interrupts = <0 114 0x4>;
 410                         ti,hwmods = "dmic";
 411                 };
 412
 413                 mcbsp1: mcbsp@40122000 {
 414                         compatible = "ti,omap4-mcbsp";
 415                         reg = <0x40122000 0xff>, /* MPU private access */
 416                               <0x49022000 0xff>; /* L3 Interconnect */
 417                         reg-names = "mpu", "dma";
 418                         interrupts = <0 17 0x4>;
 419                         interrupt-names = "common";
 420                         ti,buffer-size = <128>;
 421                         ti,hwmods = "mcbsp1";
 422                 };
 423
 424                 mcbsp2: mcbsp@40124000 {
 425                         compatible = "ti,omap4-mcbsp";
 426                         reg = <0x40124000 0xff>, /* MPU private access */
 427                               <0x49024000 0xff>; /* L3 Interconnect */
 428                         reg-names = "mpu", "dma";
 429                         interrupts = <0 22 0x4>;
 430                         interrupt-names = "common";
 431                         ti,buffer-size = <128>;
 432                         ti,hwmods = "mcbsp2";
 433                 };
 434
 435                 mcbsp3: mcbsp@40126000 {
 436                         compatible = "ti,omap4-mcbsp";
 437                         reg = <0x40126000 0xff>, /* MPU private access */
 438                               <0x49026000 0xff>; /* L3 Interconnect */
 439                         reg-names = "mpu", "dma";
 440                         interrupts = <0 23 0x4>;
 441                         interrupt-names = "common";
 442                         ti,buffer-size = <128>;
 443                         ti,hwmods = "mcbsp3";
 444                 };
 445
 446                 mcbsp4: mcbsp@48096000 {
 447                         compatible = "ti,omap4-mcbsp";
 448                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 449                         reg-names = "mpu";
 450                         interrupts = <0 16 0x4>;
 451                         interrupt-names = "common";
 452                         ti,buffer-size = <128>;
 453                         ti,hwmods = "mcbsp4";
 454                 };
 455
 456                 keypad: keypad@4a31c000 {
 457                         compatible = "ti,omap4-keypad";
 458                         reg = <0x4a31c000 0x80>;
 459                         interrupts = <0 120 0x4>;
 460                         reg-names = "mpu";
 461                         ti,hwmods = "kbd";
 462                 };
 463
 464                 emif1: emif@4c000000 {
 465                         compatible = "ti,emif-4d";
 466                         reg = <0x4c000000 0x100>;
 467                         interrupts = <0 110 0x4>;
 468                         ti,hwmods = "emif1";
 469                         phy-type = <1>;
 470                         hw-caps-read-idle-ctrl;
 471                         hw-caps-ll-interface;
 472                         hw-caps-temp-alert;
 473                 };
 474
 475                 emif2: emif@4d000000 {
 476                         compatible = "ti,emif-4d";
 477                         reg = <0x4d000000 0x100>;
 478                         interrupts = <0 111 0x4>;
 479                         ti,hwmods = "emif2";
 480                         phy-type = <1>;
 481                         hw-caps-read-idle-ctrl;
 482                         hw-caps-ll-interface;
 483                         hw-caps-temp-alert;
 484                 };
 485
 486                 ocp2scp@4a0ad000 {
 487                         compatible = "ti,omap-ocp2scp";
 488                         reg = <0x4a0ad000 0x1f>;
 489                         #address-cells = <1>;
 490                         #size-cells = <1>;
 491                         ranges;
 492                         ti,hwmods = "ocp2scp_usb_phy";
 493                         usb2_phy: usb2phy@4a0ad080 {
 494                                 compatible = "ti,omap-usb2";
 495                                 reg = <0x4a0ad080 0x58>;
 496                                 ctrl-module = <&omap_control_usb>;
 497                         };
 498                 };
 499
 500                 timer1: timer@4a318000 {
 501                         compatible = "ti,omap2-timer";
 502                         reg = <0x4a318000 0x80>;
 503                         interrupts = <0 37 0x4>;
 504                         ti,hwmods = "timer1";
 505                         ti,timer-alwon;
 506                 };
 507
 508                 timer2: timer@48032000 {
 509                         compatible = "ti,omap2-timer";
 510                         reg = <0x48032000 0x80>;
 511                         interrupts = <0 38 0x4>;
 512                         ti,hwmods = "timer2";
 513                 };
 514
 515                 timer3: timer@48034000 {
 516                         compatible = "ti,omap2-timer";
 517                         reg = <0x48034000 0x80>;
 518                         interrupts = <0 39 0x4>;
 519                         ti,hwmods = "timer3";
 520                 };
 521
 522                 timer4: timer@48036000 {
 523                         compatible = "ti,omap2-timer";
 524                         reg = <0x48036000 0x80>;
 525                         interrupts = <0 40 0x4>;
 526                         ti,hwmods = "timer4";
 527                 };
 528
 529                 timer5: timer@40138000 {
 530                         compatible = "ti,omap2-timer";
 531                         reg = <0x40138000 0x80>,
 532                               <0x49038000 0x80>;
 533                         interrupts = <0 41 0x4>;
 534                         ti,hwmods = "timer5";
 535                         ti,timer-dsp;
 536                 };
 537
 538                 timer6: timer@4013a000 {
 539                         compatible = "ti,omap2-timer";
 540                         reg = <0x4013a000 0x80>,
 541                               <0x4903a000 0x80>;
 542                         interrupts = <0 42 0x4>;
 543                         ti,hwmods = "timer6";
 544                         ti,timer-dsp;
 545                 };
 546
 547                 timer7: timer@4013c000 {
 548                         compatible = "ti,omap2-timer";
 549                         reg = <0x4013c000 0x80>,
 550                               <0x4903c000 0x80>;
 551                         interrupts = <0 43 0x4>;
 552                         ti,hwmods = "timer7";
 553                         ti,timer-dsp;
 554                 };
 555
 556                 timer8: timer@4013e000 {
 557                         compatible = "ti,omap2-timer";
 558                         reg = <0x4013e000 0x80>,
 559                               <0x4903e000 0x80>;
 560                         interrupts = <0 44 0x4>;
 561                         ti,hwmods = "timer8";
 562                         ti,timer-pwm;
 563                         ti,timer-dsp;
 564                 };
 565
 566                 timer9: timer@4803e000 {
 567                         compatible = "ti,omap2-timer";
 568                         reg = <0x4803e000 0x80>;
 569                         interrupts = <0 45 0x4>;
 570                         ti,hwmods = "timer9";
 571                         ti,timer-pwm;
 572                 };
 573
 574                 timer10: timer@48086000 {
 575                         compatible = "ti,omap2-timer";
 576                         reg = <0x48086000 0x80>;
 577                         interrupts = <0 46 0x4>;
 578                         ti,hwmods = "timer10";
 579                         ti,timer-pwm;
 580                 };
 581
 582                 timer11: timer@48088000 {
 583                         compatible = "ti,omap2-timer";
 584                         reg = <0x48088000 0x80>;
 585                         interrupts = <0 47 0x4>;
 586                         ti,hwmods = "timer11";
 587                         ti,timer-pwm;
 588                 };
 589
 590                 usbhstll: usbhstll@4a062000 {
 591                         compatible = "ti,usbhs-tll";
 592                         reg = <0x4a062000 0x1000>;
 593                         interrupts = <0 78 0x4>;
 594                         ti,hwmods = "usb_tll_hs";
 595                 };
 596
 597                 usbhshost: usbhshost@4a064000 {
 598                         compatible = "ti,usbhs-host";
 599                         reg = <0x4a064000 0x800>;
 600                         ti,hwmods = "usb_host_hs";
 601                         #address-cells = <1>;
 602                         #size-cells = <1>;
 603                         ranges;
 604
 605                         usbhsohci: ohci@4a064800 {
 606                                 compatible = "ti,ohci-omap3", "usb-ohci";
 607                                 reg = <0x4a064800 0x400>;
 608                                 interrupt-parent = <&gic>;
 609                                 interrupts = <0 76 0x4>;
 610                         };
 611
 612                         usbhsehci: ehci@4a064c00 {
 613                                 compatible = "ti,ehci-omap", "usb-ehci";
 614                                 reg = <0x4a064c00 0x400>;
 615                                 interrupt-parent = <&gic>;
 616                                 interrupts = <0 77 0x4>;
 617                         };
 618                 };
 619
 620                 omap_control_usb: omap-control-usb@4a002300 {
 621                         compatible = "ti,omap-control-usb";
 622                         reg = <0x4a002300 0x4>,
 623                               <0x4a00233c 0x4>;
 624                         reg-names = "control_dev_conf", "otghs_control";
 625                         ti,type = <1>;
 626                 };
 627
 628                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 629                         compatible = "ti,omap4-musb";
 630                         reg = <0x4a0ab000 0x7ff>;
 631                         interrupts = <0 92 0x4>, <0 93 0x4>;
 632                         interrupt-names = "mc", "dma";
 633                         ti,hwmods = "usb_otg_hs";
 634                         usb-phy = <&usb2_phy>;
 635                         multipoint = <1>;
 636                         num-eps = <16>;
 637                         ram-bits = <12>;
 638                         ti,has-mailbox;
 639                 };
 640         };
 641 };