arch/arm/mach-at91/board-dt.c

   1 /*
   2  *  Setup code for AT91SAM Evaluation Kits with Device Tree support
   3  *
   4  *  Covers: * AT91SAM9G45-EKES  board
   5  *          * AT91SAM9M10-EKES  board
   6  *          * AT91SAM9M10G45-EK board
   7  *
   8  *  Copyright (C) 2011 Atmel,
   9  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  10  *
  11  * Licensed under GPLv2 or later.
  12  */
  13
  14 #include <linux/types.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/gpio.h>
  18 #include <linux/irqdomain.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/of_platform.h>
  21
  22 #include <mach/hardware.h>
  23 #include <mach/board.h>
  24 #include <mach/system_rev.h>
  25 #include <mach/at91sam9_smc.h>
  26
  27 #include <asm/setup.h>
  28 #include <asm/irq.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/map.h>
  31 #include <asm/mach/irq.h>
  32
  33 #include "sam9_smc.h"
  34 #include "generic.h"
  35
  36
  37 static void __init ek_init_early(void)
  38 {
  39         /* Initialize processor: 12.000 MHz crystal */
  40         at91_initialize(12000000);
  41
  42         /* DGBU on ttyS0. (Rx & Tx only) */
  43         at91_register_uart(0, 0, 0);
  44
  45         /* set serial console to ttyS0 (ie, DBGU) */
  46         at91_set_serial_console(0);
  47 }
  48
  49 /* det_pin is not connected */
  50 static struct atmel_nand_data __initdata ek_nand_data = {
  51         .ale            = 21,
  52         .cle            = 22,
  53         .det_pin        = -EINVAL,
  54         .rdy_pin        = AT91_PIN_PC8,
  55         .enable_pin     = AT91_PIN_PC14,
  56 };
  57
  58 static struct sam9_smc_config __initdata ek_nand_smc_config = {
  59         .ncs_read_setup         = 0,
  60         .nrd_setup              = 2,
  61         .ncs_write_setup        = 0,
  62         .nwe_setup              = 2,
  63
  64         .ncs_read_pulse         = 4,
  65         .nrd_pulse              = 4,
  66         .ncs_write_pulse        = 4,
  67         .nwe_pulse              = 4,
  68
  69         .read_cycle             = 7,
  70         .write_cycle            = 7,
  71
  72         .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
  73         .tdf_cycles             = 3,
  74 };
  75
  76 static void __init ek_add_device_nand(void)
  77 {
  78         ek_nand_data.bus_width_16 = board_have_nand_16bit();
  79         /* setup bus-width (8 or 16) */
  80         if (ek_nand_data.bus_width_16)
  81                 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
  82         else
  83                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
  84
  85         /* configure chip-select 3 (NAND) */
  86         sam9_smc_configure(0, 3, &ek_nand_smc_config);
  87
  88         at91_add_device_nand(&ek_nand_data);
  89 }
  90
  91 static const struct of_device_id aic_of_match[] __initconst = {
  92         { .compatible = "atmel,at91rm9200-aic", },
  93         {},
  94 };
  95
  96 static void __init at91_dt_init_irq(void)
  97 {
  98         irq_domain_generate_simple(aic_of_match, 0xfffff000, 0);
  99         at91_init_irq_default();
 100 }
 101
 102 static void __init at91_dt_device_init(void)
 103 {
 104         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 105
 106         /* NAND */
 107         ek_add_device_nand();
 108 }
 109
 110 static const char *at91_dt_board_compat[] __initdata = {
 111         "atmel,at91sam9m10g45ek",
 112         "calao,usb-a9g20",
 113         NULL
 114 };
 115
 116 DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
 117         /* Maintainer: Atmel */
 118         .timer          = &at91sam926x_timer,
 119         .map_io         = at91_map_io,
 120         .init_early     = ek_init_early,
 121         .init_irq       = at91_dt_init_irq,
 122         .init_machine   = at91_dt_device_init,
 123         .dt_compat      = at91_dt_board_compat,
 124 MACHINE_END