2 * TI DaVinci EVM board support
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/i2c.h>
17 #include <linux/i2c/pcf857x.h>
18 #include <linux/i2c/at24.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/phy.h>
24 #include <linux/clk.h>
25 #include <linux/videodev2.h>
27 #include <media/tvp514x.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
32 #include <mach/dm644x.h>
33 #include <mach/common.h>
35 #include <mach/serial.h>
37 #include <mach/nand.h>
41 #define DM644X_EVM_PHY_MASK (0x2)
42 #define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
44 #define DAVINCI_CFC_ATA_BASE 0x01C66000
46 #define LXT971_PHY_ID (0x001378e2)
47 #define LXT971_PHY_MASK (0xfffffff0)
49 static struct mtd_partition davinci_evm_norflash_partitions[] = {
50 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
55 .mask_flags = MTD_WRITEABLE, /* force read-only */
57 /* bootloader params in the next 1 sectors */
60 .offset = MTDPART_OFS_APPEND,
67 .offset = MTDPART_OFS_APPEND,
74 .offset = MTDPART_OFS_APPEND,
75 .size = MTDPART_SIZ_FULL,
80 static struct physmap_flash_data davinci_evm_norflash_data = {
82 .parts = davinci_evm_norflash_partitions,
83 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
86 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
87 * limits addresses to 16M, so using addresses past 16M will wrap */
88 static struct resource davinci_evm_norflash_resource = {
89 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
90 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
91 .flags = IORESOURCE_MEM,
94 static struct platform_device davinci_evm_norflash_device = {
95 .name = "physmap-flash",
98 .platform_data = &davinci_evm_norflash_data,
101 .resource = &davinci_evm_norflash_resource,
104 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
105 * It may used instead of the (default) NOR chip to boot, using TI's
106 * tools to install the secondary boot loader (UBL) and U-Boot.
108 static struct mtd_partition davinci_evm_nandflash_partition[] = {
109 /* Bootloader layout depends on whose u-boot is installed, but we
110 * can hide all the details.
111 * - block 0 for u-boot environment ... in mainline u-boot
112 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
113 * - blocks 6...? for u-boot
114 * - blocks 16..23 for u-boot environment ... in TI's u-boot
117 .name = "bootloader",
119 .size = SZ_256K + SZ_128K,
120 .mask_flags = MTD_WRITEABLE, /* force read-only */
125 .offset = MTDPART_OFS_APPEND,
129 /* File system (older GIT kernels started this on the 5MB mark) */
131 .name = "filesystem",
132 .offset = MTDPART_OFS_APPEND,
133 .size = MTDPART_SIZ_FULL,
136 /* A few blocks at end hold a flash BBT ... created by TI's CCS
137 * using flashwriter_nand.out, but ignored by TI's versions of
138 * Linux and u-boot. We boot faster by using them.
142 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
143 .parts = davinci_evm_nandflash_partition,
144 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
145 .ecc_mode = NAND_ECC_HW,
146 .options = NAND_USE_FLASH_BBT,
149 static struct resource davinci_evm_nandflash_resource[] = {
151 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
152 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
153 .flags = IORESOURCE_MEM,
155 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
156 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
157 .flags = IORESOURCE_MEM,
161 static struct platform_device davinci_evm_nandflash_device = {
162 .name = "davinci_nand",
165 .platform_data = &davinci_evm_nandflash_data,
167 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
168 .resource = davinci_evm_nandflash_resource,
171 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
173 static struct platform_device davinci_fb_device = {
177 .dma_mask = &davinci_fb_dma_mask,
178 .coherent_dma_mask = DMA_BIT_MASK(32),
183 static struct tvp514x_platform_data tvp5146_pdata = {
189 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
190 /* Inputs available at the TVP5146 */
191 static struct v4l2_input tvp5146_inputs[] = {
195 .type = V4L2_INPUT_TYPE_CAMERA,
196 .std = TVP514X_STD_ALL,
201 .type = V4L2_INPUT_TYPE_CAMERA,
202 .std = TVP514X_STD_ALL,
207 * this is the route info for connecting each input to decoder
208 * ouput that goes to vpfe. There is a one to one correspondence
209 * with tvp5146_inputs
211 static struct vpfe_route tvp5146_routes[] = {
213 .input = INPUT_CVBS_VI2B,
214 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
217 .input = INPUT_SVIDEO_VI2C_VI1C,
218 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
222 static struct vpfe_subdev_info vpfe_sub_devs[] = {
226 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
227 .inputs = tvp5146_inputs,
228 .routes = tvp5146_routes,
231 .if_type = VPFE_BT656,
232 .hdpol = VPFE_PINPOL_POSITIVE,
233 .vdpol = VPFE_PINPOL_POSITIVE,
236 I2C_BOARD_INFO("tvp5146", 0x5d),
237 .platform_data = &tvp5146_pdata,
242 static struct vpfe_config vpfe_cfg = {
243 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
245 .sub_devs = vpfe_sub_devs,
246 .card_name = "DM6446 EVM",
247 .ccdc = "DM6446 CCDC",
250 static struct platform_device rtc_dev = {
251 .name = "rtc_davinci_evm",
255 static struct resource ide_resources[] = {
257 .start = DAVINCI_CFC_ATA_BASE,
258 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
259 .flags = IORESOURCE_MEM,
264 .flags = IORESOURCE_IRQ,
268 static u64 ide_dma_mask = DMA_BIT_MASK(32);
270 static struct platform_device ide_dev = {
271 .name = "palm_bk3710",
273 .resource = ide_resources,
274 .num_resources = ARRAY_SIZE(ide_resources),
276 .dma_mask = &ide_dma_mask,
277 .coherent_dma_mask = DMA_BIT_MASK(32),
281 static struct snd_platform_data dm644x_evm_snd_data;
283 /*----------------------------------------------------------------------*/
289 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
294 static struct gpio_led evm_leds[] = {
295 { .name = "DS8", .active_low = 1,
296 .default_trigger = "heartbeat", },
297 { .name = "DS7", .active_low = 1, },
298 { .name = "DS6", .active_low = 1, },
299 { .name = "DS5", .active_low = 1, },
300 { .name = "DS4", .active_low = 1, },
301 { .name = "DS3", .active_low = 1, },
302 { .name = "DS2", .active_low = 1,
303 .default_trigger = "mmc0", },
304 { .name = "DS1", .active_low = 1,
305 .default_trigger = "ide-disk", },
308 static const struct gpio_led_platform_data evm_led_data = {
309 .num_leds = ARRAY_SIZE(evm_leds),
313 static struct platform_device *evm_led_dev;
316 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
318 struct gpio_led *leds = evm_leds;
326 /* what an extremely annoying way to be forced to handle
327 * device unregistration ...
329 evm_led_dev = platform_device_alloc("leds-gpio", 0);
330 platform_device_add_data(evm_led_dev,
331 &evm_led_data, sizeof evm_led_data);
333 evm_led_dev->dev.parent = &client->dev;
334 status = platform_device_add(evm_led_dev);
336 platform_device_put(evm_led_dev);
343 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
346 platform_device_unregister(evm_led_dev);
352 static struct pcf857x_platform_data pcf_data_u2 = {
353 .gpio_base = PCF_Uxx_BASE(0),
354 .setup = evm_led_setup,
355 .teardown = evm_led_teardown,
359 /* U18 - A/V clock generator and user switch */
364 sw_show(struct device *d, struct device_attribute *a, char *buf)
366 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
372 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
375 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
379 /* export dip switch option */
381 status = gpio_request(sw_gpio, "user_sw");
383 status = gpio_direction_input(sw_gpio);
385 status = device_create_file(&client->dev, &dev_attr_user_sw);
391 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
392 gpio_request(gpio + 3, "pll_fs2");
393 gpio_direction_output(gpio + 3, 0);
395 gpio_request(gpio + 2, "pll_fs1");
396 gpio_direction_output(gpio + 2, 0);
398 gpio_request(gpio + 1, "pll_sr");
399 gpio_direction_output(gpio + 1, 0);
405 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
412 device_remove_file(&client->dev, &dev_attr_user_sw);
418 static struct pcf857x_platform_data pcf_data_u18 = {
419 .gpio_base = PCF_Uxx_BASE(1),
420 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
421 .setup = evm_u18_setup,
422 .teardown = evm_u18_teardown,
426 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
429 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
431 /* p0 = nDRV_VBUS (initial: don't supply it) */
432 gpio_request(gpio + 0, "nDRV_VBUS");
433 gpio_direction_output(gpio + 0, 1);
436 gpio_request(gpio + 1, "VDDIMX_EN");
437 gpio_direction_output(gpio + 1, 1);
440 gpio_request(gpio + 2, "VLYNQ_EN");
441 gpio_direction_output(gpio + 2, 1);
443 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
444 gpio_request(gpio + 3, "nCF_RESET");
445 gpio_direction_output(gpio + 3, 0);
449 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
450 gpio_request(gpio + 5, "WLAN_RESET");
451 gpio_direction_output(gpio + 5, 1);
453 /* p6 = nATA_SEL (initial: select) */
454 gpio_request(gpio + 6, "nATA_SEL");
455 gpio_direction_output(gpio + 6, 0);
457 /* p7 = nCF_SEL (initial: deselect) */
458 gpio_request(gpio + 7, "nCF_SEL");
459 gpio_direction_output(gpio + 7, 1);
461 /* irlml6401 switches over 1A, in under 8 msec;
462 * now it can be managed by nDRV_VBUS ...
464 davinci_setup_usb(1000, 8);
470 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
482 static struct pcf857x_platform_data pcf_data_u35 = {
483 .gpio_base = PCF_Uxx_BASE(2),
484 .setup = evm_u35_setup,
485 .teardown = evm_u35_teardown,
488 /*----------------------------------------------------------------------*/
490 /* Most of this EEPROM is unused, but U-Boot uses some data:
491 * - 0x7f00, 6 bytes Ethernet Address
492 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
493 * - ... newer boards may have more
496 static struct at24_platform_data eeprom_info = {
497 .byte_len = (256*1024) / 8,
499 .flags = AT24_FLAG_ADDR16,
500 .setup = davinci_get_mac_addr,
501 .context = (void *)0x7f00,
505 * MSP430 supports RTC, card detection, input from IR remote, and
506 * a bit more. It triggers interrupts on GPIO(7) from pressing
507 * buttons on the IR remote, and for card detect switches.
509 static struct i2c_client *dm6446evm_msp;
511 static int dm6446evm_msp_probe(struct i2c_client *client,
512 const struct i2c_device_id *id)
514 dm6446evm_msp = client;
518 static int dm6446evm_msp_remove(struct i2c_client *client)
520 dm6446evm_msp = NULL;
524 static const struct i2c_device_id dm6446evm_msp_ids[] = {
525 { "dm6446evm_msp", 0, },
526 { /* end of list */ },
529 static struct i2c_driver dm6446evm_msp_driver = {
530 .driver.name = "dm6446evm_msp",
531 .id_table = dm6446evm_msp_ids,
532 .probe = dm6446evm_msp_probe,
533 .remove = dm6446evm_msp_remove,
536 static int dm6444evm_msp430_get_pins(void)
538 static const char txbuf[2] = { 2, 4, };
540 struct i2c_msg msg[2] = {
542 .addr = dm6446evm_msp->addr,
545 .buf = (void __force *)txbuf,
548 .addr = dm6446evm_msp->addr,
559 /* Command 4 == get input state, returns port 2 and port3 data
560 * S Addr W [A] len=2 [A] cmd=4 [A]
561 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
563 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
567 dev_dbg(&dm6446evm_msp->dev,
568 "PINS: %02x %02x %02x %02x\n",
569 buf[0], buf[1], buf[2], buf[3]);
571 return (buf[3] << 8) | buf[2];
574 static int dm6444evm_mmc_get_cd(int module)
576 int status = dm6444evm_msp430_get_pins();
578 return (status < 0) ? status : !(status & BIT(1));
581 static int dm6444evm_mmc_get_ro(int module)
583 int status = dm6444evm_msp430_get_pins();
585 return (status < 0) ? status : status & BIT(6 + 8);
588 static struct davinci_mmc_config dm6446evm_mmc_config = {
589 .get_cd = dm6444evm_mmc_get_cd,
590 .get_ro = dm6444evm_mmc_get_ro,
592 .version = MMC_CTLR_VERSION_1
595 static struct i2c_board_info __initdata i2c_info[] = {
597 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
600 I2C_BOARD_INFO("pcf8574", 0x38),
601 .platform_data = &pcf_data_u2,
604 I2C_BOARD_INFO("pcf8574", 0x39),
605 .platform_data = &pcf_data_u18,
608 I2C_BOARD_INFO("pcf8574", 0x3a),
609 .platform_data = &pcf_data_u35,
612 I2C_BOARD_INFO("24c256", 0x50),
613 .platform_data = &eeprom_info,
616 I2C_BOARD_INFO("tlv320aic33", 0x1b),
620 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
621 * which requires 100 usec of idle bus after i2c writes sent to it.
623 static struct davinci_i2c_platform_data i2c_pdata = {
624 .bus_freq = 20 /* kHz */,
625 .bus_delay = 100 /* usec */,
630 static void __init evm_init_i2c(void)
632 davinci_init_i2c(&i2c_pdata);
633 i2c_add_driver(&dm6446evm_msp_driver);
634 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
637 static struct platform_device *davinci_evm_devices[] __initdata = {
642 static struct davinci_uart_config uart_config __initdata = {
643 .enabled_uarts = (1 << 0),
647 davinci_evm_map_io(void)
649 /* setup input configuration for VPFE input devices */
650 dm644x_set_vpfe_config(&vpfe_cfg);
654 static int davinci_phy_fixup(struct phy_device *phydev)
656 unsigned int control;
657 /* CRITICAL: Fix for increasing PHY signal drive strength for
658 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
659 * signal strength was low causing TX to fail randomly. The
660 * fix is to Set bit 11 (Increased MII drive strength) of PHY
661 * register 26 (Digital Config register) on this phy. */
662 control = phy_read(phydev, 26);
663 phy_write(phydev, 26, (control | 0x800));
667 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
668 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
674 #if defined(CONFIG_MTD_PHYSMAP) || \
675 defined(CONFIG_MTD_PHYSMAP_MODULE)
681 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
682 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
688 static __init void davinci_evm_init(void)
690 struct clk *aemif_clk;
691 struct davinci_soc_info *soc_info = &davinci_soc_info;
693 aemif_clk = clk_get(NULL, "aemif");
694 clk_enable(aemif_clk);
697 if (HAS_NAND || HAS_NOR)
698 pr_warning("WARNING: both IDE and Flash are "
699 "enabled, but they share AEMIF pins.\n"
700 "\tDisable IDE for NAND/NOR support.\n");
701 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
702 davinci_cfg_reg(DM644X_ATAEN);
703 davinci_cfg_reg(DM644X_HDIREN);
704 platform_device_register(&ide_dev);
705 } else if (HAS_NAND || HAS_NOR) {
706 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
707 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
709 /* only one device will be jumpered and detected */
711 platform_device_register(&davinci_evm_nandflash_device);
712 evm_leds[7].default_trigger = "nand-disk";
714 pr_warning("WARNING: both NAND and NOR flash "
715 "are enabled; disable one of them.\n");
717 platform_device_register(&davinci_evm_norflash_device);
720 platform_add_devices(davinci_evm_devices,
721 ARRAY_SIZE(davinci_evm_devices));
724 davinci_setup_mmc(0, &dm6446evm_mmc_config);
726 davinci_serial_init(&uart_config);
727 dm644x_init_asp(&dm644x_evm_snd_data);
729 soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
730 soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
732 /* Register the fixup for PHY on DaVinci */
733 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
738 static __init void davinci_evm_irq_init(void)
743 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
744 /* Maintainer: MontaVista Software <source@mvista.com> */
746 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
747 .boot_params = (DAVINCI_DDR_BASE + 0x100),
748 .map_io = davinci_evm_map_io,
749 .init_irq = davinci_evm_irq_init,
750 .timer = &davinci_timer,
751 .init_machine = davinci_evm_init,