1 /* arch/arm/mach-exynos4/include/mach/regs-audss.h
3 * Copyright (c) 2011 Samsung Electronics
4 * http://www.samsung.com
6 * Exynos4 Audio SubSystem clock register definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __PLAT_REGS_AUDSS_H
14 #define __PLAT_REGS_AUDSS_H __FILE__
16 #define EXYNOS4_AUDSS_INT_MEM (0x03000000)
18 #define EXYNOS_AUDSSREG(x) (S5P_VA_AUDSS + (x))
20 #define EXYNOS_CLKSRC_AUDSS_OFFSET 0x0
21 #define EXYNOS_CLKDIV_AUDSS_OFFSET 0x4
22 #define EXYNOS_CLKGATE_AUDSS_OFFSET 0x8
24 #define EXYNOS_CLKSRC_AUDSS (EXYNOS_AUDSSREG \
25 (EXYNOS_CLKSRC_AUDSS_OFFSET))
26 #define EXYNOS_CLKDIV_AUDSS (EXYNOS_AUDSSREG \
27 (EXYNOS_CLKDIV_AUDSS_OFFSET))
28 #define EXYNOS_CLKGATE_AUDSS (EXYNOS_AUDSSREG \
29 (EXYNOS_CLKGATE_AUDSS_OFFSET))
31 /* IP Clock Gate 0 Registers */
32 #define EXYNOS_AUDSS_CLKGATE_RP (1<<0)
33 #define EXYNOS_AUDSS_CLKGATE_I2SBUS (1<<2)
34 #define EXYNOS_AUDSS_CLKGATE_I2SSPECIAL (1<<3)
35 #define EXYNOS_AUDSS_CLKGATE_UART (1<<7)
36 #define EXYNOS_AUDSS_CLKGATE_TIMER (1<<8)
38 #endif /* _PLAT_REGS_AUDSS_H */