2 * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/gpio.h>
13 #include <linux/of_platform.h>
14 #include <linux/platform_data/dwc3-exynos.h>
15 #include <linux/regulator/fixed.h>
16 #include <linux/regulator/machine.h>
17 #include <linux/serial_core.h>
18 #include <linux/smsc911x.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/pwm_backlight.h>
22 #include <linux/mfd/wm8994/pdata.h>
23 #include <linux/regulator/machine.h>
24 #include <linux/spi/spi.h>
26 #include <asm/mach/arch.h>
27 #include <asm/hardware/gic.h>
29 #include <mach/ohci.h>
30 #include <mach/regs-pmu.h>
31 #include <mach/sysmmu.h>
32 #include <mach/ohci.h>
33 #include <mach/regs-audss.h>
35 #include <plat/audio.h>
37 #include <plat/dsim.h>
39 #include <plat/mipi_dsi.h>
40 #include <plat/gpio-cfg.h>
41 #include <plat/regs-fb.h>
42 #include <plat/regs-serial.h>
43 #include <plat/regs-srom.h>
44 #include <plat/backlight.h>
45 #include <plat/devs.h>
46 #include <plat/usb-phy.h>
47 #include <plat/ehci.h>
49 #include <plat/s3c64xx-spi.h>
51 #include <video/platform_lcd.h>
53 #include "drm/exynos_drm.h"
56 static void __init smsc911x_init(int ncs)
60 /* configure nCS1 width to 16 bits */
61 data = __raw_readl(S5P_SROM_BW) &
62 ~(S5P_SROM_BW__CS_MASK << (ncs * 4));
63 data |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
64 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
65 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << (ncs * 4);
66 __raw_writel(data, S5P_SROM_BW);
68 /* set timing for nCS1 suitable for ethernet chip */
69 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
70 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
71 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
72 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
73 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
74 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
75 (0x1 << S5P_SROM_BCX__TACS__SHIFT),
76 S5P_SROM_BC0 + (ncs * 4));
79 static struct s3c_fb_pd_win smdk5250_fb_win0 = {
98 static struct s3c_fb_pd_win smdk5250_fb_win1 = {
110 .virtual_y = 800 * 2,
117 static struct s3c_fb_pd_win smdk5250_fb_win2 = {
129 .virtual_y = 800 * 2,
136 static struct fb_videomode snow_fb_window = {
138 .right_margin = 0x48,
147 static void exynos_fimd_gpio_setup_24bpp(void)
149 unsigned int reg = 0;
152 * Set DISP1BLK_CFG register for Display path selection
153 * FIMD of DISP1_BLK Bypass selection : DISP1BLK_CFG[15]
154 * ---------------------
156 * 1 | FIMD : selected
158 reg = __raw_readl(S3C_VA_SYS + 0x0214);
159 reg &= ~(1 << 15); /* To save other reset values */
161 __raw_writel(reg, S3C_VA_SYS + 0x0214);
164 static void exynos_dp_gpio_setup_24bpp(void)
166 exynos_fimd_gpio_setup_24bpp();
168 /* Set Hotplug detect for DP */
169 gpio_request(EXYNOS5_GPX0(7), "DP hotplug");
170 s3c_gpio_cfgpin(EXYNOS5_GPX0(7), S3C_GPIO_SFN(3));
173 #ifdef CONFIG_DRM_EXYNOS_FIMD
174 static struct exynos_drm_fimd_pdata smdk5250_lcd1_pdata = {
186 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
187 .vidcon1 = VIDCON1_INV_VCLK,
190 .clock_rate = 800 * 1000 * 1000,
193 static struct s3c_fb_platdata smdk5250_lcd1_pdata __initdata = {
194 .win[0] = &smdk5250_fb_win0,
195 .win[1] = &smdk5250_fb_win1,
196 .win[2] = &smdk5250_fb_win2,
198 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
199 .vidcon1 = VIDCON1_INV_VCLK,
200 .setup_gpio = exynos_fimd_gpio_setup_24bpp,
201 .clock_rate = 800 * 1000 * 1000,
205 static struct mipi_dsim_config dsim_info = {
206 .e_interface = DSIM_VIDEO,
207 .e_pixel_format = DSIM_24BPP_888,
208 /* main frame fifo auto flush at VSYNC pulse */
210 .eot_disable = false,
211 .auto_vertical_cnt = false,
217 .e_no_data_lane = DSIM_DATA_LANE_4,
218 .e_byte_clk = DSIM_PLL_OUT_DIV8,
219 .e_burst_mode = DSIM_BURST,
225 /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
226 .pll_stable_time = 500,
228 .esc_clk = 0.4 * 1000000, /* escape clk : 10MHz */
230 /* stop state holding counter after bta change count 0 ~ 0xfff */
231 .stop_holding_cnt = 0x0f,
232 .bta_timeout = 0xff, /* bta timeout 0 ~ 0xff */
233 .rx_timeout = 0xffff, /* lp rx timeout 0 ~ 0xffff */
235 .dsim_ddi_pd = &tc358764_mipi_lcd_driver,
238 static struct mipi_dsim_lcd_config dsim_lcd_info = {
239 .rgb_timing.left_margin = 0x4,
240 .rgb_timing.right_margin = 0x4,
241 .rgb_timing.upper_margin = 0x4,
242 .rgb_timing.lower_margin = 0x4,
243 .rgb_timing.hsync_len = 0x4,
244 .rgb_timing.vsync_len = 0x4,
245 .cpu_timing.cs_setup = 0,
246 .cpu_timing.wr_setup = 1,
247 .cpu_timing.wr_act = 0,
248 .cpu_timing.wr_hold = 0,
249 .lcd_size.width = 1280,
250 .lcd_size.height = 800,
253 static struct s5p_platform_mipi_dsim dsim_platform_data = {
255 .dsim_config = &dsim_info,
256 .dsim_lcd_config = &dsim_lcd_info,
258 .part_reset = s5p_dsim_part_reset,
259 .init_d_phy = s5p_dsim_init_d_phy,
260 .get_fb_frame_done = NULL,
264 * the stable time of needing to write data on SFR
265 * when the mipi mode becomes LP mode.
267 .delay_for_stabilization = 600,
270 static struct platform_device exynos_drm_device = {
271 .name = "exynos-drm",
273 .dma_mask = &exynos_drm_device.dev.coherent_dma_mask,
274 .coherent_dma_mask = 0xffffffffUL,
278 static void lcd_set_power(struct plat_lcd_data *pd,
281 if (of_machine_is_compatible("google,daisy") ||
282 of_machine_is_compatible("google,snow")) {
283 struct regulator *lcd_fet;
285 lcd_fet = regulator_get(NULL, "lcd_vdd");
286 if (!IS_ERR(lcd_fet)) {
288 regulator_enable(lcd_fet);
290 regulator_disable(lcd_fet);
292 regulator_put(lcd_fet);
296 /* TODO(dianders): GPX1(5) isn't reset for snow. Fix to hold high? */
300 gpio_request_one(EXYNOS5_GPX1(5), GPIOF_OUT_INIT_HIGH, "GPX1");
304 /* fire nRESET on power up */
305 gpio_set_value(EXYNOS5_GPX1(5), 0);
307 gpio_set_value(EXYNOS5_GPX1(5), 1);
309 gpio_free(EXYNOS5_GPX1(5));
311 /* fire nRESET on power off */
312 gpio_set_value(EXYNOS5_GPX1(5), 0);
314 gpio_set_value(EXYNOS5_GPX1(5), 1);
316 gpio_free(EXYNOS5_GPX1(5));
321 /* Turn on regulator for backlight */
322 if (of_machine_is_compatible("google,daisy") ||
323 of_machine_is_compatible("google,snow")) {
324 struct regulator *backlight_fet;
326 backlight_fet = regulator_get(NULL, "vcd_led");
327 if (!IS_ERR(backlight_fet)) {
329 regulator_enable(backlight_fet);
331 regulator_disable(backlight_fet);
333 regulator_put(backlight_fet);
335 /* Wait 10 ms between regulator on and PWM start per spec */
340 * Request lcd_bl_en GPIO for smdk5250_bl_notify().
341 * TODO: Fix this so we are not at risk of requesting the GPIO
342 * multiple times, this should be done with device tree, and
343 * likely integrated into the plat-samsung/dev-backlight.c init.
345 gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_LOW, "GPX3");
348 static int smdk5250_match_fb(struct plat_lcd_data *pd, struct fb_info *info)
350 /* Don't call .set_power callback while unblanking */
354 static struct plat_lcd_data smdk5250_lcd_data = {
355 .set_power = lcd_set_power,
356 .match_fb = smdk5250_match_fb,
359 static struct platform_device smdk5250_lcd = {
360 .name = "platform-lcd",
361 .dev.platform_data = &smdk5250_lcd_data,
364 static int smdk5250_bl_notify(struct device *unused, int brightness)
366 /* manage lcd_bl_en signal */
368 gpio_set_value(EXYNOS5_GPX3(0), 1);
370 gpio_set_value(EXYNOS5_GPX3(0), 0);
375 /* LCD Backlight data */
376 static struct samsung_bl_gpio_info smdk5250_bl_gpio_info = {
377 .no = EXYNOS5_GPB2(0),
378 .func = S3C_GPIO_SFN(2),
381 static struct platform_pwm_backlight_data smdk5250_bl_data = {
382 .pwm_period_ns = 1000000,
383 .notify = smdk5250_bl_notify,
386 struct platform_device exynos_device_md0 = {
387 .name = "exynos-mdev",
391 struct platform_device exynos_device_md1 = {
392 .name = "exynos-mdev",
396 struct platform_device exynos_device_md2 = {
397 .name = "exynos-mdev",
401 static struct regulator_consumer_supply wm8994_avdd1_supply =
402 REGULATOR_SUPPLY("AVDD1", "1-001a");
404 static struct regulator_consumer_supply wm8994_dcvdd_supply =
405 REGULATOR_SUPPLY("DCVDD", "1-001a");
407 static struct regulator_init_data wm8994_ldo1_data = {
411 .num_consumer_supplies = 1,
412 .consumer_supplies = &wm8994_avdd1_supply,
415 static struct regulator_init_data wm8994_ldo2_data = {
419 .num_consumer_supplies = 1,
420 .consumer_supplies = &wm8994_dcvdd_supply,
423 static struct wm8994_pdata wm8994_platform_data = {
424 /* configure gpio1 function: 0x0001(Logic level input/output) */
425 .gpio_defaults[0] = 0x0001,
426 /* If the i2s0 and i2s2 is enabled simultaneously */
427 .gpio_defaults[7] = 0x8100, /* GPIO8 DACDAT3 in */
428 .gpio_defaults[8] = 0x0100, /* GPIO9 ADCDAT3 out */
429 .gpio_defaults[9] = 0x0100, /* GPIO10 LRCLK3 out */
430 .gpio_defaults[10] = 0x0100,/* GPIO11 BCLK3 out */
431 .ldo[0] = { 0, &wm8994_ldo1_data },
432 .ldo[1] = { 0, &wm8994_ldo2_data },
435 static struct i2c_board_info i2c_devs1[] __initdata = {
437 I2C_BOARD_INFO("wm8994", 0x1a),
438 .platform_data = &wm8994_platform_data,
442 static struct s3c64xx_spi_csinfo spi1_csi[] = {
444 .line = EXYNOS5_GPA2(5),
449 static struct spi_board_info spi1_board_info[] __initdata = {
451 .modalias = "spidev",
452 .platform_data = NULL,
453 .max_speed_hz = 10*1000*1000,
457 .controller_data = spi1_csi,
461 struct sysmmu_platform_data platdata_sysmmu_mfc_l = {
463 .clockname = "sysmmu",
466 struct sysmmu_platform_data platdata_sysmmu_mfc_r = {
468 .clockname = "sysmmu",
471 struct sysmmu_platform_data platdata_sysmmu_gsc = {
473 .clockname = "sysmmu",
476 struct sysmmu_platform_data platdata_sysmmu_g2d = {
478 .clockname = "sysmmu",
481 struct sysmmu_platform_data platdata_sysmmu_fimd = {
483 .clockname = "sysmmu",
486 struct sysmmu_platform_data platdata_sysmmu_tv = {
488 .clockname = "sysmmu",
491 #ifdef CONFIG_VIDEO_FIMG2D4X
492 static struct fimg2d_platdata fimg2d_data __initdata = {
494 .gate_clkname = "fimg2d",
498 static struct exynos4_ohci_platdata smdk5250_ohci_pdata = {
499 .phy_init = s5p_usb_phy_init,
500 .phy_exit = s5p_usb_phy_exit,
503 static struct s5p_ehci_platdata smdk5250_ehci_pdata = {
504 .phy_init = s5p_usb_phy_init,
505 .phy_exit = s5p_usb_phy_exit,
508 static struct dwc3_exynos_data smdk5250_xhci_pdata = {
509 .phy_type = S5P_USB_PHY_DRD,
510 .phy_init = s5p_usb_phy_init,
511 .phy_exit = s5p_usb_phy_exit,
514 struct exynos_gpio_cfg {
520 static const char *rclksrc[] = {
525 static struct video_info smdk5250_dp_config = {
526 .name = "eDP-LVDS NXP PTN3460",
528 .h_sync_polarity = 0,
529 .v_sync_polarity = 0,
532 .color_space = COLOR_RGB,
533 .dynamic_range = VESA,
534 .ycbcr_coeff = COLOR_YCBCR601,
535 .color_depth = COLOR_8,
537 .link_rate = LINK_RATE_2_70GBPS,
538 .lane_count = LANE_COUNT2,
541 static struct exynos_dp_platdata smdk5250_dp_data __initdata = {
542 .video_info = &smdk5250_dp_config,
543 .training_type = HW_LINK_TRAINING,
544 .phy_init = s5p_dp_phy_init,
545 .phy_exit = s5p_dp_phy_exit,
548 static int exynos_cfg_i2s_gpio(struct platform_device *pdev)
551 /* configure GPIO for i2s port */
552 struct exynos_gpio_cfg exynos5_cfg[3] = {
553 { EXYNOS5_GPZ(0), 7, S3C_GPIO_SFN(2) },
554 { EXYNOS5_GPB0(0), 5, S3C_GPIO_SFN(2) },
555 { EXYNOS5_GPB1(0), 5, S3C_GPIO_SFN(2) }
558 if (pdev->dev.of_node) {
559 id = of_alias_get_id(pdev->dev.of_node, "i2s");
561 dev_err(&pdev->dev, "failed to get alias id:%d\n", id);
566 if (id < 0 || id > 2) {
567 printk(KERN_ERR "Invalid Device %d\n", id);
571 s3c_gpio_cfgpin_range(exynos5_cfg[id].addr,
572 exynos5_cfg[id].num, exynos5_cfg[id].bit);
577 static struct s3c_audio_pdata i2sv5_pdata = {
578 .cfg_gpio = exynos_cfg_i2s_gpio,
581 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
584 .idma_addr = EXYNOS4_AUDSS_INT_MEM,
589 * The following lookup table is used to override device names when devices
590 * are registered from device tree. This is temporarily added to enable
591 * device tree support addition for the EXYNOS5 architecture.
593 * For drivers that require platform data to be provided from the machine
594 * file, a platform data pointer can also be supplied along with the
595 * devices names. Usually, the platform data elements that cannot be parsed
596 * from the device tree by the drivers (example: function pointers) are
597 * supplied. But it should be noted that this is a temporary mechanism and
598 * at some point, the drivers should be capable of parsing all the platform
599 * data from the device tree.
601 static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
602 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
603 "exynos4210-uart.0", NULL),
604 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
605 "exynos4210-uart.1", NULL),
606 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
607 "exynos4210-uart.2", NULL),
608 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
609 "exynos4210-uart.3", NULL),
610 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
611 "s3c2440-i2c.0", NULL),
612 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
613 "s3c2440-i2c.1", NULL),
614 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
615 "s3c2440-i2c.2", NULL),
616 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
617 "s3c2440-i2c.3", NULL),
618 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
619 "s3c2440-i2c.4", NULL),
620 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
621 "s3c2440-i2c.5", NULL),
622 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
623 "s3c2440-i2c.6", NULL),
624 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
625 "s3c2440-i2c.7", NULL),
626 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(8),
627 "s3c2440-hdmiphy-i2c", NULL),
628 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
629 "exynos4210-spi.0", NULL),
630 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
631 "exynos4210-spi.1", NULL),
632 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
633 "exynos4210-spi.2", NULL),
634 OF_DEV_AUXDATA("synopsis,dw-mshc-exynos5250", 0x12200000,
636 OF_DEV_AUXDATA("synopsis,dw-mshc-exynos5250", 0x12210000,
638 OF_DEV_AUXDATA("synopsis,dw-mshc-exynos5250", 0x12220000,
640 OF_DEV_AUXDATA("synopsis,dw-mshc-exynos5250", 0x12230000,
642 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
643 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
644 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
645 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x10A60000,
646 "s5p-sysmmu.2", &platdata_sysmmu_g2d),
647 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x11210000,
648 "s5p-sysmmu.3", &platdata_sysmmu_mfc_l),
649 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x11200000,
650 "s5p-sysmmu.4", &platdata_sysmmu_mfc_r),
651 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x14640000,
652 "s5p-sysmmu.27", &platdata_sysmmu_fimd),
653 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x14650000,
654 "s5p-sysmmu.28", &platdata_sysmmu_tv),
655 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x13E80000,
656 "s5p-sysmmu.23", &platdata_sysmmu_gsc),
657 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x13E90000,
658 "s5p-sysmmu.24", &platdata_sysmmu_gsc),
659 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x13EA0000,
660 "s5p-sysmmu.25", &platdata_sysmmu_gsc),
661 OF_DEV_AUXDATA("samsung,s5p-sysmmu", 0x13EB0000,
662 "s5p-sysmmu.26", &platdata_sysmmu_gsc),
663 OF_DEV_AUXDATA("samsung,exynos5-fb", 0x14400000,
664 "exynos5-fb", &smdk5250_lcd1_pdata),
665 OF_DEV_AUXDATA("samsung,exynos5-mipi", 0x14500000,
666 "s5p-mipi-dsim", &dsim_platform_data),
667 OF_DEV_AUXDATA("samsung,exynos5-dp", 0x145B0000,
668 "s5p-dp", &smdk5250_dp_data),
669 OF_DEV_AUXDATA("samsung,s5p-mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
670 OF_DEV_AUXDATA("samsung,exynos-gsc", 0x13E00000,
671 "exynos-gsc.0", NULL),
672 OF_DEV_AUXDATA("samsung,exynos-gsc", 0x13E10000,
673 "exynos-gsc.1", NULL),
674 OF_DEV_AUXDATA("samsung,exynos-gsc", 0x13E20000,
675 "exynos-gsc.2", NULL),
676 OF_DEV_AUXDATA("samsung,exynos-gsc", 0x13E30000,
677 "exynos-gsc.3", NULL),
678 #ifdef CONFIG_VIDEO_FIMG2D4X
679 OF_DEV_AUXDATA("samsung,s5p-g2d", 0x10850000,
680 "s5p-g2d", &fimg2d_data),
682 OF_DEV_AUXDATA("samsung,exynos-ohci", 0x12120000,
683 "exynos-ohci", &smdk5250_ohci_pdata),
684 OF_DEV_AUXDATA("samsung,exynos-ehci", 0x12110000,
685 "s5p-ehci", &smdk5250_ehci_pdata),
686 OF_DEV_AUXDATA("samsung,exynos-xhci", 0x12000000,
687 "exynos-dwc3", &smdk5250_xhci_pdata),
688 OF_DEV_AUXDATA("samsung,i2s", 0x03830000,
689 "samsung-i2s.0", &i2sv5_pdata),
690 OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
691 "exynos5-hdmi", NULL),
692 OF_DEV_AUXDATA("samsung,s5p-mixer", 0x14450000, "s5p-mixer", NULL),
696 static struct platform_device *smdk5250_devices[] __initdata = {
697 &smdk5250_lcd, /* for platform_lcd device */
698 &exynos_device_md0, /* for media device framework */
699 &exynos_device_md1, /* for media device framework */
700 &exynos_device_md2, /* for media device framework */
701 &samsung_asoc_dma, /* for audio dma interface device */
705 static struct regulator_consumer_supply dummy_supplies[] = {
706 REGULATOR_SUPPLY("vddvario", "7000000.lan9215"),
707 REGULATOR_SUPPLY("vdd33a", "7000000.lan9215"),
710 static void __init exynos5250_dt_map_io(void)
712 exynos_init_io(NULL, 0);
713 s3c24xx_init_clocks(24000000);
716 static void __init exynos5_reserve(void)
718 /* required to have enough address range to remap the IOMMU
719 * allocated buffers */
720 init_consistent_dma_size(SZ_64M);
723 static void s5p_tv_setup(void)
725 /* direct HPD to HDMI chip */
726 gpio_request(EXYNOS5_GPX3(7), "hpd-plug");
728 gpio_direction_input(EXYNOS5_GPX3(7));
729 s3c_gpio_cfgpin(EXYNOS5_GPX3(7), S3C_GPIO_SFN(0x3));
730 s3c_gpio_setpull(EXYNOS5_GPX3(7), S3C_GPIO_PULL_NONE);
733 static void exynos5_i2c_setup(void)
735 /* Setup the low-speed i2c controller interrupts */
736 writel(0x0, EXYNOS5_SYS_I2C_CFG);
739 static void __init exynos5250_dt_machine_init(void)
741 struct device_node *srom_np, *np;
743 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
745 /* Setup pins for any SMSC 911x controller on the SROMC bus */
746 srom_np = of_find_node_by_path("/sromc-bus");
748 printk(KERN_ERR "No /sromc-bus property.\n");
751 for_each_child_of_node(srom_np, np) {
752 if (of_device_is_compatible(np, "smsc,lan9115")) {
754 of_property_read_u32(np, "reg", ®);
759 samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
762 * HACK ALERT! TODO: FIXME!
764 * We're going to hack in Daisy LCD info here for bringup purposes.
765 * Lots of things wrong with what we're doing here, but it works for
769 if (of_machine_is_compatible("google,daisy")) {
770 #ifdef CONFIG_DRM_EXYNOS_FIMD
771 smdk5250_lcd1_pdata.panel.timing.xres = 1366;
772 smdk5250_lcd1_pdata.panel.timing.yres = 768;
773 smdk5250_lcd1_pdata.panel_type = MIPI_LCD;
775 smdk5250_fb_win0.win_mode.xres = 1366;
776 smdk5250_fb_win0.win_mode.yres = 768;
777 smdk5250_fb_win0.virtual_x = 1366;
778 smdk5250_fb_win0.virtual_y = 768 * 2;
780 smdk5250_fb_win1.win_mode.xres = 1366;
781 smdk5250_fb_win1.win_mode.yres = 768;
782 smdk5250_fb_win1.virtual_x = 1366;
783 smdk5250_fb_win1.virtual_y = 768 * 2;
785 smdk5250_fb_win2.win_mode.xres = 1366;
786 smdk5250_fb_win2.win_mode.yres = 768;
787 smdk5250_fb_win2.virtual_x = 1366;
788 smdk5250_fb_win2.virtual_y = 768 * 2;
790 dsim_lcd_info.lcd_size.width = 1366;
791 dsim_lcd_info.lcd_size.height = 768;
792 } else if (of_machine_is_compatible("google,snow")) {
793 #ifdef CONFIG_DRM_EXYNOS_FIMD
794 smdk5250_lcd1_pdata.panel.timing = snow_fb_window;
795 smdk5250_lcd1_pdata.panel_type = DP_LCD;
796 smdk5250_lcd1_pdata.clock_rate = 267 * 1000 * 1000;
797 smdk5250_lcd1_pdata.vidcon1 = 0;
801 if (gpio_request_one(EXYNOS5_GPX2(6), GPIOF_OUT_INIT_HIGH,
802 "HOST_VBUS_CONTROL")) {
803 printk(KERN_ERR "failed to request gpio_host_vbus\n");
805 s3c_gpio_setpull(EXYNOS5_GPX2(6), S3C_GPIO_PULL_NONE);
806 gpio_free(EXYNOS5_GPX2(6));
812 * BIG HACK: The wm8994 is not device tree enabled apparently, so
813 * needs to be added manually. ...but it's only on SMDK5250.
815 if (of_machine_is_compatible("samsung,smdk5250")) {
816 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
819 spi_register_board_info(spi1_board_info, ARRAY_SIZE(spi1_board_info));
821 of_platform_populate(NULL, of_default_bus_match_table,
822 exynos5250_auxdata_lookup, NULL);
824 #ifdef CONFIG_DRM_EXYNOS_FIMD
825 if (of_machine_is_compatible("google,snow"))
826 exynos_dp_gpio_setup_24bpp();
828 exynos_fimd_gpio_setup_24bpp();
832 platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
834 of_node_put(srom_np);
838 static char const *exynos5250_dt_compat[] __initdata = {
839 "samsung,exynos5250",
843 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
844 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
845 .init_irq = exynos5_init_irq,
846 .reserve = exynos5_reserve,
847 .map_io = exynos5250_dt_map_io,
848 .handle_irq = gic_handle_irq,
849 .init_machine = exynos5250_dt_machine_init,
850 .timer = &exynos4_timer,
851 .dt_compat = exynos5250_dt_compat,
852 .restart = exynos5_restart,