arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/ata_platform.h>
  16 #include <linux/mtd/nand.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/clk-provider.h>
  19 #include <linux/spinlock.h>
  20 #include <net/dsa.h>
  21 #include <asm/page.h>
  22 #include <asm/timex.h>
  23 #include <asm/kexec.h>
  24 #include <asm/mach/map.h>
  25 #include <asm/mach/time.h>
  26 #include <mach/kirkwood.h>
  27 #include <mach/bridge-regs.h>
  28 #include <plat/audio.h>
  29 #include <plat/cache-feroceon-l2.h>
  30 #include <plat/mvsdio.h>
  31 #include <plat/orion_nand.h>
  32 #include <plat/ehci-orion.h>
  33 #include <plat/common.h>
  34 #include <plat/time.h>
  35 #include <plat/addr-map.h>
  36 #include <plat/mv_xor.h>
  37 #include "common.h"
  38
  39 /*****************************************************************************
  40  * I/O Address Mapping
  41  ****************************************************************************/
  42 static struct map_desc kirkwood_io_desc[] __initdata = {
  43         {
  44                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
  45                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  46                 .length         = KIRKWOOD_PCIE_IO_SIZE,
  47                 .type           = MT_DEVICE,
  48         }, {
  49                 .virtual        = KIRKWOOD_PCIE1_IO_VIRT_BASE,
  50                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
  51                 .length         = KIRKWOOD_PCIE1_IO_SIZE,
  52                 .type           = MT_DEVICE,
  53         }, {
  54                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
  55                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  56                 .length         = KIRKWOOD_REGS_SIZE,
  57                 .type           = MT_DEVICE,
  58         },
  59 };
  60
  61 void __init kirkwood_map_io(void)
  62 {
  63         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  64 }
  65
  66 /*****************************************************************************
  67  * CLK tree
  68  ****************************************************************************/
  69
  70 static void disable_sata0(void)
  71 {
  72         /* Disable PLL and IVREF */
  73         writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
  74         /* Disable PHY */
  75         writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
  76 }
  77
  78 static void disable_sata1(void)
  79 {
  80         /* Disable PLL and IVREF */
  81         writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
  82         /* Disable PHY */
  83         writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
  84 }
  85
  86 static void disable_pcie0(void)
  87 {
  88         writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
  89         while (1)
  90                 if (readl(PCIE_STATUS) & 0x1)
  91                         break;
  92         writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
  93 }
  94
  95 static void disable_pcie1(void)
  96 {
  97         u32 dev, rev;
  98
  99         kirkwood_pcie_id(&dev, &rev);
 100
 101         if (dev == MV88F6282_DEV_ID) {
 102                 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
 103                 while (1)
 104                         if (readl(PCIE1_STATUS) & 0x1)
 105                                 break;
 106                 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
 107         }
 108 }
 109
 110 /* An extended version of the gated clk. This calls fn() before
 111  * disabling the clock. We use this to turn off PHYs etc. */
 112 struct clk_gate_fn {
 113         struct clk_gate gate;
 114         void (*fn)(void);
 115 };
 116
 117 #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
 118 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
 119
 120 static void clk_gate_fn_disable(struct clk_hw *hw)
 121 {
 122         struct clk_gate *gate = to_clk_gate(hw);
 123         struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
 124
 125         if (gate_fn->fn)
 126                 gate_fn->fn();
 127
 128         clk_gate_ops.disable(hw);
 129 }
 130
 131 static struct clk_ops clk_gate_fn_ops;
 132
 133 static struct clk __init *clk_register_gate_fn(struct device *dev,
 134                 const char *name,
 135                 const char *parent_name, unsigned long flags,
 136                 void __iomem *reg, u8 bit_idx,
 137                 u8 clk_gate_flags, spinlock_t *lock,
 138                 void (*fn)(void))
 139 {
 140         struct clk_gate_fn *gate_fn;
 141         struct clk *clk;
 142         struct clk_init_data init;
 143
 144         gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);
 145         if (!gate_fn) {
 146                 pr_err("%s: could not allocate gated clk\n", __func__);
 147                 return ERR_PTR(-ENOMEM);
 148         }
 149
 150         init.name = name;
 151         init.ops = &clk_gate_fn_ops;
 152         init.flags = flags;
 153         init.parent_names = (parent_name ? &parent_name : NULL);
 154         init.num_parents = (parent_name ? 1 : 0);
 155
 156         /* struct clk_gate assignments */
 157         gate_fn->gate.reg = reg;
 158         gate_fn->gate.bit_idx = bit_idx;
 159         gate_fn->gate.flags = clk_gate_flags;
 160         gate_fn->gate.lock = lock;
 161         gate_fn->gate.hw.init = &init;
 162
 163         /* ops is the gate ops, but with our disable function */
 164         if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
 165                 clk_gate_fn_ops = clk_gate_ops;
 166                 clk_gate_fn_ops.disable = clk_gate_fn_disable;
 167         }
 168
 169         clk = clk_register(dev, &gate_fn->gate.hw);
 170
 171         if (IS_ERR(clk))
 172                 kfree(gate_fn);
 173
 174         return clk;
 175 }
 176
 177 static DEFINE_SPINLOCK(gating_lock);
 178 static struct clk *tclk;
 179
 180 static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
 181 {
 182         return clk_register_gate(NULL, name, "tclk", 0,
 183                                  (void __iomem *)CLOCK_GATING_CTRL,
 184                                  bit_idx, 0, &gating_lock);
 185 }
 186
 187 static struct clk __init *kirkwood_register_gate_fn(const char *name,
 188                                                     u8 bit_idx,
 189                                                     void (*fn)(void))
 190 {
 191         return clk_register_gate_fn(NULL, name, "tclk", 0,
 192                                     (void __iomem *)CLOCK_GATING_CTRL,
 193                                     bit_idx, 0, &gating_lock, fn);
 194 }
 195
 196 static struct clk *ge0, *ge1;
 197
 198 void __init kirkwood_clk_init(void)
 199 {
 200         struct clk *runit, *sata0, *sata1, *usb0, *sdio;
 201         struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
 202
 203         tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
 204                                        CLK_IS_ROOT, kirkwood_tclk);
 205
 206         runit = kirkwood_register_gate("runit",  CGC_BIT_RUNIT);
 207         ge0 = kirkwood_register_gate("ge0",    CGC_BIT_GE0);
 208         ge1 = kirkwood_register_gate("ge1",    CGC_BIT_GE1);
 209         sata0 = kirkwood_register_gate_fn("sata0",  CGC_BIT_SATA0,
 210                                           disable_sata0);
 211         sata1 = kirkwood_register_gate_fn("sata1",  CGC_BIT_SATA1,
 212                                           disable_sata1);
 213         usb0 = kirkwood_register_gate("usb0",   CGC_BIT_USB0);
 214         sdio = kirkwood_register_gate("sdio",   CGC_BIT_SDIO);
 215         crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
 216         xor0 = kirkwood_register_gate("xor0",   CGC_BIT_XOR0);
 217         xor1 = kirkwood_register_gate("xor1",   CGC_BIT_XOR1);
 218         pex0 = kirkwood_register_gate_fn("pex0",   CGC_BIT_PEX0,
 219                                          disable_pcie0);
 220         pex1 = kirkwood_register_gate_fn("pex1",   CGC_BIT_PEX1,
 221                                          disable_pcie1);
 222         audio = kirkwood_register_gate("audio",  CGC_BIT_AUDIO);
 223         kirkwood_register_gate("tdm",    CGC_BIT_TDM);
 224         kirkwood_register_gate("tsu",    CGC_BIT_TSU);
 225
 226         /* clkdev entries, mapping clks to devices */
 227         orion_clkdev_add(NULL, "orion_spi.0", runit);
 228         orion_clkdev_add(NULL, "orion_spi.1", runit);
 229         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
 230         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
 231         orion_clkdev_add(NULL, "orion_wdt", tclk);
 232         orion_clkdev_add("0", "sata_mv.0", sata0);
 233         orion_clkdev_add("1", "sata_mv.0", sata1);
 234         orion_clkdev_add(NULL, "orion-ehci.0", usb0);
 235         orion_clkdev_add(NULL, "orion_nand", runit);
 236         orion_clkdev_add(NULL, "mvsdio", sdio);
 237         orion_clkdev_add(NULL, "mv_crypto", crypto);
 238         orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
 239         orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
 240         orion_clkdev_add("0", "pcie", pex0);
 241         orion_clkdev_add("1", "pcie", pex1);
 242         orion_clkdev_add(NULL, "kirkwood-i2s", audio);
 243 }
 244
 245 /*****************************************************************************
 246  * EHCI0
 247  ****************************************************************************/
 248 void __init kirkwood_ehci_init(void)
 249 {
 250         orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
 251 }
 252
 253
 254 /*****************************************************************************
 255  * GE00
 256  ****************************************************************************/
 257 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 258 {
 259         orion_ge00_init(eth_data,
 260                         GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
 261                         IRQ_KIRKWOOD_GE00_ERR);
 262         /* The interface forgets the MAC address assigned by u-boot if
 263         the clock is turned off, so claim the clk now. */
 264         clk_prepare_enable(ge0);
 265 }
 266
 267
 268 /*****************************************************************************
 269  * GE01
 270  ****************************************************************************/
 271 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 272 {
 273         orion_ge01_init(eth_data,
 274                         GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 275                         IRQ_KIRKWOOD_GE01_ERR);
 276         clk_prepare_enable(ge1);
 277 }
 278
 279
 280 /*****************************************************************************
 281  * Ethernet switch
 282  ****************************************************************************/
 283 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 284 {
 285         orion_ge00_switch_init(d, irq);
 286 }
 287
 288
 289 /*****************************************************************************
 290  * NAND flash
 291  ****************************************************************************/
 292 static struct resource kirkwood_nand_resource = {
 293         .flags          = IORESOURCE_MEM,
 294         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 295         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 296                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 297 };
 298
 299 static struct orion_nand_data kirkwood_nand_data = {
 300         .cle            = 0,
 301         .ale            = 1,
 302         .width          = 8,
 303 };
 304
 305 static struct platform_device kirkwood_nand_flash = {
 306         .name           = "orion_nand",
 307         .id             = -1,
 308         .dev            = {
 309                 .platform_data  = &kirkwood_nand_data,
 310         },
 311         .resource       = &kirkwood_nand_resource,
 312         .num_resources  = 1,
 313 };
 314
 315 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 316                                int chip_delay)
 317 {
 318         kirkwood_nand_data.parts = parts;
 319         kirkwood_nand_data.nr_parts = nr_parts;
 320         kirkwood_nand_data.chip_delay = chip_delay;
 321         platform_device_register(&kirkwood_nand_flash);
 322 }
 323
 324 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
 325                                    int (*dev_ready)(struct mtd_info *))
 326 {
 327         kirkwood_nand_data.parts = parts;
 328         kirkwood_nand_data.nr_parts = nr_parts;
 329         kirkwood_nand_data.dev_ready = dev_ready;
 330         platform_device_register(&kirkwood_nand_flash);
 331 }
 332
 333 /*****************************************************************************
 334  * SoC RTC
 335  ****************************************************************************/
 336 static void __init kirkwood_rtc_init(void)
 337 {
 338         orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
 339 }
 340
 341
 342 /*****************************************************************************
 343  * SATA
 344  ****************************************************************************/
 345 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 346 {
 347         orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 348 }
 349
 350
 351 /*****************************************************************************
 352  * SD/SDIO/MMC
 353  ****************************************************************************/
 354 static struct resource mvsdio_resources[] = {
 355         [0] = {
 356                 .start  = SDIO_PHYS_BASE,
 357                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 358                 .flags  = IORESOURCE_MEM,
 359         },
 360         [1] = {
 361                 .start  = IRQ_KIRKWOOD_SDIO,
 362                 .end    = IRQ_KIRKWOOD_SDIO,
 363                 .flags  = IORESOURCE_IRQ,
 364         },
 365 };
 366
 367 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
 368
 369 static struct platform_device kirkwood_sdio = {
 370         .name           = "mvsdio",
 371         .id             = -1,
 372         .dev            = {
 373                 .dma_mask = &mvsdio_dmamask,
 374                 .coherent_dma_mask = DMA_BIT_MASK(32),
 375         },
 376         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 377         .resource       = mvsdio_resources,
 378 };
 379
 380 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 381 {
 382         u32 dev, rev;
 383
 384         kirkwood_pcie_id(&dev, &rev);
 385         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
 386                 mvsdio_data->clock = 100000000;
 387         else
 388                 mvsdio_data->clock = 200000000;
 389         kirkwood_sdio.dev.platform_data = mvsdio_data;
 390         platform_device_register(&kirkwood_sdio);
 391 }
 392
 393
 394 /*****************************************************************************
 395  * SPI
 396  ****************************************************************************/
 397 void __init kirkwood_spi_init()
 398 {
 399         orion_spi_init(SPI_PHYS_BASE);
 400 }
 401
 402
 403 /*****************************************************************************
 404  * I2C
 405  ****************************************************************************/
 406 void __init kirkwood_i2c_init(void)
 407 {
 408         orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
 409 }
 410
 411
 412 /*****************************************************************************
 413  * UART0
 414  ****************************************************************************/
 415
 416 void __init kirkwood_uart0_init(void)
 417 {
 418         orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
 419                          IRQ_KIRKWOOD_UART_0, tclk);
 420 }
 421
 422
 423 /*****************************************************************************
 424  * UART1
 425  ****************************************************************************/
 426 void __init kirkwood_uart1_init(void)
 427 {
 428         orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
 429                          IRQ_KIRKWOOD_UART_1, tclk);
 430 }
 431
 432 /*****************************************************************************
 433  * Cryptographic Engines and Security Accelerator (CESA)
 434  ****************************************************************************/
 435 void __init kirkwood_crypto_init(void)
 436 {
 437         orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
 438                           KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
 439 }
 440
 441
 442 /*****************************************************************************
 443  * XOR0
 444  ****************************************************************************/
 445 void __init kirkwood_xor0_init(void)
 446 {
 447         orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 448                         IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 449 }
 450
 451
 452 /*****************************************************************************
 453  * XOR1
 454  ****************************************************************************/
 455 void __init kirkwood_xor1_init(void)
 456 {
 457         orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
 458                         IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
 459 }
 460
 461
 462 /*****************************************************************************
 463  * Watchdog
 464  ****************************************************************************/
 465 void __init kirkwood_wdt_init(void)
 466 {
 467         orion_wdt_init();
 468 }
 469
 470
 471 /*****************************************************************************
 472  * Time handling
 473  ****************************************************************************/
 474 void __init kirkwood_init_early(void)
 475 {
 476         orion_time_set_base(TIMER_VIRT_BASE);
 477 }
 478
 479 int kirkwood_tclk;
 480
 481 static int __init kirkwood_find_tclk(void)
 482 {
 483         u32 dev, rev;
 484
 485         kirkwood_pcie_id(&dev, &rev);
 486
 487         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
 488                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
 489                         return 200000000;
 490
 491         return 166666667;
 492 }
 493
 494 static void __init kirkwood_timer_init(void)
 495 {
 496         kirkwood_tclk = kirkwood_find_tclk();
 497
 498         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 499                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 500 }
 501
 502 struct sys_timer kirkwood_timer = {
 503         .init = kirkwood_timer_init,
 504 };
 505
 506 /*****************************************************************************
 507  * Audio
 508  ****************************************************************************/
 509 static struct resource kirkwood_i2s_resources[] = {
 510         [0] = {
 511                 .start  = AUDIO_PHYS_BASE,
 512                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
 513                 .flags  = IORESOURCE_MEM,
 514         },
 515         [1] = {
 516                 .start  = IRQ_KIRKWOOD_I2S,
 517                 .end    = IRQ_KIRKWOOD_I2S,
 518                 .flags  = IORESOURCE_IRQ,
 519         },
 520 };
 521
 522 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
 523         .burst       = 128,
 524 };
 525
 526 static struct platform_device kirkwood_i2s_device = {
 527         .name           = "kirkwood-i2s",
 528         .id             = -1,
 529         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
 530         .resource       = kirkwood_i2s_resources,
 531         .dev            = {
 532                 .platform_data  = &kirkwood_i2s_data,
 533         },
 534 };
 535
 536 static struct platform_device kirkwood_pcm_device = {
 537         .name           = "kirkwood-pcm-audio",
 538         .id             = -1,
 539 };
 540
 541 void __init kirkwood_audio_init(void)
 542 {
 543         platform_device_register(&kirkwood_i2s_device);
 544         platform_device_register(&kirkwood_pcm_device);
 545 }
 546
 547 /*****************************************************************************
 548  * General
 549  ****************************************************************************/
 550 /*
 551  * Identify device ID and revision.
 552  */
 553 char * __init kirkwood_id(void)
 554 {
 555         u32 dev, rev;
 556
 557         kirkwood_pcie_id(&dev, &rev);
 558
 559         if (dev == MV88F6281_DEV_ID) {
 560                 if (rev == MV88F6281_REV_Z0)
 561                         return "MV88F6281-Z0";
 562                 else if (rev == MV88F6281_REV_A0)
 563                         return "MV88F6281-A0";
 564                 else if (rev == MV88F6281_REV_A1)
 565                         return "MV88F6281-A1";
 566                 else
 567                         return "MV88F6281-Rev-Unsupported";
 568         } else if (dev == MV88F6192_DEV_ID) {
 569                 if (rev == MV88F6192_REV_Z0)
 570                         return "MV88F6192-Z0";
 571                 else if (rev == MV88F6192_REV_A0)
 572                         return "MV88F6192-A0";
 573                 else if (rev == MV88F6192_REV_A1)
 574                         return "MV88F6192-A1";
 575                 else
 576                         return "MV88F6192-Rev-Unsupported";
 577         } else if (dev == MV88F6180_DEV_ID) {
 578                 if (rev == MV88F6180_REV_A0)
 579                         return "MV88F6180-Rev-A0";
 580                 else if (rev == MV88F6180_REV_A1)
 581                         return "MV88F6180-Rev-A1";
 582                 else
 583                         return "MV88F6180-Rev-Unsupported";
 584         } else if (dev == MV88F6282_DEV_ID) {
 585                 if (rev == MV88F6282_REV_A0)
 586                         return "MV88F6282-Rev-A0";
 587                 else if (rev == MV88F6282_REV_A1)
 588                         return "MV88F6282-Rev-A1";
 589                 else
 590                         return "MV88F6282-Rev-Unsupported";
 591         } else {
 592                 return "Device-Unknown";
 593         }
 594 }
 595
 596 void __init kirkwood_l2_init(void)
 597 {
 598 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 599         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 600         feroceon_l2_init(1);
 601 #else
 602         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 603         feroceon_l2_init(0);
 604 #endif
 605 }
 606
 607 void __init kirkwood_init(void)
 608 {
 609         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
 610                 kirkwood_id(), kirkwood_tclk);
 611
 612         /*
 613          * Disable propagation of mbus errors to the CPU local bus,
 614          * as this causes mbus errors (which can occur for example
 615          * for PCI aborts) to throw CPU aborts, which we're not set
 616          * up to deal with.
 617          */
 618         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 619
 620         kirkwood_setup_cpu_mbus();
 621
 622 #ifdef CONFIG_CACHE_FEROCEON_L2
 623         kirkwood_l2_init();
 624 #endif
 625
 626         /* Setup root of clk tree */
 627         kirkwood_clk_init();
 628
 629         /* internal devices that every board has */
 630         kirkwood_rtc_init();
 631         kirkwood_wdt_init();
 632         kirkwood_xor0_init();
 633         kirkwood_xor1_init();
 634         kirkwood_crypto_init();
 635
 636 #ifdef CONFIG_KEXEC
 637         kexec_reinit = kirkwood_enable_pcie;
 638 #endif
 639 }
 640
 641 void kirkwood_restart(char mode, const char *cmd)
 642 {
 643         /*
 644          * Enable soft reset to assert RSTOUTn.
 645          */
 646         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 647
 648         /*
 649          * Assert soft reset.
 650          */
 651         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 652
 653         while (1)
 654                 ;
 655 }