2 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
4 * Copyright (C) 2009-2011 Nokia Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
14 #include <plat/omap_hwmod.h>
15 #include <mach/irqs.h>
18 #include <plat/serial.h>
20 #include <plat/gpio.h>
21 #include <plat/mcbsp.h>
22 #include <plat/mcspi.h>
23 #include <plat/dmtimer.h>
25 #include <plat/l3_2xxx.h>
27 #include "omap_hwmod_common_data.h"
29 #include "prm-regbits-24xx.h"
30 #include "cm-regbits-24xx.h"
34 * OMAP2430 hardware module integration data
36 * ALl of the data in this section should be autogeneratable from the
37 * TI hardware database or other technical documentation. Data that
38 * is driver-specific or driver-kernel integration-specific belongs
42 static struct omap_hwmod omap2430_mpu_hwmod;
43 static struct omap_hwmod omap2430_iva_hwmod;
44 static struct omap_hwmod omap2430_l3_main_hwmod;
45 static struct omap_hwmod omap2430_l4_core_hwmod;
46 static struct omap_hwmod omap2430_dss_core_hwmod;
47 static struct omap_hwmod omap2430_dss_dispc_hwmod;
48 static struct omap_hwmod omap2430_dss_rfbi_hwmod;
49 static struct omap_hwmod omap2430_dss_venc_hwmod;
50 static struct omap_hwmod omap2430_wd_timer2_hwmod;
51 static struct omap_hwmod omap2430_gpio1_hwmod;
52 static struct omap_hwmod omap2430_gpio2_hwmod;
53 static struct omap_hwmod omap2430_gpio3_hwmod;
54 static struct omap_hwmod omap2430_gpio4_hwmod;
55 static struct omap_hwmod omap2430_gpio5_hwmod;
56 static struct omap_hwmod omap2430_dma_system_hwmod;
57 static struct omap_hwmod omap2430_mcbsp1_hwmod;
58 static struct omap_hwmod omap2430_mcbsp2_hwmod;
59 static struct omap_hwmod omap2430_mcbsp3_hwmod;
60 static struct omap_hwmod omap2430_mcbsp4_hwmod;
61 static struct omap_hwmod omap2430_mcbsp5_hwmod;
62 static struct omap_hwmod omap2430_mcspi1_hwmod;
63 static struct omap_hwmod omap2430_mcspi2_hwmod;
64 static struct omap_hwmod omap2430_mcspi3_hwmod;
65 static struct omap_hwmod omap2430_mmc1_hwmod;
66 static struct omap_hwmod omap2430_mmc2_hwmod;
68 /* L3 -> L4_CORE interface */
69 static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
70 .master = &omap2430_l3_main_hwmod,
71 .slave = &omap2430_l4_core_hwmod,
72 .user = OCP_USER_MPU | OCP_USER_SDMA,
75 /* MPU -> L3 interface */
76 static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
77 .master = &omap2430_mpu_hwmod,
78 .slave = &omap2430_l3_main_hwmod,
82 /* Slave interfaces on the L3 interconnect */
83 static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
84 &omap2430_mpu__l3_main,
88 static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
89 .master = &omap2430_dss_core_hwmod,
90 .slave = &omap2430_l3_main_hwmod,
93 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
94 .flags = OMAP_FIREWALL_L3,
97 .user = OCP_USER_MPU | OCP_USER_SDMA,
100 /* Master interfaces on the L3 interconnect */
101 static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
102 &omap2430_l3_main__l4_core,
106 static struct omap_hwmod omap2430_l3_main_hwmod = {
108 .class = &l3_hwmod_class,
109 .masters = omap2430_l3_main_masters,
110 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
111 .slaves = omap2430_l3_main_slaves,
112 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
113 .flags = HWMOD_NO_IDLEST,
116 static struct omap_hwmod omap2430_l4_wkup_hwmod;
117 static struct omap_hwmod omap2430_uart1_hwmod;
118 static struct omap_hwmod omap2430_uart2_hwmod;
119 static struct omap_hwmod omap2430_uart3_hwmod;
120 static struct omap_hwmod omap2430_i2c1_hwmod;
121 static struct omap_hwmod omap2430_i2c2_hwmod;
123 static struct omap_hwmod omap2430_usbhsotg_hwmod;
125 /* l3_core -> usbhsotg interface */
126 static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
127 .master = &omap2430_usbhsotg_hwmod,
128 .slave = &omap2430_l3_main_hwmod,
130 .user = OCP_USER_MPU,
133 /* L4 CORE -> I2C1 interface */
134 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
135 .master = &omap2430_l4_core_hwmod,
136 .slave = &omap2430_i2c1_hwmod,
138 .addr = omap2_i2c1_addr_space,
139 .user = OCP_USER_MPU | OCP_USER_SDMA,
142 /* L4 CORE -> I2C2 interface */
143 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
144 .master = &omap2430_l4_core_hwmod,
145 .slave = &omap2430_i2c2_hwmod,
147 .addr = omap2_i2c2_addr_space,
148 .user = OCP_USER_MPU | OCP_USER_SDMA,
151 /* L4_CORE -> L4_WKUP interface */
152 static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
153 .master = &omap2430_l4_core_hwmod,
154 .slave = &omap2430_l4_wkup_hwmod,
155 .user = OCP_USER_MPU | OCP_USER_SDMA,
158 /* L4 CORE -> UART1 interface */
159 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
160 .master = &omap2430_l4_core_hwmod,
161 .slave = &omap2430_uart1_hwmod,
163 .addr = omap2xxx_uart1_addr_space,
164 .user = OCP_USER_MPU | OCP_USER_SDMA,
167 /* L4 CORE -> UART2 interface */
168 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
169 .master = &omap2430_l4_core_hwmod,
170 .slave = &omap2430_uart2_hwmod,
172 .addr = omap2xxx_uart2_addr_space,
173 .user = OCP_USER_MPU | OCP_USER_SDMA,
176 /* L4 PER -> UART3 interface */
177 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
178 .master = &omap2430_l4_core_hwmod,
179 .slave = &omap2430_uart3_hwmod,
181 .addr = omap2xxx_uart3_addr_space,
182 .user = OCP_USER_MPU | OCP_USER_SDMA,
186 * usbhsotg interface data
188 static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
190 .pa_start = OMAP243X_HS_BASE,
191 .pa_end = OMAP243X_HS_BASE + SZ_4K - 1,
192 .flags = ADDR_TYPE_RT
197 /* l4_core ->usbhsotg interface */
198 static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {
199 .master = &omap2430_l4_core_hwmod,
200 .slave = &omap2430_usbhsotg_hwmod,
202 .addr = omap2430_usbhsotg_addrs,
203 .user = OCP_USER_MPU,
206 static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = {
207 &omap2430_usbhsotg__l3,
210 static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
211 &omap2430_l4_core__usbhsotg,
214 /* L4 CORE -> MMC1 interface */
215 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
216 .master = &omap2430_l4_core_hwmod,
217 .slave = &omap2430_mmc1_hwmod,
219 .addr = omap2430_mmc1_addr_space,
220 .user = OCP_USER_MPU | OCP_USER_SDMA,
223 /* L4 CORE -> MMC2 interface */
224 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
225 .master = &omap2430_l4_core_hwmod,
226 .slave = &omap2430_mmc2_hwmod,
228 .addr = omap2430_mmc2_addr_space,
229 .user = OCP_USER_MPU | OCP_USER_SDMA,
232 /* Slave interfaces on the L4_CORE interconnect */
233 static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
234 &omap2430_l3_main__l4_core,
237 /* Master interfaces on the L4_CORE interconnect */
238 static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
239 &omap2430_l4_core__l4_wkup,
240 &omap2430_l4_core__mmc1,
241 &omap2430_l4_core__mmc2,
245 static struct omap_hwmod omap2430_l4_core_hwmod = {
247 .class = &l4_hwmod_class,
248 .masters = omap2430_l4_core_masters,
249 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
250 .slaves = omap2430_l4_core_slaves,
251 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
252 .flags = HWMOD_NO_IDLEST,
255 /* Slave interfaces on the L4_WKUP interconnect */
256 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
257 &omap2430_l4_core__l4_wkup,
258 &omap2_l4_core__uart1,
259 &omap2_l4_core__uart2,
260 &omap2_l4_core__uart3,
263 /* Master interfaces on the L4_WKUP interconnect */
264 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
267 /* l4 core -> mcspi1 interface */
268 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
269 .master = &omap2430_l4_core_hwmod,
270 .slave = &omap2430_mcspi1_hwmod,
272 .addr = omap2_mcspi1_addr_space,
273 .user = OCP_USER_MPU | OCP_USER_SDMA,
276 /* l4 core -> mcspi2 interface */
277 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
278 .master = &omap2430_l4_core_hwmod,
279 .slave = &omap2430_mcspi2_hwmod,
281 .addr = omap2_mcspi2_addr_space,
282 .user = OCP_USER_MPU | OCP_USER_SDMA,
285 /* l4 core -> mcspi3 interface */
286 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
287 .master = &omap2430_l4_core_hwmod,
288 .slave = &omap2430_mcspi3_hwmod,
290 .addr = omap2430_mcspi3_addr_space,
291 .user = OCP_USER_MPU | OCP_USER_SDMA,
295 static struct omap_hwmod omap2430_l4_wkup_hwmod = {
297 .class = &l4_hwmod_class,
298 .masters = omap2430_l4_wkup_masters,
299 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
300 .slaves = omap2430_l4_wkup_slaves,
301 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
302 .flags = HWMOD_NO_IDLEST,
305 /* Master interfaces on the MPU device */
306 static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
307 &omap2430_mpu__l3_main,
311 static struct omap_hwmod omap2430_mpu_hwmod = {
313 .class = &mpu_hwmod_class,
314 .main_clk = "mpu_ck",
315 .masters = omap2430_mpu_masters,
316 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
320 * IVA2_1 interface data
323 /* IVA2 <- L3 interface */
324 static struct omap_hwmod_ocp_if omap2430_l3__iva = {
325 .master = &omap2430_l3_main_hwmod,
326 .slave = &omap2430_iva_hwmod,
328 .user = OCP_USER_MPU | OCP_USER_SDMA,
331 static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
339 static struct omap_hwmod omap2430_iva_hwmod = {
341 .class = &iva_hwmod_class,
342 .masters = omap2430_iva_masters,
343 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters),
346 /* always-on timers dev attribute */
347 static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
348 .timer_capability = OMAP_TIMER_ALWON,
351 /* pwm timers dev attribute */
352 static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
353 .timer_capability = OMAP_TIMER_HAS_PWM,
357 static struct omap_hwmod omap2430_timer1_hwmod;
359 static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
361 .pa_start = 0x49018000,
362 .pa_end = 0x49018000 + SZ_1K - 1,
363 .flags = ADDR_TYPE_RT
368 /* l4_wkup -> timer1 */
369 static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
370 .master = &omap2430_l4_wkup_hwmod,
371 .slave = &omap2430_timer1_hwmod,
373 .addr = omap2430_timer1_addrs,
374 .user = OCP_USER_MPU | OCP_USER_SDMA,
377 /* timer1 slave port */
378 static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
379 &omap2430_l4_wkup__timer1,
383 static struct omap_hwmod omap2430_timer1_hwmod = {
385 .mpu_irqs = omap2_timer1_mpu_irqs,
386 .main_clk = "gpt1_fck",
390 .module_bit = OMAP24XX_EN_GPT1_SHIFT,
391 .module_offs = WKUP_MOD,
393 .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
396 .dev_attr = &capability_alwon_dev_attr,
397 .slaves = omap2430_timer1_slaves,
398 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
399 .class = &omap2xxx_timer_hwmod_class,
403 static struct omap_hwmod omap2430_timer2_hwmod;
405 /* l4_core -> timer2 */
406 static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
407 .master = &omap2430_l4_core_hwmod,
408 .slave = &omap2430_timer2_hwmod,
410 .addr = omap2xxx_timer2_addrs,
411 .user = OCP_USER_MPU | OCP_USER_SDMA,
414 /* timer2 slave port */
415 static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
416 &omap2430_l4_core__timer2,
420 static struct omap_hwmod omap2430_timer2_hwmod = {
422 .mpu_irqs = omap2_timer2_mpu_irqs,
423 .main_clk = "gpt2_fck",
427 .module_bit = OMAP24XX_EN_GPT2_SHIFT,
428 .module_offs = CORE_MOD,
430 .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
433 .dev_attr = &capability_alwon_dev_attr,
434 .slaves = omap2430_timer2_slaves,
435 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
436 .class = &omap2xxx_timer_hwmod_class,
440 static struct omap_hwmod omap2430_timer3_hwmod;
442 /* l4_core -> timer3 */
443 static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
444 .master = &omap2430_l4_core_hwmod,
445 .slave = &omap2430_timer3_hwmod,
447 .addr = omap2xxx_timer3_addrs,
448 .user = OCP_USER_MPU | OCP_USER_SDMA,
451 /* timer3 slave port */
452 static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
453 &omap2430_l4_core__timer3,
457 static struct omap_hwmod omap2430_timer3_hwmod = {
459 .mpu_irqs = omap2_timer3_mpu_irqs,
460 .main_clk = "gpt3_fck",
464 .module_bit = OMAP24XX_EN_GPT3_SHIFT,
465 .module_offs = CORE_MOD,
467 .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
470 .dev_attr = &capability_alwon_dev_attr,
471 .slaves = omap2430_timer3_slaves,
472 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
473 .class = &omap2xxx_timer_hwmod_class,
477 static struct omap_hwmod omap2430_timer4_hwmod;
479 /* l4_core -> timer4 */
480 static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
481 .master = &omap2430_l4_core_hwmod,
482 .slave = &omap2430_timer4_hwmod,
484 .addr = omap2xxx_timer4_addrs,
485 .user = OCP_USER_MPU | OCP_USER_SDMA,
488 /* timer4 slave port */
489 static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
490 &omap2430_l4_core__timer4,
494 static struct omap_hwmod omap2430_timer4_hwmod = {
496 .mpu_irqs = omap2_timer4_mpu_irqs,
497 .main_clk = "gpt4_fck",
501 .module_bit = OMAP24XX_EN_GPT4_SHIFT,
502 .module_offs = CORE_MOD,
504 .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
507 .dev_attr = &capability_alwon_dev_attr,
508 .slaves = omap2430_timer4_slaves,
509 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
510 .class = &omap2xxx_timer_hwmod_class,
514 static struct omap_hwmod omap2430_timer5_hwmod;
516 /* l4_core -> timer5 */
517 static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
518 .master = &omap2430_l4_core_hwmod,
519 .slave = &omap2430_timer5_hwmod,
521 .addr = omap2xxx_timer5_addrs,
522 .user = OCP_USER_MPU | OCP_USER_SDMA,
525 /* timer5 slave port */
526 static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
527 &omap2430_l4_core__timer5,
531 static struct omap_hwmod omap2430_timer5_hwmod = {
533 .mpu_irqs = omap2_timer5_mpu_irqs,
534 .main_clk = "gpt5_fck",
538 .module_bit = OMAP24XX_EN_GPT5_SHIFT,
539 .module_offs = CORE_MOD,
541 .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
544 .dev_attr = &capability_alwon_dev_attr,
545 .slaves = omap2430_timer5_slaves,
546 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
547 .class = &omap2xxx_timer_hwmod_class,
551 static struct omap_hwmod omap2430_timer6_hwmod;
553 /* l4_core -> timer6 */
554 static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
555 .master = &omap2430_l4_core_hwmod,
556 .slave = &omap2430_timer6_hwmod,
558 .addr = omap2xxx_timer6_addrs,
559 .user = OCP_USER_MPU | OCP_USER_SDMA,
562 /* timer6 slave port */
563 static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
564 &omap2430_l4_core__timer6,
568 static struct omap_hwmod omap2430_timer6_hwmod = {
570 .mpu_irqs = omap2_timer6_mpu_irqs,
571 .main_clk = "gpt6_fck",
575 .module_bit = OMAP24XX_EN_GPT6_SHIFT,
576 .module_offs = CORE_MOD,
578 .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
581 .dev_attr = &capability_alwon_dev_attr,
582 .slaves = omap2430_timer6_slaves,
583 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
584 .class = &omap2xxx_timer_hwmod_class,
588 static struct omap_hwmod omap2430_timer7_hwmod;
590 /* l4_core -> timer7 */
591 static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
592 .master = &omap2430_l4_core_hwmod,
593 .slave = &omap2430_timer7_hwmod,
595 .addr = omap2xxx_timer7_addrs,
596 .user = OCP_USER_MPU | OCP_USER_SDMA,
599 /* timer7 slave port */
600 static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
601 &omap2430_l4_core__timer7,
605 static struct omap_hwmod omap2430_timer7_hwmod = {
607 .mpu_irqs = omap2_timer7_mpu_irqs,
608 .main_clk = "gpt7_fck",
612 .module_bit = OMAP24XX_EN_GPT7_SHIFT,
613 .module_offs = CORE_MOD,
615 .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
618 .dev_attr = &capability_alwon_dev_attr,
619 .slaves = omap2430_timer7_slaves,
620 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
621 .class = &omap2xxx_timer_hwmod_class,
625 static struct omap_hwmod omap2430_timer8_hwmod;
627 /* l4_core -> timer8 */
628 static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
629 .master = &omap2430_l4_core_hwmod,
630 .slave = &omap2430_timer8_hwmod,
632 .addr = omap2xxx_timer8_addrs,
633 .user = OCP_USER_MPU | OCP_USER_SDMA,
636 /* timer8 slave port */
637 static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
638 &omap2430_l4_core__timer8,
642 static struct omap_hwmod omap2430_timer8_hwmod = {
644 .mpu_irqs = omap2_timer8_mpu_irqs,
645 .main_clk = "gpt8_fck",
649 .module_bit = OMAP24XX_EN_GPT8_SHIFT,
650 .module_offs = CORE_MOD,
652 .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
655 .dev_attr = &capability_alwon_dev_attr,
656 .slaves = omap2430_timer8_slaves,
657 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
658 .class = &omap2xxx_timer_hwmod_class,
662 static struct omap_hwmod omap2430_timer9_hwmod;
664 /* l4_core -> timer9 */
665 static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
666 .master = &omap2430_l4_core_hwmod,
667 .slave = &omap2430_timer9_hwmod,
669 .addr = omap2xxx_timer9_addrs,
670 .user = OCP_USER_MPU | OCP_USER_SDMA,
673 /* timer9 slave port */
674 static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
675 &omap2430_l4_core__timer9,
679 static struct omap_hwmod omap2430_timer9_hwmod = {
681 .mpu_irqs = omap2_timer9_mpu_irqs,
682 .main_clk = "gpt9_fck",
686 .module_bit = OMAP24XX_EN_GPT9_SHIFT,
687 .module_offs = CORE_MOD,
689 .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
692 .dev_attr = &capability_pwm_dev_attr,
693 .slaves = omap2430_timer9_slaves,
694 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
695 .class = &omap2xxx_timer_hwmod_class,
699 static struct omap_hwmod omap2430_timer10_hwmod;
701 /* l4_core -> timer10 */
702 static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
703 .master = &omap2430_l4_core_hwmod,
704 .slave = &omap2430_timer10_hwmod,
706 .addr = omap2_timer10_addrs,
707 .user = OCP_USER_MPU | OCP_USER_SDMA,
710 /* timer10 slave port */
711 static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
712 &omap2430_l4_core__timer10,
716 static struct omap_hwmod omap2430_timer10_hwmod = {
718 .mpu_irqs = omap2_timer10_mpu_irqs,
719 .main_clk = "gpt10_fck",
723 .module_bit = OMAP24XX_EN_GPT10_SHIFT,
724 .module_offs = CORE_MOD,
726 .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
729 .dev_attr = &capability_pwm_dev_attr,
730 .slaves = omap2430_timer10_slaves,
731 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
732 .class = &omap2xxx_timer_hwmod_class,
736 static struct omap_hwmod omap2430_timer11_hwmod;
738 /* l4_core -> timer11 */
739 static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
740 .master = &omap2430_l4_core_hwmod,
741 .slave = &omap2430_timer11_hwmod,
743 .addr = omap2_timer11_addrs,
744 .user = OCP_USER_MPU | OCP_USER_SDMA,
747 /* timer11 slave port */
748 static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
749 &omap2430_l4_core__timer11,
753 static struct omap_hwmod omap2430_timer11_hwmod = {
755 .mpu_irqs = omap2_timer11_mpu_irqs,
756 .main_clk = "gpt11_fck",
760 .module_bit = OMAP24XX_EN_GPT11_SHIFT,
761 .module_offs = CORE_MOD,
763 .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
766 .dev_attr = &capability_pwm_dev_attr,
767 .slaves = omap2430_timer11_slaves,
768 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
769 .class = &omap2xxx_timer_hwmod_class,
773 static struct omap_hwmod omap2430_timer12_hwmod;
775 /* l4_core -> timer12 */
776 static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
777 .master = &omap2430_l4_core_hwmod,
778 .slave = &omap2430_timer12_hwmod,
780 .addr = omap2xxx_timer12_addrs,
781 .user = OCP_USER_MPU | OCP_USER_SDMA,
784 /* timer12 slave port */
785 static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
786 &omap2430_l4_core__timer12,
790 static struct omap_hwmod omap2430_timer12_hwmod = {
792 .mpu_irqs = omap2xxx_timer12_mpu_irqs,
793 .main_clk = "gpt12_fck",
797 .module_bit = OMAP24XX_EN_GPT12_SHIFT,
798 .module_offs = CORE_MOD,
800 .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
803 .dev_attr = &capability_pwm_dev_attr,
804 .slaves = omap2430_timer12_slaves,
805 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
806 .class = &omap2xxx_timer_hwmod_class,
809 /* l4_wkup -> wd_timer2 */
810 static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
812 .pa_start = 0x49016000,
813 .pa_end = 0x4901607f,
814 .flags = ADDR_TYPE_RT
819 static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
820 .master = &omap2430_l4_wkup_hwmod,
821 .slave = &omap2430_wd_timer2_hwmod,
822 .clk = "mpu_wdt_ick",
823 .addr = omap2430_wd_timer2_addrs,
824 .user = OCP_USER_MPU | OCP_USER_SDMA,
828 static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
829 &omap2430_l4_wkup__wd_timer2,
832 static struct omap_hwmod omap2430_wd_timer2_hwmod = {
834 .class = &omap2xxx_wd_timer_hwmod_class,
835 .main_clk = "mpu_wdt_fck",
839 .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
840 .module_offs = WKUP_MOD,
842 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
845 .slaves = omap2430_wd_timer2_slaves,
846 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
851 static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
852 &omap2_l4_core__uart1,
855 static struct omap_hwmod omap2430_uart1_hwmod = {
857 .mpu_irqs = omap2_uart1_mpu_irqs,
858 .sdma_reqs = omap2_uart1_sdma_reqs,
859 .main_clk = "uart1_fck",
862 .module_offs = CORE_MOD,
864 .module_bit = OMAP24XX_EN_UART1_SHIFT,
866 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
869 .slaves = omap2430_uart1_slaves,
870 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
871 .class = &omap2_uart_class,
876 static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
877 &omap2_l4_core__uart2,
880 static struct omap_hwmod omap2430_uart2_hwmod = {
882 .mpu_irqs = omap2_uart2_mpu_irqs,
883 .sdma_reqs = omap2_uart2_sdma_reqs,
884 .main_clk = "uart2_fck",
887 .module_offs = CORE_MOD,
889 .module_bit = OMAP24XX_EN_UART2_SHIFT,
891 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
894 .slaves = omap2430_uart2_slaves,
895 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
896 .class = &omap2_uart_class,
901 static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
902 &omap2_l4_core__uart3,
905 static struct omap_hwmod omap2430_uart3_hwmod = {
907 .mpu_irqs = omap2_uart3_mpu_irqs,
908 .sdma_reqs = omap2_uart3_sdma_reqs,
909 .main_clk = "uart3_fck",
912 .module_offs = CORE_MOD,
914 .module_bit = OMAP24XX_EN_UART3_SHIFT,
916 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
919 .slaves = omap2430_uart3_slaves,
920 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
921 .class = &omap2_uart_class,
925 /* dss master ports */
926 static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
931 static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
932 .master = &omap2430_l4_core_hwmod,
933 .slave = &omap2430_dss_core_hwmod,
935 .addr = omap2_dss_addrs,
936 .user = OCP_USER_MPU | OCP_USER_SDMA,
939 /* dss slave ports */
940 static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
941 &omap2430_l4_core__dss,
944 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
945 { .role = "tv_clk", .clk = "dss_54m_fck" },
946 { .role = "sys_clk", .clk = "dss2_fck" },
949 static struct omap_hwmod omap2430_dss_core_hwmod = {
951 .class = &omap2_dss_hwmod_class,
952 .main_clk = "dss1_fck", /* instead of dss_fck */
953 .sdma_reqs = omap2xxx_dss_sdma_chs,
957 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
958 .module_offs = CORE_MOD,
960 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
963 .opt_clks = dss_opt_clks,
964 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
965 .slaves = omap2430_dss_slaves,
966 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
967 .masters = omap2430_dss_masters,
968 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
969 .flags = HWMOD_NO_IDLEST,
972 /* l4_core -> dss_dispc */
973 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
974 .master = &omap2430_l4_core_hwmod,
975 .slave = &omap2430_dss_dispc_hwmod,
977 .addr = omap2_dss_dispc_addrs,
978 .user = OCP_USER_MPU | OCP_USER_SDMA,
981 /* dss_dispc slave ports */
982 static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
983 &omap2430_l4_core__dss_dispc,
986 static struct omap_hwmod omap2430_dss_dispc_hwmod = {
988 .class = &omap2_dispc_hwmod_class,
989 .mpu_irqs = omap2_dispc_irqs,
990 .main_clk = "dss1_fck",
994 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
995 .module_offs = CORE_MOD,
997 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
1000 .slaves = omap2430_dss_dispc_slaves,
1001 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1002 .flags = HWMOD_NO_IDLEST,
1005 /* l4_core -> dss_rfbi */
1006 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1007 .master = &omap2430_l4_core_hwmod,
1008 .slave = &omap2430_dss_rfbi_hwmod,
1010 .addr = omap2_dss_rfbi_addrs,
1011 .user = OCP_USER_MPU | OCP_USER_SDMA,
1014 /* dss_rfbi slave ports */
1015 static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1016 &omap2430_l4_core__dss_rfbi,
1019 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1021 .class = &omap2_rfbi_hwmod_class,
1022 .main_clk = "dss1_fck",
1026 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
1027 .module_offs = CORE_MOD,
1030 .slaves = omap2430_dss_rfbi_slaves,
1031 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1032 .flags = HWMOD_NO_IDLEST,
1035 /* l4_core -> dss_venc */
1036 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1037 .master = &omap2430_l4_core_hwmod,
1038 .slave = &omap2430_dss_venc_hwmod,
1039 .clk = "dss_54m_fck",
1040 .addr = omap2_dss_venc_addrs,
1041 .flags = OCPIF_SWSUP_IDLE,
1042 .user = OCP_USER_MPU | OCP_USER_SDMA,
1045 /* dss_venc slave ports */
1046 static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1047 &omap2430_l4_core__dss_venc,
1050 static struct omap_hwmod omap2430_dss_venc_hwmod = {
1052 .class = &omap2_venc_hwmod_class,
1053 .main_clk = "dss1_fck",
1057 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
1058 .module_offs = CORE_MOD,
1061 .slaves = omap2430_dss_venc_slaves,
1062 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves),
1063 .flags = HWMOD_NO_IDLEST,
1067 static struct omap_hwmod_class_sysconfig i2c_sysc = {
1071 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1072 SYSS_HAS_RESET_STATUS),
1073 .sysc_fields = &omap_hwmod_sysc_type1,
1076 static struct omap_hwmod_class i2c_class = {
1079 .rev = OMAP_I2C_IP_VERSION_1,
1080 .reset = &omap_i2c_reset,
1083 static struct omap_i2c_dev_attr i2c_dev_attr = {
1084 .fifo_depth = 8, /* bytes */
1085 .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
1086 OMAP_I2C_FLAG_BUS_SHIFT_2 |
1087 OMAP_I2C_FLAG_FORCE_19200_INT_CLK,
1092 static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
1093 &omap2430_l4_core__i2c1,
1096 static struct omap_hwmod omap2430_i2c1_hwmod = {
1098 .flags = HWMOD_16BIT_REG,
1099 .mpu_irqs = omap2_i2c1_mpu_irqs,
1100 .sdma_reqs = omap2_i2c1_sdma_reqs,
1101 .main_clk = "i2chs1_fck",
1105 * NOTE: The CM_FCLKEN* and CM_ICLKEN* for
1106 * I2CHS IP's do not follow the usual pattern.
1107 * prcm_reg_id alone cannot be used to program
1108 * the iclk and fclk. Needs to be handled using
1109 * additional flags when clk handling is moved
1110 * to hwmod framework.
1112 .module_offs = CORE_MOD,
1114 .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
1116 .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
1119 .slaves = omap2430_i2c1_slaves,
1120 .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
1121 .class = &i2c_class,
1122 .dev_attr = &i2c_dev_attr,
1127 static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
1128 &omap2430_l4_core__i2c2,
1131 static struct omap_hwmod omap2430_i2c2_hwmod = {
1133 .flags = HWMOD_16BIT_REG,
1134 .mpu_irqs = omap2_i2c2_mpu_irqs,
1135 .sdma_reqs = omap2_i2c2_sdma_reqs,
1136 .main_clk = "i2chs2_fck",
1139 .module_offs = CORE_MOD,
1141 .module_bit = OMAP2430_EN_I2CHS2_SHIFT,
1143 .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
1146 .slaves = omap2430_i2c2_slaves,
1147 .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves),
1148 .class = &i2c_class,
1149 .dev_attr = &i2c_dev_attr,
1152 /* l4_wkup -> gpio1 */
1153 static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {
1155 .pa_start = 0x4900C000,
1156 .pa_end = 0x4900C1ff,
1157 .flags = ADDR_TYPE_RT
1162 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {
1163 .master = &omap2430_l4_wkup_hwmod,
1164 .slave = &omap2430_gpio1_hwmod,
1166 .addr = omap2430_gpio1_addr_space,
1167 .user = OCP_USER_MPU | OCP_USER_SDMA,
1170 /* l4_wkup -> gpio2 */
1171 static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = {
1173 .pa_start = 0x4900E000,
1174 .pa_end = 0x4900E1ff,
1175 .flags = ADDR_TYPE_RT
1180 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {
1181 .master = &omap2430_l4_wkup_hwmod,
1182 .slave = &omap2430_gpio2_hwmod,
1184 .addr = omap2430_gpio2_addr_space,
1185 .user = OCP_USER_MPU | OCP_USER_SDMA,
1188 /* l4_wkup -> gpio3 */
1189 static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = {
1191 .pa_start = 0x49010000,
1192 .pa_end = 0x490101ff,
1193 .flags = ADDR_TYPE_RT
1198 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {
1199 .master = &omap2430_l4_wkup_hwmod,
1200 .slave = &omap2430_gpio3_hwmod,
1202 .addr = omap2430_gpio3_addr_space,
1203 .user = OCP_USER_MPU | OCP_USER_SDMA,
1206 /* l4_wkup -> gpio4 */
1207 static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = {
1209 .pa_start = 0x49012000,
1210 .pa_end = 0x490121ff,
1211 .flags = ADDR_TYPE_RT
1216 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {
1217 .master = &omap2430_l4_wkup_hwmod,
1218 .slave = &omap2430_gpio4_hwmod,
1220 .addr = omap2430_gpio4_addr_space,
1221 .user = OCP_USER_MPU | OCP_USER_SDMA,
1224 /* l4_core -> gpio5 */
1225 static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = {
1227 .pa_start = 0x480B6000,
1228 .pa_end = 0x480B61ff,
1229 .flags = ADDR_TYPE_RT
1234 static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {
1235 .master = &omap2430_l4_core_hwmod,
1236 .slave = &omap2430_gpio5_hwmod,
1238 .addr = omap2430_gpio5_addr_space,
1239 .user = OCP_USER_MPU | OCP_USER_SDMA,
1243 static struct omap_gpio_dev_attr gpio_dev_attr = {
1249 static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
1250 &omap2430_l4_wkup__gpio1,
1253 static struct omap_hwmod omap2430_gpio1_hwmod = {
1255 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1256 .mpu_irqs = omap2_gpio1_irqs,
1257 .main_clk = "gpios_fck",
1261 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1262 .module_offs = WKUP_MOD,
1264 .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT,
1267 .slaves = omap2430_gpio1_slaves,
1268 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
1269 .class = &omap2xxx_gpio_hwmod_class,
1270 .dev_attr = &gpio_dev_attr,
1274 static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
1275 &omap2430_l4_wkup__gpio2,
1278 static struct omap_hwmod omap2430_gpio2_hwmod = {
1280 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1281 .mpu_irqs = omap2_gpio2_irqs,
1282 .main_clk = "gpios_fck",
1286 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1287 .module_offs = WKUP_MOD,
1289 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1292 .slaves = omap2430_gpio2_slaves,
1293 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
1294 .class = &omap2xxx_gpio_hwmod_class,
1295 .dev_attr = &gpio_dev_attr,
1299 static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
1300 &omap2430_l4_wkup__gpio3,
1303 static struct omap_hwmod omap2430_gpio3_hwmod = {
1305 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1306 .mpu_irqs = omap2_gpio3_irqs,
1307 .main_clk = "gpios_fck",
1311 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1312 .module_offs = WKUP_MOD,
1314 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1317 .slaves = omap2430_gpio3_slaves,
1318 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
1319 .class = &omap2xxx_gpio_hwmod_class,
1320 .dev_attr = &gpio_dev_attr,
1324 static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
1325 &omap2430_l4_wkup__gpio4,
1328 static struct omap_hwmod omap2430_gpio4_hwmod = {
1330 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1331 .mpu_irqs = omap2_gpio4_irqs,
1332 .main_clk = "gpios_fck",
1336 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1337 .module_offs = WKUP_MOD,
1339 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1342 .slaves = omap2430_gpio4_slaves,
1343 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
1344 .class = &omap2xxx_gpio_hwmod_class,
1345 .dev_attr = &gpio_dev_attr,
1349 static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
1350 { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
1354 static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
1355 &omap2430_l4_core__gpio5,
1358 static struct omap_hwmod omap2430_gpio5_hwmod = {
1360 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1361 .mpu_irqs = omap243x_gpio5_irqs,
1362 .main_clk = "gpio5_fck",
1366 .module_bit = OMAP2430_EN_GPIO5_SHIFT,
1367 .module_offs = CORE_MOD,
1369 .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
1372 .slaves = omap2430_gpio5_slaves,
1373 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
1374 .class = &omap2xxx_gpio_hwmod_class,
1375 .dev_attr = &gpio_dev_attr,
1378 /* dma attributes */
1379 static struct omap_dma_dev_attr dma_dev_attr = {
1380 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
1381 IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
1385 /* dma_system -> L3 */
1386 static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
1387 .master = &omap2430_dma_system_hwmod,
1388 .slave = &omap2430_l3_main_hwmod,
1389 .clk = "core_l3_ck",
1390 .user = OCP_USER_MPU | OCP_USER_SDMA,
1393 /* dma_system master ports */
1394 static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
1395 &omap2430_dma_system__l3,
1398 /* l4_core -> dma_system */
1399 static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1400 .master = &omap2430_l4_core_hwmod,
1401 .slave = &omap2430_dma_system_hwmod,
1403 .addr = omap2_dma_system_addrs,
1404 .user = OCP_USER_MPU | OCP_USER_SDMA,
1407 /* dma_system slave ports */
1408 static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
1409 &omap2430_l4_core__dma_system,
1412 static struct omap_hwmod omap2430_dma_system_hwmod = {
1414 .class = &omap2xxx_dma_hwmod_class,
1415 .mpu_irqs = omap2_dma_system_irqs,
1416 .main_clk = "core_l3_ck",
1417 .slaves = omap2430_dma_system_slaves,
1418 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
1419 .masters = omap2430_dma_system_masters,
1420 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters),
1421 .dev_attr = &dma_dev_attr,
1422 .flags = HWMOD_NO_IDLEST,
1426 static struct omap_hwmod omap2430_mailbox_hwmod;
1427 static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1432 /* l4_core -> mailbox */
1433 static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
1434 .master = &omap2430_l4_core_hwmod,
1435 .slave = &omap2430_mailbox_hwmod,
1436 .addr = omap2_mailbox_addrs,
1437 .user = OCP_USER_MPU | OCP_USER_SDMA,
1440 /* mailbox slave ports */
1441 static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
1442 &omap2430_l4_core__mailbox,
1445 static struct omap_hwmod omap2430_mailbox_hwmod = {
1447 .class = &omap2xxx_mailbox_hwmod_class,
1448 .mpu_irqs = omap2430_mailbox_irqs,
1449 .main_clk = "mailboxes_ick",
1453 .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
1454 .module_offs = CORE_MOD,
1456 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
1459 .slaves = omap2430_mailbox_slaves,
1460 .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves),
1464 static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1465 &omap2430_l4_core__mcspi1,
1468 static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1469 .num_chipselect = 4,
1472 static struct omap_hwmod omap2430_mcspi1_hwmod = {
1473 .name = "mcspi1_hwmod",
1474 .mpu_irqs = omap2_mcspi1_mpu_irqs,
1475 .sdma_reqs = omap2_mcspi1_sdma_reqs,
1476 .main_clk = "mcspi1_fck",
1479 .module_offs = CORE_MOD,
1481 .module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
1483 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
1486 .slaves = omap2430_mcspi1_slaves,
1487 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1488 .class = &omap2xxx_mcspi_class,
1489 .dev_attr = &omap_mcspi1_dev_attr,
1493 static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
1494 &omap2430_l4_core__mcspi2,
1497 static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1498 .num_chipselect = 2,
1501 static struct omap_hwmod omap2430_mcspi2_hwmod = {
1502 .name = "mcspi2_hwmod",
1503 .mpu_irqs = omap2_mcspi2_mpu_irqs,
1504 .sdma_reqs = omap2_mcspi2_sdma_reqs,
1505 .main_clk = "mcspi2_fck",
1508 .module_offs = CORE_MOD,
1510 .module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
1512 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
1515 .slaves = omap2430_mcspi2_slaves,
1516 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1517 .class = &omap2xxx_mcspi_class,
1518 .dev_attr = &omap_mcspi2_dev_attr,
1522 static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
1527 static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
1528 { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */
1529 { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */
1530 { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */
1531 { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */
1535 static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
1536 &omap2430_l4_core__mcspi3,
1539 static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1540 .num_chipselect = 2,
1543 static struct omap_hwmod omap2430_mcspi3_hwmod = {
1544 .name = "mcspi3_hwmod",
1545 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
1546 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
1547 .main_clk = "mcspi3_fck",
1550 .module_offs = CORE_MOD,
1552 .module_bit = OMAP2430_EN_MCSPI3_SHIFT,
1554 .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
1557 .slaves = omap2430_mcspi3_slaves,
1558 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1559 .class = &omap2xxx_mcspi_class,
1560 .dev_attr = &omap_mcspi3_dev_attr,
1566 static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = {
1568 .sysc_offs = 0x0404,
1569 .syss_offs = 0x0408,
1570 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE|
1571 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1573 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1574 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1575 .sysc_fields = &omap_hwmod_sysc_type1,
1578 static struct omap_hwmod_class usbotg_class = {
1580 .sysc = &omap2430_usbhsotg_sysc,
1584 static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
1586 { .name = "mc", .irq = 92 },
1587 { .name = "dma", .irq = 93 },
1591 static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1592 .name = "usb_otg_hs",
1593 .mpu_irqs = omap2430_usbhsotg_mpu_irqs,
1594 .main_clk = "usbhs_ick",
1598 .module_bit = OMAP2430_EN_USBHS_MASK,
1599 .module_offs = CORE_MOD,
1601 .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
1604 .masters = omap2430_usbhsotg_masters,
1605 .masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters),
1606 .slaves = omap2430_usbhsotg_slaves,
1607 .slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves),
1608 .class = &usbotg_class,
1610 * Erratum ID: i479 idle_req / idle_ack mechanism potentially
1611 * broken when autoidle is enabled
1612 * workaround is to disable the autoidle bit at module level.
1614 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
1615 | HWMOD_SWSUP_MSTANDBY,
1620 * multi channel buffered serial port controller
1623 static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = {
1625 .sysc_offs = 0x008C,
1626 .sysc_flags = (SYSC_HAS_SOFTRESET),
1627 .sysc_fields = &omap_hwmod_sysc_type1,
1630 static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
1632 .sysc = &omap2430_mcbsp_sysc,
1633 .rev = MCBSP_CONFIG_TYPE2,
1637 static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
1638 { .name = "tx", .irq = 59 },
1639 { .name = "rx", .irq = 60 },
1640 { .name = "ovr", .irq = 61 },
1641 { .name = "common", .irq = 64 },
1645 /* l4_core -> mcbsp1 */
1646 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
1647 .master = &omap2430_l4_core_hwmod,
1648 .slave = &omap2430_mcbsp1_hwmod,
1649 .clk = "mcbsp1_ick",
1650 .addr = omap2_mcbsp1_addrs,
1651 .user = OCP_USER_MPU | OCP_USER_SDMA,
1654 /* mcbsp1 slave ports */
1655 static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = {
1656 &omap2430_l4_core__mcbsp1,
1659 static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1661 .class = &omap2430_mcbsp_hwmod_class,
1662 .mpu_irqs = omap2430_mcbsp1_irqs,
1663 .sdma_reqs = omap2_mcbsp1_sdma_reqs,
1664 .main_clk = "mcbsp1_fck",
1668 .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
1669 .module_offs = CORE_MOD,
1671 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
1674 .slaves = omap2430_mcbsp1_slaves,
1675 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves),
1679 static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
1680 { .name = "tx", .irq = 62 },
1681 { .name = "rx", .irq = 63 },
1682 { .name = "common", .irq = 16 },
1686 /* l4_core -> mcbsp2 */
1687 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
1688 .master = &omap2430_l4_core_hwmod,
1689 .slave = &omap2430_mcbsp2_hwmod,
1690 .clk = "mcbsp2_ick",
1691 .addr = omap2xxx_mcbsp2_addrs,
1692 .user = OCP_USER_MPU | OCP_USER_SDMA,
1695 /* mcbsp2 slave ports */
1696 static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = {
1697 &omap2430_l4_core__mcbsp2,
1700 static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1702 .class = &omap2430_mcbsp_hwmod_class,
1703 .mpu_irqs = omap2430_mcbsp2_irqs,
1704 .sdma_reqs = omap2_mcbsp2_sdma_reqs,
1705 .main_clk = "mcbsp2_fck",
1709 .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
1710 .module_offs = CORE_MOD,
1712 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
1715 .slaves = omap2430_mcbsp2_slaves,
1716 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves),
1720 static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
1721 { .name = "tx", .irq = 89 },
1722 { .name = "rx", .irq = 90 },
1723 { .name = "common", .irq = 17 },
1727 static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
1730 .pa_start = 0x4808C000,
1731 .pa_end = 0x4808C0ff,
1732 .flags = ADDR_TYPE_RT
1737 /* l4_core -> mcbsp3 */
1738 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {
1739 .master = &omap2430_l4_core_hwmod,
1740 .slave = &omap2430_mcbsp3_hwmod,
1741 .clk = "mcbsp3_ick",
1742 .addr = omap2430_mcbsp3_addrs,
1743 .user = OCP_USER_MPU | OCP_USER_SDMA,
1746 /* mcbsp3 slave ports */
1747 static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = {
1748 &omap2430_l4_core__mcbsp3,
1751 static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1753 .class = &omap2430_mcbsp_hwmod_class,
1754 .mpu_irqs = omap2430_mcbsp3_irqs,
1755 .sdma_reqs = omap2_mcbsp3_sdma_reqs,
1756 .main_clk = "mcbsp3_fck",
1760 .module_bit = OMAP2430_EN_MCBSP3_SHIFT,
1761 .module_offs = CORE_MOD,
1763 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
1766 .slaves = omap2430_mcbsp3_slaves,
1767 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves),
1771 static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
1772 { .name = "tx", .irq = 54 },
1773 { .name = "rx", .irq = 55 },
1774 { .name = "common", .irq = 18 },
1778 static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
1779 { .name = "rx", .dma_req = 20 },
1780 { .name = "tx", .dma_req = 19 },
1784 static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
1787 .pa_start = 0x4808E000,
1788 .pa_end = 0x4808E0ff,
1789 .flags = ADDR_TYPE_RT
1794 /* l4_core -> mcbsp4 */
1795 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {
1796 .master = &omap2430_l4_core_hwmod,
1797 .slave = &omap2430_mcbsp4_hwmod,
1798 .clk = "mcbsp4_ick",
1799 .addr = omap2430_mcbsp4_addrs,
1800 .user = OCP_USER_MPU | OCP_USER_SDMA,
1803 /* mcbsp4 slave ports */
1804 static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = {
1805 &omap2430_l4_core__mcbsp4,
1808 static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1810 .class = &omap2430_mcbsp_hwmod_class,
1811 .mpu_irqs = omap2430_mcbsp4_irqs,
1812 .sdma_reqs = omap2430_mcbsp4_sdma_chs,
1813 .main_clk = "mcbsp4_fck",
1817 .module_bit = OMAP2430_EN_MCBSP4_SHIFT,
1818 .module_offs = CORE_MOD,
1820 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
1823 .slaves = omap2430_mcbsp4_slaves,
1824 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves),
1828 static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
1829 { .name = "tx", .irq = 81 },
1830 { .name = "rx", .irq = 82 },
1831 { .name = "common", .irq = 19 },
1835 static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
1836 { .name = "rx", .dma_req = 22 },
1837 { .name = "tx", .dma_req = 21 },
1841 static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
1844 .pa_start = 0x48096000,
1845 .pa_end = 0x480960ff,
1846 .flags = ADDR_TYPE_RT
1851 /* l4_core -> mcbsp5 */
1852 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
1853 .master = &omap2430_l4_core_hwmod,
1854 .slave = &omap2430_mcbsp5_hwmod,
1855 .clk = "mcbsp5_ick",
1856 .addr = omap2430_mcbsp5_addrs,
1857 .user = OCP_USER_MPU | OCP_USER_SDMA,
1860 /* mcbsp5 slave ports */
1861 static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = {
1862 &omap2430_l4_core__mcbsp5,
1865 static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1867 .class = &omap2430_mcbsp_hwmod_class,
1868 .mpu_irqs = omap2430_mcbsp5_irqs,
1869 .sdma_reqs = omap2430_mcbsp5_sdma_chs,
1870 .main_clk = "mcbsp5_fck",
1874 .module_bit = OMAP2430_EN_MCBSP5_SHIFT,
1875 .module_offs = CORE_MOD,
1877 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
1880 .slaves = omap2430_mcbsp5_slaves,
1881 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves),
1884 /* MMC/SD/SDIO common */
1886 static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = {
1890 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1891 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1892 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1893 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1894 .sysc_fields = &omap_hwmod_sysc_type1,
1897 static struct omap_hwmod_class omap2430_mmc_class = {
1899 .sysc = &omap2430_mmc_sysc,
1904 static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
1909 static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
1910 { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */
1911 { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */
1915 static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
1916 { .role = "dbck", .clk = "mmchsdb1_fck" },
1919 static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
1920 &omap2430_l4_core__mmc1,
1923 static struct omap_mmc_dev_attr mmc1_dev_attr = {
1924 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1927 static struct omap_hwmod omap2430_mmc1_hwmod = {
1929 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1930 .mpu_irqs = omap2430_mmc1_mpu_irqs,
1931 .sdma_reqs = omap2430_mmc1_sdma_reqs,
1932 .opt_clks = omap2430_mmc1_opt_clks,
1933 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks),
1934 .main_clk = "mmchs1_fck",
1937 .module_offs = CORE_MOD,
1939 .module_bit = OMAP2430_EN_MMCHS1_SHIFT,
1941 .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT,
1944 .dev_attr = &mmc1_dev_attr,
1945 .slaves = omap2430_mmc1_slaves,
1946 .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves),
1947 .class = &omap2430_mmc_class,
1952 static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
1957 static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
1958 { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */
1959 { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */
1963 static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {
1964 { .role = "dbck", .clk = "mmchsdb2_fck" },
1967 static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
1968 &omap2430_l4_core__mmc2,
1971 static struct omap_hwmod omap2430_mmc2_hwmod = {
1973 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1974 .mpu_irqs = omap2430_mmc2_mpu_irqs,
1975 .sdma_reqs = omap2430_mmc2_sdma_reqs,
1976 .opt_clks = omap2430_mmc2_opt_clks,
1977 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks),
1978 .main_clk = "mmchs2_fck",
1981 .module_offs = CORE_MOD,
1983 .module_bit = OMAP2430_EN_MMCHS2_SHIFT,
1985 .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
1988 .slaves = omap2430_mmc2_slaves,
1989 .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves),
1990 .class = &omap2430_mmc_class,
1993 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
1994 &omap2430_l3_main_hwmod,
1995 &omap2430_l4_core_hwmod,
1996 &omap2430_l4_wkup_hwmod,
1997 &omap2430_mpu_hwmod,
1998 &omap2430_iva_hwmod,
2000 &omap2430_timer1_hwmod,
2001 &omap2430_timer2_hwmod,
2002 &omap2430_timer3_hwmod,
2003 &omap2430_timer4_hwmod,
2004 &omap2430_timer5_hwmod,
2005 &omap2430_timer6_hwmod,
2006 &omap2430_timer7_hwmod,
2007 &omap2430_timer8_hwmod,
2008 &omap2430_timer9_hwmod,
2009 &omap2430_timer10_hwmod,
2010 &omap2430_timer11_hwmod,
2011 &omap2430_timer12_hwmod,
2013 &omap2430_wd_timer2_hwmod,
2014 &omap2430_uart1_hwmod,
2015 &omap2430_uart2_hwmod,
2016 &omap2430_uart3_hwmod,
2018 &omap2430_dss_core_hwmod,
2019 &omap2430_dss_dispc_hwmod,
2020 &omap2430_dss_rfbi_hwmod,
2021 &omap2430_dss_venc_hwmod,
2023 &omap2430_i2c1_hwmod,
2024 &omap2430_i2c2_hwmod,
2025 &omap2430_mmc1_hwmod,
2026 &omap2430_mmc2_hwmod,
2029 &omap2430_gpio1_hwmod,
2030 &omap2430_gpio2_hwmod,
2031 &omap2430_gpio3_hwmod,
2032 &omap2430_gpio4_hwmod,
2033 &omap2430_gpio5_hwmod,
2035 /* dma_system class*/
2036 &omap2430_dma_system_hwmod,
2039 &omap2430_mcbsp1_hwmod,
2040 &omap2430_mcbsp2_hwmod,
2041 &omap2430_mcbsp3_hwmod,
2042 &omap2430_mcbsp4_hwmod,
2043 &omap2430_mcbsp5_hwmod,
2046 &omap2430_mailbox_hwmod,
2049 &omap2430_mcspi1_hwmod,
2050 &omap2430_mcspi2_hwmod,
2051 &omap2430_mcspi3_hwmod,
2054 &omap2430_usbhsotg_hwmod,
2059 int __init omap2430_hwmod_init(void)
2061 return omap_hwmod_register(omap2430_hwmods);