Merge tag 'omap-for-v3.14/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel...
[cascardo/linux.git] / arch / arm / mach-shmobile / board-bockw-reference.c
1 /*
2  * Bock-W board support
3  *
4  * Copyright (C) 2013  Renesas Solutions Corp.
5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  */
20
21 #include <linux/of_platform.h>
22 #include <mach/common.h>
23 #include <mach/r8a7778.h>
24 #include <asm/mach/arch.h>
25
26 /*
27  *      see board-bock.c for checking detail of dip-switch
28  */
29
30 static const struct pinctrl_map bockw_pinctrl_map[] = {
31         /* SCIF0 */
32         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
33                                   "scif0_data_a", "scif0"),
34         PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
35                                   "scif0_ctrl", "scif0"),
36 };
37
38 #define FPGA    0x18200000
39 #define IRQ0MR  0x30
40 #define COMCTLR 0x101c
41
42 #define PFC     0xfffc0000
43 #define PUPR4   0x110
44 static void __init bockw_init(void)
45 {
46         void __iomem *fpga;
47         void __iomem *pfc;
48
49         r8a7778_clock_init();
50         r8a7778_init_irq_extpin_dt(1);
51
52         pinctrl_register_mappings(bockw_pinctrl_map,
53                                   ARRAY_SIZE(bockw_pinctrl_map));
54         r8a7778_pinmux_init();
55         r8a7778_add_dt_devices();
56
57         fpga = ioremap_nocache(FPGA, SZ_1M);
58         if (fpga) {
59                 /*
60                  * CAUTION
61                  *
62                  * IRQ0/1 is cascaded interrupt from FPGA.
63                  * it should be cared in the future
64                  * Now, it is assuming IRQ0 was used only from SMSC.
65                  */
66                 u16 val = ioread16(fpga + IRQ0MR);
67                 val &= ~(1 << 4); /* enable SMSC911x */
68                 iowrite16(val, fpga + IRQ0MR);
69
70                 iounmap(fpga);
71         }
72
73         pfc = ioremap_nocache(PFC, 0x200);
74         if (pfc) {
75                 /*
76                  * FIXME
77                  *
78                  * SDHI CD/WP pin needs pull-up
79                  */
80                 iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
81                 iounmap(pfc);
82         }
83
84         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
85 }
86
87 static const char *bockw_boards_compat_dt[] __initdata = {
88         "renesas,bockw-reference",
89         NULL,
90 };
91
92 DT_MACHINE_START(BOCKW_DT, "bockw")
93         .init_early     = r8a7778_init_delay,
94         .init_irq       = r8a7778_init_irq_dt,
95         .init_machine   = bockw_init,
96         .dt_compat      = bockw_boards_compat_dt,
97 MACHINE_END