arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/gpio/gpio.h>
  44 #include <dt-bindings/interrupt-controller/irq.h>
  45 #include <dt-bindings/interrupt-controller/arm-gic.h>
  46 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  47 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
  48 #include <dt-bindings/clock/gxbb-clkc.h>
  49
  50 / {
  51         compatible = "amlogic,meson-gxbb";
  52         interrupt-parent = <&gic>;
  53         #address-cells = <2>;
  54         #size-cells = <2>;
  55
  56         cpus {
  57                 #address-cells = <0x2>;
  58                 #size-cells = <0x0>;
  59
  60                 cpu0: cpu@0 {
  61                         device_type = "cpu";
  62                         compatible = "arm,cortex-a53", "arm,armv8";
  63                         reg = <0x0 0x0>;
  64                         enable-method = "psci";
  65                 };
  66
  67                 cpu1: cpu@1 {
  68                         device_type = "cpu";
  69                         compatible = "arm,cortex-a53", "arm,armv8";
  70                         reg = <0x0 0x1>;
  71                         enable-method = "psci";
  72                 };
  73
  74                 cpu2: cpu@2 {
  75                         device_type = "cpu";
  76                         compatible = "arm,cortex-a53", "arm,armv8";
  77                         reg = <0x0 0x2>;
  78                         enable-method = "psci";
  79                 };
  80
  81                 cpu3: cpu@3 {
  82                         device_type = "cpu";
  83                         compatible = "arm,cortex-a53", "arm,armv8";
  84                         reg = <0x0 0x3>;
  85                         enable-method = "psci";
  86                 };
  87         };
  88
  89         arm-pmu {
  90                 compatible = "arm,cortex-a53-pmu";
  91                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
  92                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
  93                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
  94                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
  95                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
  96         };
  97
  98         psci {
  99                 compatible = "arm,psci-0.2";
 100                 method = "smc";
 101         };
 102
 103         timer {
 104                 compatible = "arm,armv8-timer";
 105                 interrupts = <GIC_PPI 13
 106                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 107                              <GIC_PPI 14
 108                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 109                              <GIC_PPI 11
 110                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 111                              <GIC_PPI 10
 112                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
 113         };
 114
 115         xtal: xtal-clk {
 116                 compatible = "fixed-clock";
 117                 clock-frequency = <24000000>;
 118                 clock-output-names = "xtal";
 119                 #clock-cells = <0>;
 120         };
 121
 122         soc {
 123                 compatible = "simple-bus";
 124                 #address-cells = <2>;
 125                 #size-cells = <2>;
 126                 ranges;
 127
 128                 cbus: cbus@c1100000 {
 129                         compatible = "simple-bus";
 130                         reg = <0x0 0xc1100000 0x0 0x100000>;
 131                         #address-cells = <2>;
 132                         #size-cells = <2>;
 133                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
 134
 135                         reset: reset-controller@4404 {
 136                                 compatible = "amlogic,meson-gxbb-reset";
 137                                 reg = <0x0 0x04404 0x0 0x20>;
 138                                 #reset-cells = <1>;
 139                         };
 140
 141                         uart_A: serial@84c0 {
 142                                 compatible = "amlogic,meson-uart";
 143                                 reg = <0x0 0x84c0 0x0 0x14>;
 144                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 145                                 clocks = <&xtal>;
 146                                 status = "disabled";
 147                         };
 148
 149                         uart_B: serial@84dc {
 150                                 compatible = "amlogic,meson-uart";
 151                                 reg = <0x0 0x84dc 0x0 0x14>;
 152                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 153                                 clocks = <&xtal>;
 154                                 status = "disabled";
 155                         };
 156
 157                         uart_C: serial@8700 {
 158                                 compatible = "amlogic,meson-uart";
 159                                 reg = <0x0 0x8700 0x0 0x14>;
 160                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
 161                                 clocks = <&xtal>;
 162                                 status = "disabled";
 163                         };
 164                 };
 165
 166                 gic: interrupt-controller@c4301000 {
 167                         compatible = "arm,gic-400";
 168                         reg = <0x0 0xc4301000 0 0x1000>,
 169                               <0x0 0xc4302000 0 0x2000>,
 170                               <0x0 0xc4304000 0 0x2000>,
 171                               <0x0 0xc4306000 0 0x2000>;
 172                         interrupt-controller;
 173                         interrupts = <GIC_PPI 9
 174                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 175                         #interrupt-cells = <3>;
 176                         #address-cells = <0>;
 177                 };
 178
 179                 aobus: aobus@c8100000 {
 180                         compatible = "simple-bus";
 181                         reg = <0x0 0xc8100000 0x0 0x100000>;
 182                         #address-cells = <2>;
 183                         #size-cells = <2>;
 184                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
 185
 186                         pinctrl_aobus: pinctrl@14 {
 187                                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 188                                 #address-cells = <2>;
 189                                 #size-cells = <2>;
 190                                 ranges;
 191
 192                                 gpio_ao: bank@14 {
 193                                         reg = <0x0 0x00014 0x0 0x8>,
 194                                               <0x0 0x0002c 0x0 0x4>,
 195                                               <0x0 0x00024 0x0 0x8>;
 196                                         reg-names = "mux", "pull", "gpio";
 197                                         gpio-controller;
 198                                         #gpio-cells = <2>;
 199                                 };
 200
 201                                 uart_ao_a_pins: uart_ao_a {
 202                                         mux {
 203                                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 204                                                 function = "uart_ao";
 205                                         };
 206                                 };
 207                         };
 208
 209                         uart_AO: serial@4c0 {
 210                                 compatible = "amlogic,meson-uart";
 211                                 reg = <0x0 0x004c0 0x0 0x14>;
 212                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 213                                 clocks = <&xtal>;
 214                                 status = "disabled";
 215                         };
 216                 };
 217
 218                 periphs: periphs@c8834000 {
 219                         compatible = "simple-bus";
 220                         reg = <0x0 0xc8834000 0x0 0x2000>;
 221                         #address-cells = <2>;
 222                         #size-cells = <2>;
 223                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 224
 225                         rng {
 226                                 compatible = "amlogic,meson-rng";
 227                                 reg = <0x0 0x0 0x0 0x4>;
 228                         };
 229
 230                         pinctrl_periphs: pinctrl@4b0 {
 231                                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 232                                 #address-cells = <2>;
 233                                 #size-cells = <2>;
 234                                 ranges;
 235
 236                                 gpio: bank@4b0 {
 237                                         reg = <0x0 0x004b0 0x0 0x28>,
 238                                               <0x0 0x004e8 0x0 0x14>,
 239                                               <0x0 0x00120 0x0 0x14>,
 240                                               <0x0 0x00430 0x0 0x40>;
 241                                         reg-names = "mux", "pull", "pull-enable", "gpio";
 242                                         gpio-controller;
 243                                         #gpio-cells = <2>;
 244                                 };
 245
 246                                 emmc_pins: emmc {
 247                                         mux {
 248                                                 groups = "emmc_nand_d07",
 249                                                        "emmc_cmd",
 250                                                        "emmc_clk";
 251                                                 function = "emmc";
 252                                         };
 253                                 };
 254
 255                                 sdcard_pins: sdcard {
 256                                         mux {
 257                                                 groups = "sdcard_d0",
 258                                                        "sdcard_d1",
 259                                                        "sdcard_d2",
 260                                                        "sdcard_d3",
 261                                                        "sdcard_cmd",
 262                                                        "sdcard_clk";
 263                                                 function = "sdcard";
 264                                         };
 265                                 };
 266
 267                                 uart_a_pins: uart_a {
 268                                         mux {
 269                                                 groups = "uart_tx_a",
 270                                                        "uart_rx_a";
 271                                                 function = "uart_a";
 272                                         };
 273                                 };
 274
 275                                 uart_b_pins: uart_b {
 276                                         mux {
 277                                                 groups = "uart_tx_b",
 278                                                        "uart_rx_b";
 279                                                 function = "uart_b";
 280                                         };
 281                                 };
 282
 283                                 uart_c_pins: uart_c {
 284                                         mux {
 285                                                 groups = "uart_tx_c",
 286                                                        "uart_rx_c";
 287                                                 function = "uart_c";
 288                                         };
 289                                 };
 290
 291                                 eth_pins: eth_c {
 292                                         mux {
 293                                                 groups = "eth_mdio",
 294                                                        "eth_mdc",
 295                                                        "eth_clk_rx_clk",
 296                                                        "eth_rx_dv",
 297                                                        "eth_rxd0",
 298                                                        "eth_rxd1",
 299                                                        "eth_rxd2",
 300                                                        "eth_rxd3",
 301                                                        "eth_rgmii_tx_clk",
 302                                                        "eth_tx_en",
 303                                                        "eth_txd0",
 304                                                        "eth_txd1",
 305                                                        "eth_txd2",
 306                                                        "eth_txd3";
 307                                                 function = "eth";
 308                                         };
 309                                 };
 310                         };
 311                 };
 312
 313                 hiubus: hiubus@c883c000 {
 314                         compatible = "simple-bus";
 315                         reg = <0x0 0xc883c000 0x0 0x2000>;
 316                         #address-cells = <2>;
 317                         #size-cells = <2>;
 318                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
 319
 320                         clkc: clock-controller@0 {
 321                                 compatible = "amlogic,gxbb-clkc";
 322                                 #clock-cells = <1>;
 323                                 reg = <0x0 0x0 0x0 0x3db>;
 324                         };
 325                 };
 326
 327                 apb: apb@d0000000 {
 328                         compatible = "simple-bus";
 329                         reg = <0x0 0xd0000000 0x0 0x200000>;
 330                         #address-cells = <2>;
 331                         #size-cells = <2>;
 332                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
 333                 };
 334
 335                 ethmac: ethernet@c9410000 {
 336                         compatible = "amlogic,meson6-dwmac", "snps,dwmac";
 337                         reg = <0x0 0xc9410000 0x0 0x10000
 338                                0x0 0xc8834540 0x0 0x4>;
 339                         interrupts = <0 8 1>;
 340                         interrupt-names = "macirq";
 341                         clocks = <&clkc CLKID_ETH>;
 342                         clock-names = "stmmaceth";
 343                         phy-mode = "rgmii";
 344                         status = "disabled";
 345                 };
 346         };
 347 };