arch/arm64/boot/dts/arm/juno-base.dtsi

   1         /*
   2          *  Devices shared by all Juno boards
   3          */
   4
   5         memtimer: timer@2a810000 {
   6                 compatible = "arm,armv7-timer-mem";
   7                 reg = <0x0 0x2a810000 0x0 0x10000>;
   8                 clock-frequency = <50000000>;
   9                 #address-cells = <2>;
  10                 #size-cells = <2>;
  11                 ranges;
  12                 status = "disabled";
  13                 frame@2a830000 {
  14                         frame-number = <1>;
  15                         interrupts = <0 60 4>;
  16                         reg = <0x0 0x2a830000 0x0 0x10000>;
  17                 };
  18         };
  19
  20         mailbox: mhu@2b1f0000 {
  21                 compatible = "arm,mhu", "arm,primecell";
  22                 reg = <0x0 0x2b1f0000 0x0 0x1000>;
  23                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
  24                              <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
  25                 interrupt-names = "mhu_lpri_rx",
  26                                   "mhu_hpri_rx";
  27                 #mbox-cells = <1>;
  28                 clocks = <&soc_refclk100mhz>;
  29                 clock-names = "apb_pclk";
  30         };
  31
  32         gic: interrupt-controller@2c010000 {
  33                 compatible = "arm,gic-400", "arm,cortex-a15-gic";
  34                 reg = <0x0 0x2c010000 0 0x1000>,
  35                       <0x0 0x2c02f000 0 0x2000>,
  36                       <0x0 0x2c04f000 0 0x2000>,
  37                       <0x0 0x2c06f000 0 0x2000>;
  38                 #address-cells = <2>;
  39                 #interrupt-cells = <3>;
  40                 #size-cells = <2>;
  41                 interrupt-controller;
  42                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
  43                 ranges = <0 0 0 0x2c1c0000 0 0x40000>;
  44                 v2m_0: v2m@0 {
  45                         compatible = "arm,gic-v2m-frame";
  46                         msi-controller;
  47                         reg = <0 0 0 0x1000>;
  48                 };
  49         };
  50
  51         timer {
  52                 compatible = "arm,armv8-timer";
  53                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
  54                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
  55                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
  56                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
  57         };
  58
  59         sram: sram@2e000000 {
  60                 compatible = "arm,juno-sram-ns", "mmio-sram";
  61                 reg = <0x0 0x2e000000 0x0 0x8000>;
  62
  63                 #address-cells = <1>;
  64                 #size-cells = <1>;
  65                 ranges = <0 0x0 0x2e000000 0x8000>;
  66
  67                 cpu_scp_lpri: scp-shmem@0 {
  68                         compatible = "arm,juno-scp-shmem";
  69                         reg = <0x0 0x200>;
  70                 };
  71
  72                 cpu_scp_hpri: scp-shmem@200 {
  73                         compatible = "arm,juno-scp-shmem";
  74                         reg = <0x200 0x200>;
  75                 };
  76         };
  77
  78         scpi {
  79                 compatible = "arm,scpi";
  80                 mboxes = <&mailbox 1>;
  81                 shmem = <&cpu_scp_hpri>;
  82
  83                 clocks {
  84                         compatible = "arm,scpi-clocks";
  85
  86                         scpi_dvfs: scpi_clocks@0 {
  87                                 compatible = "arm,scpi-dvfs-clocks";
  88                                 #clock-cells = <1>;
  89                                 clock-indices = <0>, <1>, <2>;
  90                                 clock-output-names = "atlclk", "aplclk","gpuclk";
  91                         };
  92                         scpi_clk: scpi_clocks@3 {
  93                                 compatible = "arm,scpi-variable-clocks";
  94                                 #clock-cells = <1>;
  95                                 clock-indices = <3>, <4>;
  96                                 clock-output-names = "pxlclk0", "pxlclk1";
  97                         };
  98                 };
  99         };
 100
 101         /include/ "juno-clocks.dtsi"
 102
 103         dma@7ff00000 {
 104                 compatible = "arm,pl330", "arm,primecell";
 105                 reg = <0x0 0x7ff00000 0 0x1000>;
 106                 #dma-cells = <1>;
 107                 #dma-channels = <8>;
 108                 #dma-requests = <32>;
 109                 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
 110                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
 111                              <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
 112                              <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
 113                              <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
 114                              <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 115                              <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 116                              <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 117                 clocks = <&soc_faxiclk>;
 118                 clock-names = "apb_pclk";
 119         };
 120
 121         soc_uart0: uart@7ff80000 {
 122                 compatible = "arm,pl011", "arm,primecell";
 123                 reg = <0x0 0x7ff80000 0x0 0x1000>;
 124                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 125                 clocks = <&soc_uartclk>, <&soc_refclk100mhz>;
 126                 clock-names = "uartclk", "apb_pclk";
 127         };
 128
 129         i2c@7ffa0000 {
 130                 compatible = "snps,designware-i2c";
 131                 reg = <0x0 0x7ffa0000 0x0 0x1000>;
 132                 #address-cells = <1>;
 133                 #size-cells = <0>;
 134                 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
 135                 clock-frequency = <400000>;
 136                 i2c-sda-hold-time-ns = <500>;
 137                 clocks = <&soc_smc50mhz>;
 138
 139                 dvi0: dvi-transmitter@70 {
 140                         compatible = "nxp,tda998x";
 141                         reg = <0x70>;
 142                 };
 143
 144                 dvi1: dvi-transmitter@71 {
 145                         compatible = "nxp,tda998x";
 146                         reg = <0x71>;
 147                 };
 148         };
 149
 150         ohci@7ffb0000 {
 151                 compatible = "generic-ohci";
 152                 reg = <0x0 0x7ffb0000 0x0 0x10000>;
 153                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 154                 clocks = <&soc_usb48mhz>;
 155         };
 156
 157         ehci@7ffc0000 {
 158                 compatible = "generic-ehci";
 159                 reg = <0x0 0x7ffc0000 0x0 0x10000>;
 160                 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 161                 clocks = <&soc_usb48mhz>;
 162         };
 163
 164         memory-controller@7ffd0000 {
 165                 compatible = "arm,pl354", "arm,primecell";
 166                 reg = <0 0x7ffd0000 0 0x1000>;
 167                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 168                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 169                 clocks = <&soc_smc50mhz>;
 170                 clock-names = "apb_pclk";
 171         };
 172
 173         memory@80000000 {
 174                 device_type = "memory";
 175                 /* last 16MB of the first memory area is reserved for secure world use by firmware */
 176                 reg = <0x00000000 0x80000000 0x0 0x7f000000>,
 177                       <0x00000008 0x80000000 0x1 0x80000000>;
 178         };
 179
 180         smb {
 181                 compatible = "simple-bus";
 182                 #address-cells = <2>;
 183                 #size-cells = <1>;
 184                 ranges = <0 0 0 0x08000000 0x04000000>,
 185                          <1 0 0 0x14000000 0x04000000>,
 186                          <2 0 0 0x18000000 0x04000000>,
 187                          <3 0 0 0x1c000000 0x04000000>,
 188                          <4 0 0 0x0c000000 0x04000000>,
 189                          <5 0 0 0x10000000 0x04000000>;
 190
 191                 #interrupt-cells = <1>;
 192                 interrupt-map-mask = <0 0 15>;
 193                 interrupt-map = <0 0  0 &gic 0 0 0  68 IRQ_TYPE_LEVEL_HIGH>,
 194                                 <0 0  1 &gic 0 0 0  69 IRQ_TYPE_LEVEL_HIGH>,
 195                                 <0 0  2 &gic 0 0 0  70 IRQ_TYPE_LEVEL_HIGH>,
 196                                 <0 0  3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>,
 197                                 <0 0  4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>,
 198                                 <0 0  5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>,
 199                                 <0 0  6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>,
 200                                 <0 0  7 &gic 0 0 0 164 IRQ_TYPE_LEVEL_HIGH>,
 201                                 <0 0  8 &gic 0 0 0 165 IRQ_TYPE_LEVEL_HIGH>,
 202                                 <0 0  9 &gic 0 0 0 166 IRQ_TYPE_LEVEL_HIGH>,
 203                                 <0 0 10 &gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH>,
 204                                 <0 0 11 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>,
 205                                 <0 0 12 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>;
 206
 207                 /include/ "juno-motherboard.dtsi"
 208         };