arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27         };
  28
  29         psci {
  30                 compatible = "arm,psci-0.2";
  31                 method = "smc";
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 a57_0: cpu@0 {
  39                         compatible = "arm,cortex-a57", "arm,armv8";
  40                         reg = <0x0>;
  41                         device_type = "cpu";
  42                         next-level-cache = <&L2_CA57>;
  43                         enable-method = "psci";
  44                 };
  45
  46                 a57_1: cpu@1 {
  47                         compatible = "arm,cortex-a57","arm,armv8";
  48                         reg = <0x1>;
  49                         device_type = "cpu";
  50                         next-level-cache = <&L2_CA57>;
  51                         enable-method = "psci";
  52                 };
  53                 a57_2: cpu@2 {
  54                         compatible = "arm,cortex-a57","arm,armv8";
  55                         reg = <0x2>;
  56                         device_type = "cpu";
  57                         next-level-cache = <&L2_CA57>;
  58                         enable-method = "psci";
  59                 };
  60                 a57_3: cpu@3 {
  61                         compatible = "arm,cortex-a57","arm,armv8";
  62                         reg = <0x3>;
  63                         device_type = "cpu";
  64                         next-level-cache = <&L2_CA57>;
  65                         enable-method = "psci";
  66                 };
  67         };
  68
  69         L2_CA57: cache-controller@0 {
  70                 compatible = "cache";
  71                 cache-unified;
  72                 cache-level = <2>;
  73         };
  74
  75         L2_CA53: cache-controller@1 {
  76                 compatible = "cache";
  77                 cache-unified;
  78                 cache-level = <2>;
  79         };
  80
  81         extal_clk: extal {
  82                 compatible = "fixed-clock";
  83                 #clock-cells = <0>;
  84                 /* This value must be overridden by the board */
  85                 clock-frequency = <0>;
  86         };
  87
  88         extalr_clk: extalr {
  89                 compatible = "fixed-clock";
  90                 #clock-cells = <0>;
  91                 /* This value must be overridden by the board */
  92                 clock-frequency = <0>;
  93         };
  94
  95         /*
  96          * The external audio clocks are configured as 0 Hz fixed frequency
  97          * clocks by default.
  98          * Boards that provide audio clocks should override them.
  99          */
 100         audio_clk_a: audio_clk_a {
 101                 compatible = "fixed-clock";
 102                 #clock-cells = <0>;
 103                 clock-frequency = <0>;
 104         };
 105
 106         audio_clk_b: audio_clk_b {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 clock-frequency = <0>;
 110         };
 111
 112         audio_clk_c: audio_clk_c {
 113                 compatible = "fixed-clock";
 114                 #clock-cells = <0>;
 115                 clock-frequency = <0>;
 116         };
 117
 118         /* External CAN clock - to be overridden by boards that provide it */
 119         can_clk: can {
 120                 compatible = "fixed-clock";
 121                 #clock-cells = <0>;
 122                 clock-frequency = <0>;
 123                 status = "disabled";
 124         };
 125
 126         /* External SCIF clock - to be overridden by boards that provide it */
 127         scif_clk: scif {
 128                 compatible = "fixed-clock";
 129                 #clock-cells = <0>;
 130                 clock-frequency = <0>;
 131                 status = "disabled";
 132         };
 133
 134         soc {
 135                 compatible = "simple-bus";
 136                 interrupt-parent = <&gic>;
 137
 138                 #address-cells = <2>;
 139                 #size-cells = <2>;
 140                 ranges;
 141
 142                 gic: interrupt-controller@0xf1010000 {
 143                         compatible = "arm,gic-400";
 144                         #interrupt-cells = <3>;
 145                         #address-cells = <0>;
 146                         interrupt-controller;
 147                         reg = <0x0 0xf1010000 0 0x1000>,
 148                               <0x0 0xf1020000 0 0x2000>,
 149                               <0x0 0xf1040000 0 0x20000>,
 150                               <0x0 0xf1060000 0 0x2000>;
 151                         interrupts = <GIC_PPI 9
 152                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 153                 };
 154
 155                 gpio0: gpio@e6050000 {
 156                         compatible = "renesas,gpio-r8a7795",
 157                                      "renesas,gpio-rcar";
 158                         reg = <0 0xe6050000 0 0x50>;
 159                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 160                         #gpio-cells = <2>;
 161                         gpio-controller;
 162                         gpio-ranges = <&pfc 0 0 16>;
 163                         #interrupt-cells = <2>;
 164                         interrupt-controller;
 165                         clocks = <&cpg CPG_MOD 912>;
 166                         power-domains = <&cpg>;
 167                 };
 168
 169                 gpio1: gpio@e6051000 {
 170                         compatible = "renesas,gpio-r8a7795",
 171                                      "renesas,gpio-rcar";
 172                         reg = <0 0xe6051000 0 0x50>;
 173                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 174                         #gpio-cells = <2>;
 175                         gpio-controller;
 176                         gpio-ranges = <&pfc 0 32 28>;
 177                         #interrupt-cells = <2>;
 178                         interrupt-controller;
 179                         clocks = <&cpg CPG_MOD 911>;
 180                         power-domains = <&cpg>;
 181                 };
 182
 183                 gpio2: gpio@e6052000 {
 184                         compatible = "renesas,gpio-r8a7795",
 185                                      "renesas,gpio-rcar";
 186                         reg = <0 0xe6052000 0 0x50>;
 187                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 188                         #gpio-cells = <2>;
 189                         gpio-controller;
 190                         gpio-ranges = <&pfc 0 64 15>;
 191                         #interrupt-cells = <2>;
 192                         interrupt-controller;
 193                         clocks = <&cpg CPG_MOD 910>;
 194                         power-domains = <&cpg>;
 195                 };
 196
 197                 gpio3: gpio@e6053000 {
 198                         compatible = "renesas,gpio-r8a7795",
 199                                      "renesas,gpio-rcar";
 200                         reg = <0 0xe6053000 0 0x50>;
 201                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 202                         #gpio-cells = <2>;
 203                         gpio-controller;
 204                         gpio-ranges = <&pfc 0 96 16>;
 205                         #interrupt-cells = <2>;
 206                         interrupt-controller;
 207                         clocks = <&cpg CPG_MOD 909>;
 208                         power-domains = <&cpg>;
 209                 };
 210
 211                 gpio4: gpio@e6054000 {
 212                         compatible = "renesas,gpio-r8a7795",
 213                                      "renesas,gpio-rcar";
 214                         reg = <0 0xe6054000 0 0x50>;
 215                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 216                         #gpio-cells = <2>;
 217                         gpio-controller;
 218                         gpio-ranges = <&pfc 0 128 18>;
 219                         #interrupt-cells = <2>;
 220                         interrupt-controller;
 221                         clocks = <&cpg CPG_MOD 908>;
 222                         power-domains = <&cpg>;
 223                 };
 224
 225                 gpio5: gpio@e6055000 {
 226                         compatible = "renesas,gpio-r8a7795",
 227                                      "renesas,gpio-rcar";
 228                         reg = <0 0xe6055000 0 0x50>;
 229                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 230                         #gpio-cells = <2>;
 231                         gpio-controller;
 232                         gpio-ranges = <&pfc 0 160 26>;
 233                         #interrupt-cells = <2>;
 234                         interrupt-controller;
 235                         clocks = <&cpg CPG_MOD 907>;
 236                         power-domains = <&cpg>;
 237                 };
 238
 239                 gpio6: gpio@e6055400 {
 240                         compatible = "renesas,gpio-r8a7795",
 241                                      "renesas,gpio-rcar";
 242                         reg = <0 0xe6055400 0 0x50>;
 243                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 244                         #gpio-cells = <2>;
 245                         gpio-controller;
 246                         gpio-ranges = <&pfc 0 192 32>;
 247                         #interrupt-cells = <2>;
 248                         interrupt-controller;
 249                         clocks = <&cpg CPG_MOD 906>;
 250                         power-domains = <&cpg>;
 251                 };
 252
 253                 gpio7: gpio@e6055800 {
 254                         compatible = "renesas,gpio-r8a7795",
 255                                      "renesas,gpio-rcar";
 256                         reg = <0 0xe6055800 0 0x50>;
 257                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 258                         #gpio-cells = <2>;
 259                         gpio-controller;
 260                         gpio-ranges = <&pfc 0 224 4>;
 261                         #interrupt-cells = <2>;
 262                         interrupt-controller;
 263                         clocks = <&cpg CPG_MOD 905>;
 264                         power-domains = <&cpg>;
 265                 };
 266
 267                 pmu_a57 {
 268                         compatible = "arm,cortex-a57-pmu";
 269                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 270                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 271                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 272                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 273                         interrupt-affinity = <&a57_0>,
 274                                              <&a57_1>,
 275                                              <&a57_2>,
 276                                              <&a57_3>;
 277                 };
 278
 279                 timer {
 280                         compatible = "arm,armv8-timer";
 281                         interrupts = <GIC_PPI 13
 282                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 283                                      <GIC_PPI 14
 284                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 285                                      <GIC_PPI 11
 286                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 287                                      <GIC_PPI 10
 288                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 289                 };
 290
 291                 cpg: clock-controller@e6150000 {
 292                         compatible = "renesas,r8a7795-cpg-mssr";
 293                         reg = <0 0xe6150000 0 0x1000>;
 294                         clocks = <&extal_clk>, <&extalr_clk>;
 295                         clock-names = "extal", "extalr";
 296                         #clock-cells = <2>;
 297                         #power-domain-cells = <0>;
 298                 };
 299
 300                 audma0: dma-controller@ec700000 {
 301                         compatible = "renesas,rcar-dmac";
 302                         reg = <0 0xec700000 0 0x10000>;
 303                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 304                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 305                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 306                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 307                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 308                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 309                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 310                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 311                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 312                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 313                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 314                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 315                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 316                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 317                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 318                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 319                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 320                         interrupt-names = "error",
 321                                         "ch0", "ch1", "ch2", "ch3",
 322                                         "ch4", "ch5", "ch6", "ch7",
 323                                         "ch8", "ch9", "ch10", "ch11",
 324                                         "ch12", "ch13", "ch14", "ch15";
 325                         clocks = <&cpg CPG_MOD 502>;
 326                         clock-names = "fck";
 327                         power-domains = <&cpg>;
 328                         #dma-cells = <1>;
 329                         dma-channels = <16>;
 330                 };
 331
 332                 audma1: dma-controller@ec720000 {
 333                         compatible = "renesas,rcar-dmac";
 334                         reg = <0 0xec720000 0 0x10000>;
 335                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 346                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 347                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 348                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 350                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 351                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 352                         interrupt-names = "error",
 353                                         "ch0", "ch1", "ch2", "ch3",
 354                                         "ch4", "ch5", "ch6", "ch7",
 355                                         "ch8", "ch9", "ch10", "ch11",
 356                                         "ch12", "ch13", "ch14", "ch15";
 357                         clocks = <&cpg CPG_MOD 501>;
 358                         clock-names = "fck";
 359                         power-domains = <&cpg>;
 360                         #dma-cells = <1>;
 361                         dma-channels = <16>;
 362                 };
 363
 364                 pfc: pfc@e6060000 {
 365                         compatible = "renesas,pfc-r8a7795";
 366                         reg = <0 0xe6060000 0 0x50c>;
 367                 };
 368
 369                 intc_ex: interrupt-controller@e61c0000 {
 370                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 371                         #interrupt-cells = <2>;
 372                         interrupt-controller;
 373                         reg = <0 0xe61c0000 0 0x200>;
 374                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 375                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 376                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 377                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 378                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 379                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 380                         clocks = <&cpg CPG_MOD 407>;
 381                         power-domains = <&cpg>;
 382                 };
 383
 384                 dmac0: dma-controller@e6700000 {
 385                         compatible = "renesas,dmac-r8a7795",
 386                                      "renesas,rcar-dmac";
 387                         reg = <0 0xe6700000 0 0x10000>;
 388                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 389                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 390                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 391                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 392                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 393                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 394                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 395                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 396                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 397                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 398                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 399                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 400                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 401                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 402                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 403                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 404                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 405                         interrupt-names = "error",
 406                                         "ch0", "ch1", "ch2", "ch3",
 407                                         "ch4", "ch5", "ch6", "ch7",
 408                                         "ch8", "ch9", "ch10", "ch11",
 409                                         "ch12", "ch13", "ch14", "ch15";
 410                         clocks = <&cpg CPG_MOD 219>;
 411                         clock-names = "fck";
 412                         power-domains = <&cpg>;
 413                         #dma-cells = <1>;
 414                         dma-channels = <16>;
 415                 };
 416
 417                 dmac1: dma-controller@e7300000 {
 418                         compatible = "renesas,dmac-r8a7795",
 419                                      "renesas,rcar-dmac";
 420                         reg = <0 0xe7300000 0 0x10000>;
 421                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 438                         interrupt-names = "error",
 439                                         "ch0", "ch1", "ch2", "ch3",
 440                                         "ch4", "ch5", "ch6", "ch7",
 441                                         "ch8", "ch9", "ch10", "ch11",
 442                                         "ch12", "ch13", "ch14", "ch15";
 443                         clocks = <&cpg CPG_MOD 218>;
 444                         clock-names = "fck";
 445                         power-domains = <&cpg>;
 446                         #dma-cells = <1>;
 447                         dma-channels = <16>;
 448                 };
 449
 450                 dmac2: dma-controller@e7310000 {
 451                         compatible = "renesas,dmac-r8a7795",
 452                                      "renesas,rcar-dmac";
 453                         reg = <0 0xe7310000 0 0x10000>;
 454                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 471                         interrupt-names = "error",
 472                                         "ch0", "ch1", "ch2", "ch3",
 473                                         "ch4", "ch5", "ch6", "ch7",
 474                                         "ch8", "ch9", "ch10", "ch11",
 475                                         "ch12", "ch13", "ch14", "ch15";
 476                         clocks = <&cpg CPG_MOD 217>;
 477                         clock-names = "fck";
 478                         power-domains = <&cpg>;
 479                         #dma-cells = <1>;
 480                         dma-channels = <16>;
 481                 };
 482
 483                 avb: ethernet@e6800000 {
 484                         compatible = "renesas,etheravb-r8a7795",
 485                                      "renesas,etheravb-rcar-gen3";
 486                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 487                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 488                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 489                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 490                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 501                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 502                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 503                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 504                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 505                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 506                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 507                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 508                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 509                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 510                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 512                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 513                                           "ch4", "ch5", "ch6", "ch7",
 514                                           "ch8", "ch9", "ch10", "ch11",
 515                                           "ch12", "ch13", "ch14", "ch15",
 516                                           "ch16", "ch17", "ch18", "ch19",
 517                                           "ch20", "ch21", "ch22", "ch23",
 518                                           "ch24";
 519                         clocks = <&cpg CPG_MOD 812>;
 520                         power-domains = <&cpg>;
 521                         phy-mode = "rgmii-id";
 522                         #address-cells = <1>;
 523                         #size-cells = <0>;
 524                 };
 525
 526                 can0: can@e6c30000 {
 527                         compatible = "renesas,can-r8a7795",
 528                                      "renesas,rcar-gen3-can";
 529                         reg = <0 0xe6c30000 0 0x1000>;
 530                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 531                         clocks = <&cpg CPG_MOD 916>,
 532                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 533                                <&can_clk>;
 534                         clock-names = "clkp1", "clkp2", "can_clk";
 535                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 536                         assigned-clock-rates = <40000000>;
 537                         power-domains = <&cpg>;
 538                         status = "disabled";
 539                 };
 540
 541                 can1: can@e6c38000 {
 542                         compatible = "renesas,can-r8a7795",
 543                                      "renesas,rcar-gen3-can";
 544                         reg = <0 0xe6c38000 0 0x1000>;
 545                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 546                         clocks = <&cpg CPG_MOD 915>,
 547                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 548                                <&can_clk>;
 549                         clock-names = "clkp1", "clkp2", "can_clk";
 550                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 551                         assigned-clock-rates = <40000000>;
 552                         power-domains = <&cpg>;
 553                         status = "disabled";
 554                 };
 555
 556                 hscif0: serial@e6540000 {
 557                         compatible = "renesas,hscif-r8a7795",
 558                                      "renesas,rcar-gen3-hscif",
 559                                      "renesas,hscif";
 560                         reg = <0 0xe6540000 0 96>;
 561                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&cpg CPG_MOD 520>,
 563                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 564                                  <&scif_clk>;
 565                         clock-names = "fck", "brg_int", "scif_clk";
 566                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 567                         dma-names = "tx", "rx";
 568                         power-domains = <&cpg>;
 569                         status = "disabled";
 570                 };
 571
 572                 hscif1: serial@e6550000 {
 573                         compatible = "renesas,hscif-r8a7795",
 574                                      "renesas,rcar-gen3-hscif",
 575                                      "renesas,hscif";
 576                         reg = <0 0xe6550000 0 96>;
 577                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&cpg CPG_MOD 519>,
 579                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 580                                  <&scif_clk>;
 581                         clock-names = "fck", "brg_int", "scif_clk";
 582                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 583                         dma-names = "tx", "rx";
 584                         power-domains = <&cpg>;
 585                         status = "disabled";
 586                 };
 587
 588                 hscif2: serial@e6560000 {
 589                         compatible = "renesas,hscif-r8a7795",
 590                                      "renesas,rcar-gen3-hscif",
 591                                      "renesas,hscif";
 592                         reg = <0 0xe6560000 0 96>;
 593                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 594                         clocks = <&cpg CPG_MOD 518>,
 595                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 596                                  <&scif_clk>;
 597                         clock-names = "fck", "brg_int", "scif_clk";
 598                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 599                         dma-names = "tx", "rx";
 600                         power-domains = <&cpg>;
 601                         status = "disabled";
 602                 };
 603
 604                 hscif3: serial@e66a0000 {
 605                         compatible = "renesas,hscif-r8a7795",
 606                                      "renesas,rcar-gen3-hscif",
 607                                      "renesas,hscif";
 608                         reg = <0 0xe66a0000 0 96>;
 609                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 610                         clocks = <&cpg CPG_MOD 517>,
 611                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 612                                  <&scif_clk>;
 613                         clock-names = "fck", "brg_int", "scif_clk";
 614                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 615                         dma-names = "tx", "rx";
 616                         power-domains = <&cpg>;
 617                         status = "disabled";
 618                 };
 619
 620                 hscif4: serial@e66b0000 {
 621                         compatible = "renesas,hscif-r8a7795",
 622                                      "renesas,rcar-gen3-hscif",
 623                                      "renesas,hscif";
 624                         reg = <0 0xe66b0000 0 96>;
 625                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 626                         clocks = <&cpg CPG_MOD 516>,
 627                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 628                                  <&scif_clk>;
 629                         clock-names = "fck", "brg_int", "scif_clk";
 630                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 631                         dma-names = "tx", "rx";
 632                         power-domains = <&cpg>;
 633                         status = "disabled";
 634                 };
 635
 636                 scif0: serial@e6e60000 {
 637                         compatible = "renesas,scif-r8a7795",
 638                                      "renesas,rcar-gen3-scif", "renesas,scif";
 639                         reg = <0 0xe6e60000 0 64>;
 640                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 641                         clocks = <&cpg CPG_MOD 207>,
 642                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 643                                  <&scif_clk>;
 644                         clock-names = "fck", "brg_int", "scif_clk";
 645                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 646                         dma-names = "tx", "rx";
 647                         power-domains = <&cpg>;
 648                         status = "disabled";
 649                 };
 650
 651                 scif1: serial@e6e68000 {
 652                         compatible = "renesas,scif-r8a7795",
 653                                      "renesas,rcar-gen3-scif", "renesas,scif";
 654                         reg = <0 0xe6e68000 0 64>;
 655                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 656                         clocks = <&cpg CPG_MOD 206>,
 657                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 658                                  <&scif_clk>;
 659                         clock-names = "fck", "brg_int", "scif_clk";
 660                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 661                         dma-names = "tx", "rx";
 662                         power-domains = <&cpg>;
 663                         status = "disabled";
 664                 };
 665
 666                 scif2: serial@e6e88000 {
 667                         compatible = "renesas,scif-r8a7795",
 668                                      "renesas,rcar-gen3-scif", "renesas,scif";
 669                         reg = <0 0xe6e88000 0 64>;
 670                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 671                         clocks = <&cpg CPG_MOD 310>,
 672                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 673                                  <&scif_clk>;
 674                         clock-names = "fck", "brg_int", "scif_clk";
 675                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 676                         dma-names = "tx", "rx";
 677                         power-domains = <&cpg>;
 678                         status = "disabled";
 679                 };
 680
 681                 scif3: serial@e6c50000 {
 682                         compatible = "renesas,scif-r8a7795",
 683                                      "renesas,rcar-gen3-scif", "renesas,scif";
 684                         reg = <0 0xe6c50000 0 64>;
 685                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 686                         clocks = <&cpg CPG_MOD 204>,
 687                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 688                                  <&scif_clk>;
 689                         clock-names = "fck", "brg_int", "scif_clk";
 690                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 691                         dma-names = "tx", "rx";
 692                         power-domains = <&cpg>;
 693                         status = "disabled";
 694                 };
 695
 696                 scif4: serial@e6c40000 {
 697                         compatible = "renesas,scif-r8a7795",
 698                                      "renesas,rcar-gen3-scif", "renesas,scif";
 699                         reg = <0 0xe6c40000 0 64>;
 700                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 701                         clocks = <&cpg CPG_MOD 203>,
 702                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 703                                  <&scif_clk>;
 704                         clock-names = "fck", "brg_int", "scif_clk";
 705                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 706                         dma-names = "tx", "rx";
 707                         power-domains = <&cpg>;
 708                         status = "disabled";
 709                 };
 710
 711                 scif5: serial@e6f30000 {
 712                         compatible = "renesas,scif-r8a7795",
 713                                      "renesas,rcar-gen3-scif", "renesas,scif";
 714                         reg = <0 0xe6f30000 0 64>;
 715                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 716                         clocks = <&cpg CPG_MOD 202>,
 717                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 718                                  <&scif_clk>;
 719                         clock-names = "fck", "brg_int", "scif_clk";
 720                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 721                         dma-names = "tx", "rx";
 722                         power-domains = <&cpg>;
 723                         status = "disabled";
 724                 };
 725
 726                 i2c0: i2c@e6500000 {
 727                         #address-cells = <1>;
 728                         #size-cells = <0>;
 729                         compatible = "renesas,i2c-r8a7795";
 730                         reg = <0 0xe6500000 0 0x40>;
 731                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 732                         clocks = <&cpg CPG_MOD 931>;
 733                         power-domains = <&cpg>;
 734                         i2c-scl-internal-delay-ns = <110>;
 735                         status = "disabled";
 736                 };
 737
 738                 i2c1: i2c@e6508000 {
 739                         #address-cells = <1>;
 740                         #size-cells = <0>;
 741                         compatible = "renesas,i2c-r8a7795";
 742                         reg = <0 0xe6508000 0 0x40>;
 743                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 744                         clocks = <&cpg CPG_MOD 930>;
 745                         power-domains = <&cpg>;
 746                         i2c-scl-internal-delay-ns = <6>;
 747                         status = "disabled";
 748                 };
 749
 750                 i2c2: i2c@e6510000 {
 751                         #address-cells = <1>;
 752                         #size-cells = <0>;
 753                         compatible = "renesas,i2c-r8a7795";
 754                         reg = <0 0xe6510000 0 0x40>;
 755                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 756                         clocks = <&cpg CPG_MOD 929>;
 757                         power-domains = <&cpg>;
 758                         i2c-scl-internal-delay-ns = <6>;
 759                         status = "disabled";
 760                 };
 761
 762                 i2c3: i2c@e66d0000 {
 763                         #address-cells = <1>;
 764                         #size-cells = <0>;
 765                         compatible = "renesas,i2c-r8a7795";
 766                         reg = <0 0xe66d0000 0 0x40>;
 767                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 768                         clocks = <&cpg CPG_MOD 928>;
 769                         power-domains = <&cpg>;
 770                         i2c-scl-internal-delay-ns = <110>;
 771                         status = "disabled";
 772                 };
 773
 774                 i2c4: i2c@e66d8000 {
 775                         #address-cells = <1>;
 776                         #size-cells = <0>;
 777                         compatible = "renesas,i2c-r8a7795";
 778                         reg = <0 0xe66d8000 0 0x40>;
 779                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 780                         clocks = <&cpg CPG_MOD 927>;
 781                         power-domains = <&cpg>;
 782                         i2c-scl-internal-delay-ns = <110>;
 783                         status = "disabled";
 784                 };
 785
 786                 i2c5: i2c@e66e0000 {
 787                         #address-cells = <1>;
 788                         #size-cells = <0>;
 789                         compatible = "renesas,i2c-r8a7795";
 790                         reg = <0 0xe66e0000 0 0x40>;
 791                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 792                         clocks = <&cpg CPG_MOD 919>;
 793                         power-domains = <&cpg>;
 794                         i2c-scl-internal-delay-ns = <110>;
 795                         status = "disabled";
 796                 };
 797
 798                 i2c6: i2c@e66e8000 {
 799                         #address-cells = <1>;
 800                         #size-cells = <0>;
 801                         compatible = "renesas,i2c-r8a7795";
 802                         reg = <0 0xe66e8000 0 0x40>;
 803                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 804                         clocks = <&cpg CPG_MOD 918>;
 805                         power-domains = <&cpg>;
 806                         i2c-scl-internal-delay-ns = <6>;
 807                         status = "disabled";
 808                 };
 809
 810                 rcar_sound: sound@ec500000 {
 811                         /*
 812                          * #sound-dai-cells is required
 813                          *
 814                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 815                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 816                          */
 817                         /*
 818                          * #clock-cells is required for audio_clkout0/1/2/3
 819                          *
 820                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 821                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 822                          */
 823                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 824                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 825                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 826                                 <0 0xec540000 0 0x1000>, /* SSIU */
 827                                 <0 0xec541000 0 0x280>,  /* SSI */
 828                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 829                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 830
 831                         clocks = <&cpg CPG_MOD 1005>,
 832                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 833                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 834                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 835                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 836                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 837                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 838                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 839                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 840                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 841                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 842                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 843                                  <&audio_clk_a>, <&audio_clk_b>,
 844                                  <&audio_clk_c>,
 845                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 846                         clock-names = "ssi-all",
 847                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 848                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 849                                       "ssi.1", "ssi.0",
 850                                       "src.9", "src.8", "src.7", "src.6",
 851                                       "src.5", "src.4", "src.3", "src.2",
 852                                       "src.1", "src.0",
 853                                       "dvc.0", "dvc.1",
 854                                       "clk_a", "clk_b", "clk_c", "clk_i";
 855                         power-domains = <&cpg>;
 856                         status = "disabled";
 857
 858                         rcar_sound,dvc {
 859                                 dvc0: dvc@0 {
 860                                         dmas = <&audma0 0xbc>;
 861                                         dma-names = "tx";
 862                                 };
 863                                 dvc1: dvc@1 {
 864                                         dmas = <&audma0 0xbe>;
 865                                         dma-names = "tx";
 866                                 };
 867                         };
 868
 869                         rcar_sound,src {
 870                                 src0: src@0 {
 871                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 872                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 873                                         dma-names = "rx", "tx";
 874                                 };
 875                                 src1: src@1 {
 876                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 877                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 878                                         dma-names = "rx", "tx";
 879                                 };
 880                                 src2: src@2 {
 881                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 882                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 883                                         dma-names = "rx", "tx";
 884                                 };
 885                                 src3: src@3 {
 886                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 887                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 888                                         dma-names = "rx", "tx";
 889                                 };
 890                                 src4: src@4 {
 891                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 892                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 893                                         dma-names = "rx", "tx";
 894                                 };
 895                                 src5: src@5 {
 896                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 897                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 898                                         dma-names = "rx", "tx";
 899                                 };
 900                                 src6: src@6 {
 901                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 902                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 903                                         dma-names = "rx", "tx";
 904                                 };
 905                                 src7: src@7 {
 906                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 907                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 908                                         dma-names = "rx", "tx";
 909                                 };
 910                                 src8: src@8 {
 911                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 912                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 913                                         dma-names = "rx", "tx";
 914                                 };
 915                                 src9: src@9 {
 916                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 917                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 918                                         dma-names = "rx", "tx";
 919                                 };
 920                         };
 921
 922                         rcar_sound,ssi {
 923                                 ssi0: ssi@0 {
 924                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 925                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 926                                         dma-names = "rx", "tx", "rxu", "txu";
 927                                 };
 928                                 ssi1: ssi@1 {
 929                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
 930                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
 931                                         dma-names = "rx", "tx", "rxu", "txu";
 932                                 };
 933                                 ssi2: ssi@2 {
 934                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
 935                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
 936                                         dma-names = "rx", "tx", "rxu", "txu";
 937                                 };
 938                                 ssi3: ssi@3 {
 939                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
 940                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
 941                                         dma-names = "rx", "tx", "rxu", "txu";
 942                                 };
 943                                 ssi4: ssi@4 {
 944                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
 945                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
 946                                         dma-names = "rx", "tx", "rxu", "txu";
 947                                 };
 948                                 ssi5: ssi@5 {
 949                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
 950                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
 951                                         dma-names = "rx", "tx", "rxu", "txu";
 952                                 };
 953                                 ssi6: ssi@6 {
 954                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
 955                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
 956                                         dma-names = "rx", "tx", "rxu", "txu";
 957                                 };
 958                                 ssi7: ssi@7 {
 959                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
 960                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
 961                                         dma-names = "rx", "tx", "rxu", "txu";
 962                                 };
 963                                 ssi8: ssi@8 {
 964                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
 965                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
 966                                         dma-names = "rx", "tx", "rxu", "txu";
 967                                 };
 968                                 ssi9: ssi@9 {
 969                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
 970                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
 971                                         dma-names = "rx", "tx", "rxu", "txu";
 972                                 };
 973                         };
 974                 };
 975
 976                 sata: sata@ee300000 {
 977                         compatible = "renesas,sata-r8a7795";
 978                         reg = <0 0xee300000 0 0x1fff>;
 979                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 980                         clocks = <&cpg CPG_MOD 815>;
 981                         status = "disabled";
 982                 };
 983
 984                 xhci0: usb@ee000000 {
 985                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
 986                         reg = <0 0xee000000 0 0xc00>;
 987                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 988                         clocks = <&cpg CPG_MOD 328>;
 989                         power-domains = <&cpg>;
 990                         status = "disabled";
 991                 };
 992
 993                 xhci1: usb@ee0400000 {
 994                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
 995                         reg = <0 0xee040000 0 0xc00>;
 996                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 997                         clocks = <&cpg CPG_MOD 327>;
 998                         power-domains = <&cpg>;
 999                         status = "disabled";
1000                 };
1001
1002                 usb_dmac0: dma-controller@e65a0000 {
1003                         compatible = "renesas,r8a7795-usb-dmac",
1004                                      "renesas,usb-dmac";
1005                         reg = <0 0xe65a0000 0 0x100>;
1006                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1007                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1008                         interrupt-names = "ch0", "ch1";
1009                         clocks = <&cpg CPG_MOD 330>;
1010                         power-domains = <&cpg>;
1011                         #dma-cells = <1>;
1012                         dma-channels = <2>;
1013                 };
1014
1015                 usb_dmac1: dma-controller@e65b0000 {
1016                         compatible = "renesas,r8a7795-usb-dmac",
1017                                      "renesas,usb-dmac";
1018                         reg = <0 0xe65b0000 0 0x100>;
1019                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1020                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1021                         interrupt-names = "ch0", "ch1";
1022                         clocks = <&cpg CPG_MOD 331>;
1023                         power-domains = <&cpg>;
1024                         #dma-cells = <1>;
1025                         dma-channels = <2>;
1026                 };
1027
1028                 sdhi0: sd@ee100000 {
1029                         compatible = "renesas,sdhi-r8a7795";
1030                         reg = <0 0xee100000 0 0x2000>;
1031                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1032                         clocks = <&cpg CPG_MOD 314>;
1033                         power-domains = <&cpg>;
1034                         status = "disabled";
1035                 };
1036
1037                 sdhi1: sd@ee120000 {
1038                         compatible = "renesas,sdhi-r8a7795";
1039                         reg = <0 0xee120000 0 0x2000>;
1040                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1041                         clocks = <&cpg CPG_MOD 313>;
1042                         power-domains = <&cpg>;
1043                         status = "disabled";
1044                 };
1045
1046                 sdhi2: sd@ee140000 {
1047                         compatible = "renesas,sdhi-r8a7795";
1048                         reg = <0 0xee140000 0 0x2000>;
1049                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1050                         clocks = <&cpg CPG_MOD 312>;
1051                         power-domains = <&cpg>;
1052                         cap-mmc-highspeed;
1053                         status = "disabled";
1054                 };
1055
1056                 sdhi3: sd@ee160000 {
1057                         compatible = "renesas,sdhi-r8a7795";
1058                         reg = <0 0xee160000 0 0x2000>;
1059                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1060                         clocks = <&cpg CPG_MOD 311>;
1061                         power-domains = <&cpg>;
1062                         cap-mmc-highspeed;
1063                         status = "disabled";
1064                 };
1065
1066                 usb2_phy0: usb-phy@ee080200 {
1067                         compatible = "renesas,usb2-phy-r8a7795";
1068                         reg = <0 0xee080200 0 0x700>;
1069                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1070                         clocks = <&cpg CPG_MOD 703>;
1071                         power-domains = <&cpg>;
1072                         #phy-cells = <0>;
1073                         status = "disabled";
1074                 };
1075
1076                 usb2_phy1: usb-phy@ee0a0200 {
1077                         compatible = "renesas,usb2-phy-r8a7795";
1078                         reg = <0 0xee0a0200 0 0x700>;
1079                         clocks = <&cpg CPG_MOD 702>;
1080                         power-domains = <&cpg>;
1081                         #phy-cells = <0>;
1082                         status = "disabled";
1083                 };
1084
1085                 usb2_phy2: usb-phy@ee0c0200 {
1086                         compatible = "renesas,usb2-phy-r8a7795";
1087                         reg = <0 0xee0c0200 0 0x700>;
1088                         clocks = <&cpg CPG_MOD 701>;
1089                         power-domains = <&cpg>;
1090                         #phy-cells = <0>;
1091                         status = "disabled";
1092                 };
1093
1094                 ehci0: usb@ee080100 {
1095                         compatible = "generic-ehci";
1096                         reg = <0 0xee080100 0 0x100>;
1097                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1098                         clocks = <&cpg CPG_MOD 703>;
1099                         phys = <&usb2_phy0>;
1100                         phy-names = "usb";
1101                         power-domains = <&cpg>;
1102                         status = "disabled";
1103                 };
1104
1105                 ehci1: usb@ee0a0100 {
1106                         compatible = "generic-ehci";
1107                         reg = <0 0xee0a0100 0 0x100>;
1108                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1109                         clocks = <&cpg CPG_MOD 702>;
1110                         phys = <&usb2_phy1>;
1111                         phy-names = "usb";
1112                         power-domains = <&cpg>;
1113                         status = "disabled";
1114                 };
1115
1116                 ehci2: usb@ee0c0100 {
1117                         compatible = "generic-ehci";
1118                         reg = <0 0xee0c0100 0 0x100>;
1119                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1120                         clocks = <&cpg CPG_MOD 701>;
1121                         phys = <&usb2_phy2>;
1122                         phy-names = "usb";
1123                         power-domains = <&cpg>;
1124                         status = "disabled";
1125                 };
1126
1127                 ohci0: usb@ee080000 {
1128                         compatible = "generic-ohci";
1129                         reg = <0 0xee080000 0 0x100>;
1130                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1131                         clocks = <&cpg CPG_MOD 703>;
1132                         phys = <&usb2_phy0>;
1133                         phy-names = "usb";
1134                         power-domains = <&cpg>;
1135                         status = "disabled";
1136                 };
1137
1138                 ohci1: usb@ee0a0000 {
1139                         compatible = "generic-ohci";
1140                         reg = <0 0xee0a0000 0 0x100>;
1141                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1142                         clocks = <&cpg CPG_MOD 702>;
1143                         phys = <&usb2_phy1>;
1144                         phy-names = "usb";
1145                         power-domains = <&cpg>;
1146                         status = "disabled";
1147                 };
1148
1149                 ohci2: usb@ee0c0000 {
1150                         compatible = "generic-ohci";
1151                         reg = <0 0xee0c0000 0 0x100>;
1152                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1153                         clocks = <&cpg CPG_MOD 701>;
1154                         phys = <&usb2_phy2>;
1155                         phy-names = "usb";
1156                         power-domains = <&cpg>;
1157                         status = "disabled";
1158                 };
1159         };
1160 };