2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/sched.h>
25 #include <linux/interrupt.h>
26 #include <linux/cache.h>
27 #include <linux/profile.h>
28 #include <linux/errno.h>
30 #include <linux/err.h>
31 #include <linux/cpu.h>
32 #include <linux/smp.h>
33 #include <linux/seq_file.h>
34 #include <linux/irq.h>
35 #include <linux/percpu.h>
36 #include <linux/clockchips.h>
37 #include <linux/completion.h>
39 #include <linux/irq_work.h>
41 #include <asm/alternative.h>
42 #include <asm/atomic.h>
43 #include <asm/cacheflush.h>
45 #include <asm/cputype.h>
46 #include <asm/cpu_ops.h>
47 #include <asm/mmu_context.h>
48 #include <asm/pgtable.h>
49 #include <asm/pgalloc.h>
50 #include <asm/processor.h>
51 #include <asm/smp_plat.h>
52 #include <asm/sections.h>
53 #include <asm/tlbflush.h>
54 #include <asm/ptrace.h>
56 #define CREATE_TRACE_POINTS
57 #include <trace/events/ipi.h>
60 * as from 2.5, kernels no longer have an init_tasks structure
61 * so we need some other way of telling a new secondary core
62 * where to place its SVC stack
64 struct secondary_data secondary_data;
75 * Boot a secondary CPU, and assign it the specified idle task.
76 * This also gives us the initial stack to use for this CPU.
78 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
80 if (cpu_ops[cpu]->cpu_boot)
81 return cpu_ops[cpu]->cpu_boot(cpu);
86 static DECLARE_COMPLETION(cpu_running);
88 int __cpu_up(unsigned int cpu, struct task_struct *idle)
93 * We need to tell the secondary core where to find its stack and the
96 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
97 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
100 * Now bring the CPU into our world.
102 ret = boot_secondary(cpu, idle);
105 * CPU was successfully started, wait for it to come online or
108 wait_for_completion_timeout(&cpu_running,
109 msecs_to_jiffies(1000));
111 if (!cpu_online(cpu)) {
112 pr_crit("CPU%u: failed to come online\n", cpu);
116 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
119 secondary_data.stack = NULL;
124 static void smp_store_cpu_info(unsigned int cpuid)
126 store_cpu_topology(cpuid);
130 * This is the secondary CPU boot entry. We're using this CPUs
131 * idle thread stack, but a set of temporary page tables.
133 asmlinkage void secondary_start_kernel(void)
135 struct mm_struct *mm = &init_mm;
136 unsigned int cpu = smp_processor_id();
139 * All kernel threads share the same mm context; grab a
140 * reference and switch to it.
142 atomic_inc(&mm->mm_count);
143 current->active_mm = mm;
144 cpumask_set_cpu(cpu, mm_cpumask(mm));
146 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
147 printk("CPU%u: Booted secondary processor\n", cpu);
150 * TTBR0 is only used for the identity mapping at this stage. Make it
151 * point to zero page to avoid speculatively fetching new entries.
153 cpu_set_reserved_ttbr0();
155 cpu_set_default_tcr_t0sz();
158 trace_hardirqs_off();
160 if (cpu_ops[cpu]->cpu_postboot)
161 cpu_ops[cpu]->cpu_postboot();
164 * Log the CPU info before it is marked online and might get read.
169 * Enable GIC and timers.
171 notify_cpu_starting(cpu);
173 smp_store_cpu_info(cpu);
176 * OK, now it's safe to let the boot CPU continue. Wait for
177 * the CPU migration code to notice that the CPU is online
178 * before we continue.
180 set_cpu_online(cpu, true);
181 complete(&cpu_running);
185 local_async_enable();
188 * OK, it's off to the idle thread for us
190 cpu_startup_entry(CPUHP_ONLINE);
193 #ifdef CONFIG_HOTPLUG_CPU
194 static int op_cpu_disable(unsigned int cpu)
197 * If we don't have a cpu_die method, abort before we reach the point
198 * of no return. CPU0 may not have an cpu_ops, so test for it.
200 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
204 * We may need to abort a hot unplug for some other mechanism-specific
207 if (cpu_ops[cpu]->cpu_disable)
208 return cpu_ops[cpu]->cpu_disable(cpu);
214 * __cpu_disable runs on the processor to be shutdown.
216 int __cpu_disable(void)
218 unsigned int cpu = smp_processor_id();
221 ret = op_cpu_disable(cpu);
226 * Take this CPU offline. Once we clear this, we can't return,
227 * and we must not schedule until we're ready to give up the cpu.
229 set_cpu_online(cpu, false);
232 * OK - migrate IRQs away from this CPU
237 * Remove this CPU from the vm mask set of all processes.
239 clear_tasks_mm_cpumask(cpu);
244 static int op_cpu_kill(unsigned int cpu)
247 * If we have no means of synchronising with the dying CPU, then assume
248 * that it is really dead. We can only wait for an arbitrary length of
249 * time and hope that it's dead, so let's skip the wait and just hope.
251 if (!cpu_ops[cpu]->cpu_kill)
254 return cpu_ops[cpu]->cpu_kill(cpu);
257 static DECLARE_COMPLETION(cpu_died);
260 * called on the thread which is asking for a CPU to be shutdown -
261 * waits until shutdown has completed, or it is timed out.
263 void __cpu_die(unsigned int cpu)
267 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
268 pr_crit("CPU%u: cpu didn't die\n", cpu);
271 pr_notice("CPU%u: shutdown\n", cpu);
274 * Now that the dying CPU is beyond the point of no return w.r.t.
275 * in-kernel synchronisation, try to get the firwmare to help us to
276 * verify that it has really left the kernel before we consider
277 * clobbering anything it might still be using.
279 err = op_cpu_kill(cpu);
281 pr_warn("CPU%d may not have shut down cleanly: %d\n",
286 * Called from the idle thread for the CPU which has been shutdown.
288 * Note that we disable IRQs here, but do not re-enable them
289 * before returning to the caller. This is also the behaviour
290 * of the other hotplug-cpu capable cores, so presumably coming
291 * out of idle fixes this.
295 unsigned int cpu = smp_processor_id();
301 /* Tell __cpu_die() that this CPU is now safe to dispose of */
305 * Actually shutdown the CPU. This must never fail. The specific hotplug
306 * mechanism must perform all required cache maintenance to ensure that
307 * no dirty lines are lost in the process of shutting down the CPU.
309 cpu_ops[cpu]->cpu_die(cpu);
315 void __init smp_cpus_done(unsigned int max_cpus)
317 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
318 do_post_cpus_up_work();
321 void __init smp_prepare_boot_cpu(void)
323 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
326 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
332 * A cpu node with missing "reg" property is
333 * considered invalid to build a cpu_logical_map
336 cell = of_get_property(dn, "reg", NULL);
338 pr_err("%s: missing reg property\n", dn->full_name);
342 hwid = of_read_number(cell, of_n_addr_cells(dn));
344 * Non affinity bits must be set to 0 in the DT
346 if (hwid & ~MPIDR_HWID_BITMASK) {
347 pr_err("%s: invalid reg property\n", dn->full_name);
354 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
355 * entries and check for duplicates. If any is found just ignore the
356 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
357 * matching valid MPIDR values.
359 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
363 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
364 if (cpu_logical_map(i) == hwid)
370 * Initialize cpu operations for a logical cpu and
371 * set it in the possible mask on success
373 static int __init smp_cpu_setup(int cpu)
375 if (cpu_read_ops(cpu))
378 if (cpu_ops[cpu]->cpu_init(cpu))
381 set_cpu_possible(cpu, true);
386 static bool bootcpu_valid __initdata;
387 static unsigned int cpu_count = 1;
391 * acpi_map_gic_cpu_interface - parse processor MADT entry
393 * Carry out sanity checks on MADT processor entry and initialize
394 * cpu_logical_map on success
397 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
399 u64 hwid = processor->arm_mpidr;
401 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
402 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
406 if (!(processor->flags & ACPI_MADT_ENABLED)) {
407 pr_err("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
411 if (is_mpidr_duplicate(cpu_count, hwid)) {
412 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
416 /* Check if GICC structure of boot CPU is available in the MADT */
417 if (cpu_logical_map(0) == hwid) {
419 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
423 bootcpu_valid = true;
427 if (cpu_count >= NR_CPUS)
430 /* map the logical cpu id to cpu MPIDR */
431 cpu_logical_map(cpu_count) = hwid;
437 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
438 const unsigned long end)
440 struct acpi_madt_generic_interrupt *processor;
442 processor = (struct acpi_madt_generic_interrupt *)header;
443 if (BAD_MADT_ENTRY(processor, end))
446 acpi_table_print_madt_entry(header);
448 acpi_map_gic_cpu_interface(processor);
453 #define acpi_table_parse_madt(...) do { } while (0)
457 * Enumerate the possible CPU set from the device tree and build the
458 * cpu logical map array containing MPIDR values related to logical
459 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
461 void __init of_parse_and_init_cpus(void)
463 struct device_node *dn = NULL;
465 while ((dn = of_find_node_by_type(dn, "cpu"))) {
466 u64 hwid = of_get_cpu_mpidr(dn);
468 if (hwid == INVALID_HWID)
471 if (is_mpidr_duplicate(cpu_count, hwid)) {
472 pr_err("%s: duplicate cpu reg properties in the DT\n",
478 * The numbering scheme requires that the boot CPU
479 * must be assigned logical id 0. Record it so that
480 * the logical map built from DT is validated and can
483 if (hwid == cpu_logical_map(0)) {
485 pr_err("%s: duplicate boot cpu reg property in DT\n",
490 bootcpu_valid = true;
493 * cpu_logical_map has already been
494 * initialized and the boot cpu doesn't need
495 * the enable-method so continue without
501 if (cpu_count >= NR_CPUS)
504 pr_debug("cpu logical map 0x%llx\n", hwid);
505 cpu_logical_map(cpu_count) = hwid;
512 * Enumerate the possible CPU set from the device tree or ACPI and build the
513 * cpu logical map array containing MPIDR values related to logical
514 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
516 void __init smp_init_cpus(void)
521 of_parse_and_init_cpus();
524 * do a walk of MADT to determine how many CPUs
525 * we have including disabled CPUs, and get information
526 * we need for SMP init
528 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
529 acpi_parse_gic_cpu_interface, 0);
531 if (cpu_count > NR_CPUS)
532 pr_warn("no. of cores (%d) greater than configured maximum of %d - clipping\n",
535 if (!bootcpu_valid) {
536 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
541 * We need to set the cpu_logical_map entries before enabling
542 * the cpus so that cpu processor description entries (DT cpu nodes
543 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
544 * with entries in cpu_logical_map while initializing the cpus.
545 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
547 for (i = 1; i < NR_CPUS; i++) {
548 if (cpu_logical_map(i) != INVALID_HWID) {
549 if (smp_cpu_setup(i))
550 cpu_logical_map(i) = INVALID_HWID;
555 void __init smp_prepare_cpus(unsigned int max_cpus)
558 unsigned int cpu, ncores = num_possible_cpus();
562 smp_store_cpu_info(smp_processor_id());
565 * are we trying to boot more cores than exist?
567 if (max_cpus > ncores)
570 /* Don't bother if we're effectively UP */
575 * Initialise the present map (which describes the set of CPUs
576 * actually populated at the present time) and release the
577 * secondaries from the bootloader.
579 * Make sure we online at most (max_cpus - 1) additional CPUs.
582 for_each_possible_cpu(cpu) {
586 if (cpu == smp_processor_id())
592 err = cpu_ops[cpu]->cpu_prepare(cpu);
596 set_cpu_present(cpu, true);
601 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
603 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
605 __smp_cross_call = fn;
608 static const char *ipi_types[NR_IPI] __tracepoint_string = {
609 #define S(x,s) [x] = s
610 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
611 S(IPI_CALL_FUNC, "Function call interrupts"),
612 S(IPI_CPU_STOP, "CPU stop interrupts"),
613 S(IPI_TIMER, "Timer broadcast interrupts"),
614 S(IPI_IRQ_WORK, "IRQ work interrupts"),
617 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
619 trace_ipi_raise(target, ipi_types[ipinr]);
620 __smp_cross_call(target, ipinr);
623 void show_ipi_list(struct seq_file *p, int prec)
627 for (i = 0; i < NR_IPI; i++) {
628 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
629 prec >= 4 ? " " : "");
630 for_each_online_cpu(cpu)
631 seq_printf(p, "%10u ",
632 __get_irq_stat(cpu, ipi_irqs[i]));
633 seq_printf(p, " %s\n", ipi_types[i]);
637 u64 smp_irq_stat_cpu(unsigned int cpu)
642 for (i = 0; i < NR_IPI; i++)
643 sum += __get_irq_stat(cpu, ipi_irqs[i]);
648 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
650 smp_cross_call(mask, IPI_CALL_FUNC);
653 void arch_send_call_function_single_ipi(int cpu)
655 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
658 #ifdef CONFIG_IRQ_WORK
659 void arch_irq_work_raise(void)
661 if (__smp_cross_call)
662 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
666 static DEFINE_RAW_SPINLOCK(stop_lock);
669 * ipi_cpu_stop - handle IPI from smp_send_stop()
671 static void ipi_cpu_stop(unsigned int cpu)
673 if (system_state == SYSTEM_BOOTING ||
674 system_state == SYSTEM_RUNNING) {
675 raw_spin_lock(&stop_lock);
676 pr_crit("CPU%u: stopping\n", cpu);
678 raw_spin_unlock(&stop_lock);
681 set_cpu_online(cpu, false);
690 * Main handler for inter-processor interrupts
692 void handle_IPI(int ipinr, struct pt_regs *regs)
694 unsigned int cpu = smp_processor_id();
695 struct pt_regs *old_regs = set_irq_regs(regs);
697 if ((unsigned)ipinr < NR_IPI) {
698 trace_ipi_entry(ipi_types[ipinr]);
699 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
709 generic_smp_call_function_interrupt();
719 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
722 tick_receive_broadcast();
727 #ifdef CONFIG_IRQ_WORK
736 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
740 if ((unsigned)ipinr < NR_IPI)
741 trace_ipi_exit(ipi_types[ipinr]);
742 set_irq_regs(old_regs);
745 void smp_send_reschedule(int cpu)
747 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
750 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
751 void tick_broadcast(const struct cpumask *mask)
753 smp_cross_call(mask, IPI_TIMER);
757 void smp_send_stop(void)
759 unsigned long timeout;
761 if (num_online_cpus() > 1) {
764 cpumask_copy(&mask, cpu_online_mask);
765 cpumask_clear_cpu(smp_processor_id(), &mask);
767 smp_cross_call(&mask, IPI_CPU_STOP);
770 /* Wait up to one second for other CPUs to stop */
771 timeout = USEC_PER_SEC;
772 while (num_online_cpus() > 1 && timeout--)
775 if (num_online_cpus() > 1)
776 pr_warning("SMP: failed to stop secondary CPUs\n");
782 int setup_profiling_timer(unsigned int multiplier)