arch/mips/boot/dts/mti/sead3.dts

   1 /dts-v1/;
   2
   3 /memreserve/ 0x00000000 0x00001000;     // reserved
   4 /memreserve/ 0x00001000 0x000ef000;     // ROM data
   5 /memreserve/ 0x000f0000 0x004cc000;     // reserved
   6
   7 #include <dt-bindings/interrupt-controller/mips-gic.h>
   8
   9 / {
  10         #address-cells = <1>;
  11         #size-cells = <1>;
  12         compatible = "mti,sead-3";
  13         interrupt-parent = <&gic>;
  14
  15         chosen {
  16                 stdout-path = "uart1:115200";
  17         };
  18
  19         aliases {
  20                 uart0 = &uart0;
  21                 uart1 = &uart1;
  22         };
  23
  24         cpus {
  25                 cpu@0 {
  26                         compatible = "mti,mips14KEc", "mti,mips14Kc";
  27                 };
  28         };
  29
  30         memory {
  31                 device_type = "memory";
  32                 reg = <0x0 0x08000000>;
  33         };
  34
  35         cpu_intc: interrupt-controller {
  36                 compatible = "mti,cpu-interrupt-controller";
  37
  38                 interrupt-controller;
  39                 #interrupt-cells = <1>;
  40         };
  41
  42         gic: interrupt-controller@1b1c0000 {
  43                 compatible = "mti,gic";
  44                 reg = <0x1b1c0000 0x20000>;
  45
  46                 interrupt-controller;
  47                 #interrupt-cells = <3>;
  48
  49                 /*
  50                  * Declare the interrupt-parent even though the mti,gic
  51                  * binding doesn't require it, such that the kernel can
  52                  * figure out that cpu_intc is the root interrupt
  53                  * controller & should be probed first.
  54                  */
  55                 interrupt-parent = <&cpu_intc>;
  56
  57                 timer {
  58                         compatible = "mti,gic-timer";
  59                         interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
  60                 };
  61         };
  62
  63         ehci@1b200000 {
  64                 compatible = "generic-ehci";
  65                 reg = <0x1b200000 0x1000>;
  66
  67                 interrupts = <0>; /* GIC 0 or CPU 6 */
  68
  69                 has-transaction-translator;
  70         };
  71
  72         flash@1c000000 {
  73                 compatible = "intel,28f128j3", "cfi-flash";
  74                 reg = <0x1c000000 0x2000000>;
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77                 bank-width = <4>;
  78
  79                 partitions {
  80                         compatible = "fixed-partitions";
  81                         #address-cells = <1>;
  82                         #size-cells = <1>;
  83
  84                         user-fs@0 {
  85                                 label = "User FS";
  86                                 reg = <0x0 0x1fc0000>;
  87                         };
  88
  89                         board-config@3e0000 {
  90                                 label = "Board Config";
  91                                 reg = <0x1fc0000 0x40000>;
  92                         };
  93                 };
  94         };
  95
  96         system-controller@1f000200 {
  97                 compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
  98                 reg = <0x1f000200 0x300>;
  99
 100                 led@10.0 {
 101                         compatible = "register-bit-led";
 102                         offset = <0x10>;
 103                         mask = <0x1>;
 104                         label = "pled0";
 105                 };
 106                 led@10.1 {
 107                         compatible = "register-bit-led";
 108                         offset = <0x10>;
 109                         mask = <0x2>;
 110                         label = "pled1";
 111                 };
 112                 led@10.2 {
 113                         compatible = "register-bit-led";
 114                         offset = <0x10>;
 115                         mask = <0x4>;
 116                         label = "pled2";
 117                 };
 118                 led@10.3 {
 119                         compatible = "register-bit-led";
 120                         offset = <0x10>;
 121                         mask = <0x8>;
 122                         label = "pled3";
 123                 };
 124                 led@10.4 {
 125                         compatible = "register-bit-led";
 126                         offset = <0x10>;
 127                         mask = <0x10>;
 128                         label = "pled4";
 129                 };
 130                 led@10.5 {
 131                         compatible = "register-bit-led";
 132                         offset = <0x10>;
 133                         mask = <0x20>;
 134                         label = "pled5";
 135                 };
 136                 led@10.6 {
 137                         compatible = "register-bit-led";
 138                         offset = <0x10>;
 139                         mask = <0x40>;
 140                         label = "pled6";
 141                 };
 142                 led@10.7 {
 143                         compatible = "register-bit-led";
 144                         offset = <0x10>;
 145                         mask = <0x80>;
 146                         label = "pled7";
 147                 };
 148
 149                 led@18.0 {
 150                         compatible = "register-bit-led";
 151                         offset = <0x18>;
 152                         mask = <0x1>;
 153                         label = "fled0";
 154                 };
 155                 led@18.1 {
 156                         compatible = "register-bit-led";
 157                         offset = <0x18>;
 158                         mask = <0x2>;
 159                         label = "fled1";
 160                 };
 161                 led@18.2 {
 162                         compatible = "register-bit-led";
 163                         offset = <0x18>;
 164                         mask = <0x4>;
 165                         label = "fled2";
 166                 };
 167                 led@18.3 {
 168                         compatible = "register-bit-led";
 169                         offset = <0x18>;
 170                         mask = <0x8>;
 171                         label = "fled3";
 172                 };
 173                 led@18.4 {
 174                         compatible = "register-bit-led";
 175                         offset = <0x18>;
 176                         mask = <0x10>;
 177                         label = "fled4";
 178                 };
 179                 led@18.5 {
 180                         compatible = "register-bit-led";
 181                         offset = <0x18>;
 182                         mask = <0x20>;
 183                         label = "fled5";
 184                 };
 185                 led@18.6 {
 186                         compatible = "register-bit-led";
 187                         offset = <0x18>;
 188                         mask = <0x40>;
 189                         label = "fled6";
 190                 };
 191                 led@18.7 {
 192                         compatible = "register-bit-led";
 193                         offset = <0x18>;
 194                         mask = <0x80>;
 195                         label = "fled7";
 196                 };
 197         };
 198
 199         /* UART connected to FTDI & miniUSB socket */
 200         uart0: uart@1f000900 {
 201                 compatible = "ns16550a";
 202                 reg = <0x1f000900 0x20>;
 203                 reg-io-width = <4>;
 204                 reg-shift = <2>;
 205
 206                 clock-frequency = <14745600>;
 207
 208                 interrupts = <3>; /* GIC 3 or CPU 4 */
 209
 210                 no-loopback-test;
 211         };
 212
 213         /* UART connected to RS232 socket */
 214         uart1: uart@1f000800 {
 215                 compatible = "ns16550a";
 216                 reg = <0x1f000800 0x20>;
 217                 reg-io-width = <4>;
 218                 reg-shift = <2>;
 219
 220                 clock-frequency = <14745600>;
 221
 222                 interrupts = <2>; /* GIC 2 or CPU 4 */
 223
 224                 no-loopback-test;
 225         };
 226
 227         eth@1f010000 {
 228                 compatible = "smsc,lan9115";
 229                 reg = <0x1f010000 0x10000>;
 230                 reg-io-width = <4>;
 231
 232                 interrupts = <0>; /* GIC 0 or CPU 6 */
 233
 234                 phy-mode = "mii";
 235                 smsc,irq-push-pull;
 236                 smsc,save-mac-address;
 237         };
 238 };