arch/mips/include/asm/mach-loongson32/irq.h

   1 /*
   2  * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
   3  *
   4  * IRQ mappings for Loongson 1
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #ifndef __ASM_MACH_LOONGSON32_IRQ_H
  13 #define __ASM_MACH_LOONGSON32_IRQ_H
  14
  15 /*
  16  * CPU core Interrupt Numbers
  17  */
  18 #define MIPS_CPU_IRQ_BASE               0
  19 #define MIPS_CPU_IRQ(x)                 (MIPS_CPU_IRQ_BASE + (x))
  20
  21 #define SOFTINT0_IRQ                    MIPS_CPU_IRQ(0)
  22 #define SOFTINT1_IRQ                    MIPS_CPU_IRQ(1)
  23 #define INT0_IRQ                        MIPS_CPU_IRQ(2)
  24 #define INT1_IRQ                        MIPS_CPU_IRQ(3)
  25 #define INT2_IRQ                        MIPS_CPU_IRQ(4)
  26 #define INT3_IRQ                        MIPS_CPU_IRQ(5)
  27 #define INT4_IRQ                        MIPS_CPU_IRQ(6)
  28 #define TIMER_IRQ                       MIPS_CPU_IRQ(7)         /* cpu timer */
  29
  30 #define MIPS_CPU_IRQS           (MIPS_CPU_IRQ(7) + 1 - MIPS_CPU_IRQ_BASE)
  31
  32 /*
  33  * INT0~3 Interrupt Numbers
  34  */
  35 #define LS1X_IRQ_BASE                   MIPS_CPU_IRQS
  36 #define LS1X_IRQ(n, x)                  (LS1X_IRQ_BASE + (n << 5) + (x))
  37
  38 #define LS1X_UART0_IRQ                  LS1X_IRQ(0, 2)
  39 #if defined(CONFIG_LOONGSON1_LS1B)
  40 #define LS1X_UART1_IRQ                  LS1X_IRQ(0, 3)
  41 #define LS1X_UART2_IRQ                  LS1X_IRQ(0, 4)
  42 #define LS1X_UART3_IRQ                  LS1X_IRQ(0, 5)
  43 #elif defined(CONFIG_LOONGSON1_LS1C)
  44 #define LS1X_UART1_IRQ                  LS1X_IRQ(0, 4)
  45 #define LS1X_UART2_IRQ                  LS1X_IRQ(0, 5)
  46 #endif
  47 #define LS1X_CAN0_IRQ                   LS1X_IRQ(0, 6)
  48 #define LS1X_CAN1_IRQ                   LS1X_IRQ(0, 7)
  49 #define LS1X_SPI0_IRQ                   LS1X_IRQ(0, 8)
  50 #define LS1X_SPI1_IRQ                   LS1X_IRQ(0, 9)
  51 #define LS1X_AC97_IRQ                   LS1X_IRQ(0, 10)
  52 #define LS1X_DMA0_IRQ                   LS1X_IRQ(0, 13)
  53 #define LS1X_DMA1_IRQ                   LS1X_IRQ(0, 14)
  54 #define LS1X_DMA2_IRQ                   LS1X_IRQ(0, 15)
  55 #if defined(CONFIG_LOONGSON1_LS1C)
  56 #define LS1X_NAND_IRQ                   LS1X_IRQ(0, 16)
  57 #endif
  58 #define LS1X_PWM0_IRQ                   LS1X_IRQ(0, 17)
  59 #define LS1X_PWM1_IRQ                   LS1X_IRQ(0, 18)
  60 #define LS1X_PWM2_IRQ                   LS1X_IRQ(0, 19)
  61 #define LS1X_PWM3_IRQ                   LS1X_IRQ(0, 20)
  62 #define LS1X_RTC_INT0_IRQ               LS1X_IRQ(0, 21)
  63 #define LS1X_RTC_INT1_IRQ               LS1X_IRQ(0, 22)
  64 #define LS1X_RTC_INT2_IRQ               LS1X_IRQ(0, 23)
  65 #if defined(CONFIG_LOONGSON1_LS1B)
  66 #define LS1X_TOY_INT0_IRQ               LS1X_IRQ(0, 24)
  67 #define LS1X_TOY_INT1_IRQ               LS1X_IRQ(0, 25)
  68 #define LS1X_TOY_INT2_IRQ               LS1X_IRQ(0, 26)
  69 #define LS1X_RTC_TICK_IRQ               LS1X_IRQ(0, 27)
  70 #define LS1X_TOY_TICK_IRQ               LS1X_IRQ(0, 28)
  71 #define LS1X_UART4_IRQ                  LS1X_IRQ(0, 29)
  72 #define LS1X_UART5_IRQ                  LS1X_IRQ(0, 30)
  73 #elif defined(CONFIG_LOONGSON1_LS1C)
  74 #define LS1X_UART3_IRQ                  LS1X_IRQ(0, 29)
  75 #define LS1X_ADC_IRQ                    LS1X_IRQ(0, 30)
  76 #define LS1X_SDIO_IRQ                   LS1X_IRQ(0, 31)
  77 #endif
  78
  79 #define LS1X_EHCI_IRQ                   LS1X_IRQ(1, 0)
  80 #define LS1X_OHCI_IRQ                   LS1X_IRQ(1, 1)
  81 #if defined(CONFIG_LOONGSON1_LS1B)
  82 #define LS1X_GMAC0_IRQ                  LS1X_IRQ(1, 2)
  83 #define LS1X_GMAC1_IRQ                  LS1X_IRQ(1, 3)
  84 #elif defined(CONFIG_LOONGSON1_LS1C)
  85 #define LS1X_OTG_IRQ                    LS1X_IRQ(1, 2)
  86 #define LS1X_GMAC0_IRQ                  LS1X_IRQ(1, 3)
  87 #define LS1X_CAM_IRQ                    LS1X_IRQ(1, 4)
  88 #define LS1X_UART4_IRQ                  LS1X_IRQ(1, 5)
  89 #define LS1X_UART5_IRQ                  LS1X_IRQ(1, 6)
  90 #define LS1X_UART6_IRQ                  LS1X_IRQ(1, 7)
  91 #define LS1X_UART7_IRQ                  LS1X_IRQ(1, 8)
  92 #define LS1X_UART8_IRQ                  LS1X_IRQ(1, 9)
  93 #define LS1X_UART9_IRQ                  LS1X_IRQ(1, 13)
  94 #define LS1X_UART10_IRQ                 LS1X_IRQ(1, 14)
  95 #define LS1X_UART11_IRQ                 LS1X_IRQ(1, 15)
  96 #define LS1X_I2C0_IRQ                   LS1X_IRQ(1, 17)
  97 #define LS1X_I2C1_IRQ                   LS1X_IRQ(1, 18)
  98 #define LS1X_I2C2_IRQ                   LS1X_IRQ(1, 19)
  99 #endif
 100
 101 #if defined(CONFIG_LOONGSON1_LS1B)
 102 #define INTN    4
 103 #elif defined(CONFIG_LOONGSON1_LS1C)
 104 #define INTN    5
 105 #endif
 106
 107 #define LS1X_IRQS               (LS1X_IRQ(INTN, 31) + 1 - LS1X_IRQ_BASE)
 108
 109 #define NR_IRQS                 (MIPS_CPU_IRQS + LS1X_IRQS)
 110
 111 #endif /* __ASM_MACH_LOONGSON32_IRQ_H */