arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36 #include <linux/irqdomain.h>
  37 #include <linux/of.h>
  38 #include <linux/of_irq.h>
  39
  40 #include <linux/atomic.h>
  41 #include <asm/cpu.h>
  42 #include <asm/processor.h>
  43 #include <asm/idle.h>
  44 #include <asm/r4k-timer.h>
  45 #include <asm/mips-cpc.h>
  46 #include <asm/mmu_context.h>
  47 #include <asm/time.h>
  48 #include <asm/setup.h>
  49 #include <asm/maar.h>
  50
  51 cpumask_t cpu_callin_map;               /* Bitmask of started secondaries */
  52
  53 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  54 EXPORT_SYMBOL(__cpu_number_map);
  55
  56 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  57 EXPORT_SYMBOL(__cpu_logical_map);
  58
  59 /* Number of TCs (or siblings in Intel speak) per CPU core */
  60 int smp_num_siblings = 1;
  61 EXPORT_SYMBOL(smp_num_siblings);
  62
  63 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  64 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  65 EXPORT_SYMBOL(cpu_sibling_map);
  66
  67 /* representing the core map of multi-core chips of each logical CPU */
  68 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
  69 EXPORT_SYMBOL(cpu_core_map);
  70
  71 /*
  72  * A logcal cpu mask containing only one VPE per core to
  73  * reduce the number of IPIs on large MT systems.
  74  */
  75 cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
  76 EXPORT_SYMBOL(cpu_foreign_map);
  77
  78 /* representing cpus for which sibling maps can be computed */
  79 static cpumask_t cpu_sibling_setup_map;
  80
  81 /* representing cpus for which core maps can be computed */
  82 static cpumask_t cpu_core_setup_map;
  83
  84 cpumask_t cpu_coherent_mask;
  85
  86 #ifdef CONFIG_GENERIC_IRQ_IPI
  87 static struct irq_desc *call_desc;
  88 static struct irq_desc *sched_desc;
  89 #endif
  90
  91 static inline void set_cpu_sibling_map(int cpu)
  92 {
  93         int i;
  94
  95         cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
  96
  97         if (smp_num_siblings > 1) {
  98                 for_each_cpu(i, &cpu_sibling_setup_map) {
  99                         if (cpu_data[cpu].package == cpu_data[i].package &&
 100                                     cpu_data[cpu].core == cpu_data[i].core) {
 101                                 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
 102                                 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
 103                         }
 104                 }
 105         } else
 106                 cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
 107 }
 108
 109 static inline void set_cpu_core_map(int cpu)
 110 {
 111         int i;
 112
 113         cpumask_set_cpu(cpu, &cpu_core_setup_map);
 114
 115         for_each_cpu(i, &cpu_core_setup_map) {
 116                 if (cpu_data[cpu].package == cpu_data[i].package) {
 117                         cpumask_set_cpu(i, &cpu_core_map[cpu]);
 118                         cpumask_set_cpu(cpu, &cpu_core_map[i]);
 119                 }
 120         }
 121 }
 122
 123 /*
 124  * Calculate a new cpu_foreign_map mask whenever a
 125  * new cpu appears or disappears.
 126  */
 127 void calculate_cpu_foreign_map(void)
 128 {
 129         int i, k, core_present;
 130         cpumask_t temp_foreign_map;
 131
 132         /* Re-calculate the mask */
 133         cpumask_clear(&temp_foreign_map);
 134         for_each_online_cpu(i) {
 135                 core_present = 0;
 136                 for_each_cpu(k, &temp_foreign_map)
 137                         if (cpu_data[i].package == cpu_data[k].package &&
 138                             cpu_data[i].core == cpu_data[k].core)
 139                                 core_present = 1;
 140                 if (!core_present)
 141                         cpumask_set_cpu(i, &temp_foreign_map);
 142         }
 143
 144         for_each_online_cpu(i)
 145                 cpumask_andnot(&cpu_foreign_map[i],
 146                                &temp_foreign_map, &cpu_sibling_map[i]);
 147 }
 148
 149 struct plat_smp_ops *mp_ops;
 150 EXPORT_SYMBOL(mp_ops);
 151
 152 void register_smp_ops(struct plat_smp_ops *ops)
 153 {
 154         if (mp_ops)
 155                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
 156
 157         mp_ops = ops;
 158 }
 159
 160 #ifdef CONFIG_GENERIC_IRQ_IPI
 161 void mips_smp_send_ipi_single(int cpu, unsigned int action)
 162 {
 163         mips_smp_send_ipi_mask(cpumask_of(cpu), action);
 164 }
 165
 166 void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 167 {
 168         unsigned long flags;
 169         unsigned int core;
 170         int cpu;
 171
 172         local_irq_save(flags);
 173
 174         switch (action) {
 175         case SMP_CALL_FUNCTION:
 176                 __ipi_send_mask(call_desc, mask);
 177                 break;
 178
 179         case SMP_RESCHEDULE_YOURSELF:
 180                 __ipi_send_mask(sched_desc, mask);
 181                 break;
 182
 183         default:
 184                 BUG();
 185         }
 186
 187         if (mips_cpc_present()) {
 188                 for_each_cpu(cpu, mask) {
 189                         core = cpu_data[cpu].core;
 190
 191                         if (core == current_cpu_data.core)
 192                                 continue;
 193
 194                         while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
 195                                 mips_cm_lock_other(core, 0);
 196                                 mips_cpc_lock_other(core);
 197                                 write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
 198                                 mips_cpc_unlock_other();
 199                                 mips_cm_unlock_other();
 200                         }
 201                 }
 202         }
 203
 204         local_irq_restore(flags);
 205 }
 206
 207
 208 static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
 209 {
 210         scheduler_ipi();
 211
 212         return IRQ_HANDLED;
 213 }
 214
 215 static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
 216 {
 217         generic_smp_call_function_interrupt();
 218
 219         return IRQ_HANDLED;
 220 }
 221
 222 static struct irqaction irq_resched = {
 223         .handler        = ipi_resched_interrupt,
 224         .flags          = IRQF_PERCPU,
 225         .name           = "IPI resched"
 226 };
 227
 228 static struct irqaction irq_call = {
 229         .handler        = ipi_call_interrupt,
 230         .flags          = IRQF_PERCPU,
 231         .name           = "IPI call"
 232 };
 233
 234 static __init void smp_ipi_init_one(unsigned int virq,
 235                                     struct irqaction *action)
 236 {
 237         int ret;
 238
 239         irq_set_handler(virq, handle_percpu_irq);
 240         ret = setup_irq(virq, action);
 241         BUG_ON(ret);
 242 }
 243
 244 static int __init mips_smp_ipi_init(void)
 245 {
 246         unsigned int call_virq, sched_virq;
 247         struct irq_domain *ipidomain;
 248         struct device_node *node;
 249
 250         node = of_irq_find_parent(of_root);
 251         ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
 252
 253         /*
 254          * Some platforms have half DT setup. So if we found irq node but
 255          * didn't find an ipidomain, try to search for one that is not in the
 256          * DT.
 257          */
 258         if (node && !ipidomain)
 259                 ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
 260
 261         /*
 262          * There are systems which only use IPI domains some of the time,
 263          * depending upon configuration we don't know until runtime. An
 264          * example is Malta where we may compile in support for GIC & the
 265          * MT ASE, but run on a system which has multiple VPEs in a single
 266          * core and doesn't include a GIC. Until all IPI implementations
 267          * have been converted to use IPI domains the best we can do here
 268          * is to return & hope some other code sets up the IPIs.
 269          */
 270         if (!ipidomain)
 271                 return 0;
 272
 273         call_virq = irq_reserve_ipi(ipidomain, cpu_possible_mask);
 274         BUG_ON(!call_virq);
 275
 276         sched_virq = irq_reserve_ipi(ipidomain, cpu_possible_mask);
 277         BUG_ON(!sched_virq);
 278
 279         if (irq_domain_is_ipi_per_cpu(ipidomain)) {
 280                 int cpu;
 281
 282                 for_each_cpu(cpu, cpu_possible_mask) {
 283                         smp_ipi_init_one(call_virq + cpu, &irq_call);
 284                         smp_ipi_init_one(sched_virq + cpu, &irq_resched);
 285                 }
 286         } else {
 287                 smp_ipi_init_one(call_virq, &irq_call);
 288                 smp_ipi_init_one(sched_virq, &irq_resched);
 289         }
 290
 291         call_desc = irq_to_desc(call_virq);
 292         sched_desc = irq_to_desc(sched_virq);
 293
 294         return 0;
 295 }
 296 early_initcall(mips_smp_ipi_init);
 297 #endif
 298
 299 /*
 300  * First C code run on the secondary CPUs after being started up by
 301  * the master.
 302  */
 303 asmlinkage void start_secondary(void)
 304 {
 305         unsigned int cpu;
 306
 307         cpu_probe();
 308         per_cpu_trap_init(false);
 309         mips_clockevent_init();
 310         mp_ops->init_secondary();
 311         cpu_report();
 312         maar_init();
 313
 314         /*
 315          * XXX parity protection should be folded in here when it's converted
 316          * to an option instead of something based on .cputype
 317          */
 318
 319         calibrate_delay();
 320         preempt_disable();
 321         cpu = smp_processor_id();
 322         cpu_data[cpu].udelay_val = loops_per_jiffy;
 323
 324         cpumask_set_cpu(cpu, &cpu_coherent_mask);
 325         notify_cpu_starting(cpu);
 326
 327         cpumask_set_cpu(cpu, &cpu_callin_map);
 328         synchronise_count_slave(cpu);
 329
 330         set_cpu_online(cpu, true);
 331
 332         set_cpu_sibling_map(cpu);
 333         set_cpu_core_map(cpu);
 334
 335         calculate_cpu_foreign_map();
 336
 337         /*
 338          * irq will be enabled in ->smp_finish(), enabling it too early
 339          * is dangerous.
 340          */
 341         WARN_ON_ONCE(!irqs_disabled());
 342         mp_ops->smp_finish();
 343
 344         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 345 }
 346
 347 static void stop_this_cpu(void *dummy)
 348 {
 349         /*
 350          * Remove this CPU:
 351          */
 352
 353         set_cpu_online(smp_processor_id(), false);
 354         calculate_cpu_foreign_map();
 355         local_irq_disable();
 356         while (1);
 357 }
 358
 359 void smp_send_stop(void)
 360 {
 361         smp_call_function(stop_this_cpu, NULL, 0);
 362 }
 363
 364 void __init smp_cpus_done(unsigned int max_cpus)
 365 {
 366 }
 367
 368 /* called from main before smp_init() */
 369 void __init smp_prepare_cpus(unsigned int max_cpus)
 370 {
 371         init_new_context(current, &init_mm);
 372         current_thread_info()->cpu = 0;
 373         mp_ops->prepare_cpus(max_cpus);
 374         set_cpu_sibling_map(0);
 375         set_cpu_core_map(0);
 376         calculate_cpu_foreign_map();
 377 #ifndef CONFIG_HOTPLUG_CPU
 378         init_cpu_present(cpu_possible_mask);
 379 #endif
 380         cpumask_copy(&cpu_coherent_mask, cpu_possible_mask);
 381 }
 382
 383 /* preload SMP state for boot cpu */
 384 void smp_prepare_boot_cpu(void)
 385 {
 386         set_cpu_possible(0, true);
 387         set_cpu_online(0, true);
 388         cpumask_set_cpu(0, &cpu_callin_map);
 389 }
 390
 391 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 392 {
 393         mp_ops->boot_secondary(cpu, tidle);
 394
 395         /*
 396          * Trust is futile.  We should really have timeouts ...
 397          */
 398         while (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
 399                 udelay(100);
 400                 schedule();
 401         }
 402
 403         synchronise_count_master(cpu);
 404         return 0;
 405 }
 406
 407 /* Not really SMP stuff ... */
 408 int setup_profiling_timer(unsigned int multiplier)
 409 {
 410         return 0;
 411 }
 412
 413 static void flush_tlb_all_ipi(void *info)
 414 {
 415         local_flush_tlb_all();
 416 }
 417
 418 void flush_tlb_all(void)
 419 {
 420         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 421 }
 422
 423 static void flush_tlb_mm_ipi(void *mm)
 424 {
 425         local_flush_tlb_mm((struct mm_struct *)mm);
 426 }
 427
 428 /*
 429  * Special Variant of smp_call_function for use by TLB functions:
 430  *
 431  *  o No return value
 432  *  o collapses to normal function call on UP kernels
 433  *  o collapses to normal function call on systems with a single shared
 434  *    primary cache.
 435  */
 436 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 437 {
 438         smp_call_function(func, info, 1);
 439 }
 440
 441 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 442 {
 443         preempt_disable();
 444
 445         smp_on_other_tlbs(func, info);
 446         func(info);
 447
 448         preempt_enable();
 449 }
 450
 451 /*
 452  * The following tlb flush calls are invoked when old translations are
 453  * being torn down, or pte attributes are changing. For single threaded
 454  * address spaces, a new context is obtained on the current cpu, and tlb
 455  * context on other cpus are invalidated to force a new context allocation
 456  * at switch_mm time, should the mm ever be used on other cpus. For
 457  * multithreaded address spaces, intercpu interrupts have to be sent.
 458  * Another case where intercpu interrupts are required is when the target
 459  * mm might be active on another cpu (eg debuggers doing the flushes on
 460  * behalf of debugees, kswapd stealing pages from another process etc).
 461  * Kanoj 07/00.
 462  */
 463
 464 void flush_tlb_mm(struct mm_struct *mm)
 465 {
 466         preempt_disable();
 467
 468         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 469                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 470         } else {
 471                 unsigned int cpu;
 472
 473                 for_each_online_cpu(cpu) {
 474                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 475                                 cpu_context(cpu, mm) = 0;
 476                 }
 477         }
 478         local_flush_tlb_mm(mm);
 479
 480         preempt_enable();
 481 }
 482
 483 struct flush_tlb_data {
 484         struct vm_area_struct *vma;
 485         unsigned long addr1;
 486         unsigned long addr2;
 487 };
 488
 489 static void flush_tlb_range_ipi(void *info)
 490 {
 491         struct flush_tlb_data *fd = info;
 492
 493         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 494 }
 495
 496 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 497 {
 498         struct mm_struct *mm = vma->vm_mm;
 499
 500         preempt_disable();
 501         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 502                 struct flush_tlb_data fd = {
 503                         .vma = vma,
 504                         .addr1 = start,
 505                         .addr2 = end,
 506                 };
 507
 508                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 509         } else {
 510                 unsigned int cpu;
 511                 int exec = vma->vm_flags & VM_EXEC;
 512
 513                 for_each_online_cpu(cpu) {
 514                         /*
 515                          * flush_cache_range() will only fully flush icache if
 516                          * the VMA is executable, otherwise we must invalidate
 517                          * ASID without it appearing to has_valid_asid() as if
 518                          * mm has been completely unused by that CPU.
 519                          */
 520                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 521                                 cpu_context(cpu, mm) = !exec;
 522                 }
 523         }
 524         local_flush_tlb_range(vma, start, end);
 525         preempt_enable();
 526 }
 527
 528 static void flush_tlb_kernel_range_ipi(void *info)
 529 {
 530         struct flush_tlb_data *fd = info;
 531
 532         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 533 }
 534
 535 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 536 {
 537         struct flush_tlb_data fd = {
 538                 .addr1 = start,
 539                 .addr2 = end,
 540         };
 541
 542         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 543 }
 544
 545 static void flush_tlb_page_ipi(void *info)
 546 {
 547         struct flush_tlb_data *fd = info;
 548
 549         local_flush_tlb_page(fd->vma, fd->addr1);
 550 }
 551
 552 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 553 {
 554         preempt_disable();
 555         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 556                 struct flush_tlb_data fd = {
 557                         .vma = vma,
 558                         .addr1 = page,
 559                 };
 560
 561                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 562         } else {
 563                 unsigned int cpu;
 564
 565                 for_each_online_cpu(cpu) {
 566                         /*
 567                          * flush_cache_page() only does partial flushes, so
 568                          * invalidate ASID without it appearing to
 569                          * has_valid_asid() as if mm has been completely unused
 570                          * by that CPU.
 571                          */
 572                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 573                                 cpu_context(cpu, vma->vm_mm) = 1;
 574                 }
 575         }
 576         local_flush_tlb_page(vma, page);
 577         preempt_enable();
 578 }
 579
 580 static void flush_tlb_one_ipi(void *info)
 581 {
 582         unsigned long vaddr = (unsigned long) info;
 583
 584         local_flush_tlb_one(vaddr);
 585 }
 586
 587 void flush_tlb_one(unsigned long vaddr)
 588 {
 589         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 590 }
 591
 592 EXPORT_SYMBOL(flush_tlb_page);
 593 EXPORT_SYMBOL(flush_tlb_one);
 594
 595 #if defined(CONFIG_KEXEC)
 596 void (*dump_ipi_function_ptr)(void *) = NULL;
 597 void dump_send_ipi(void (*dump_ipi_callback)(void *))
 598 {
 599         int i;
 600         int cpu = smp_processor_id();
 601
 602         dump_ipi_function_ptr = dump_ipi_callback;
 603         smp_mb();
 604         for_each_online_cpu(i)
 605                 if (i != cpu)
 606                         mp_ops->send_ipi_single(i, SMP_DUMP);
 607
 608 }
 609 EXPORT_SYMBOL(dump_send_ipi);
 610 #endif
 611
 612 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 613
 614 static DEFINE_PER_CPU(atomic_t, tick_broadcast_count);
 615 static DEFINE_PER_CPU(struct call_single_data, tick_broadcast_csd);
 616
 617 void tick_broadcast(const struct cpumask *mask)
 618 {
 619         atomic_t *count;
 620         struct call_single_data *csd;
 621         int cpu;
 622
 623         for_each_cpu(cpu, mask) {
 624                 count = &per_cpu(tick_broadcast_count, cpu);
 625                 csd = &per_cpu(tick_broadcast_csd, cpu);
 626
 627                 if (atomic_inc_return(count) == 1)
 628                         smp_call_function_single_async(cpu, csd);
 629         }
 630 }
 631
 632 static void tick_broadcast_callee(void *info)
 633 {
 634         int cpu = smp_processor_id();
 635         tick_receive_broadcast();
 636         atomic_set(&per_cpu(tick_broadcast_count, cpu), 0);
 637 }
 638
 639 static int __init tick_broadcast_init(void)
 640 {
 641         struct call_single_data *csd;
 642         int cpu;
 643
 644         for (cpu = 0; cpu < NR_CPUS; cpu++) {
 645                 csd = &per_cpu(tick_broadcast_csd, cpu);
 646                 csd->func = tick_broadcast_callee;
 647         }
 648
 649         return 0;
 650 }
 651 early_initcall(tick_broadcast_init);
 652
 653 #endif /* CONFIG_GENERIC_CLOCKEVENTS_BROADCAST */