2 * Copyright (c) 2011-2016 Zhang, Keguang <keguang.zhang@gmail.com>
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
10 #include <linux/clk.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/err.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/sizes.h>
15 #include <linux/phy.h>
16 #include <linux/serial_8250.h>
17 #include <linux/stmmac.h>
18 #include <linux/usb/ehci_pdriver.h>
20 #include <loongson1.h>
25 /* 8250/16550 compatible UART */
26 #define LS1X_UART(_id) \
28 .mapbase = LS1X_UART ## _id ## _BASE, \
29 .irq = LS1X_UART ## _id ## _IRQ, \
31 .flags = UPF_IOREMAP | UPF_FIXED_TYPE, \
32 .type = PORT_16550A, \
35 static struct plat_serial8250_port ls1x_serial8250_pdata[] = {
43 struct platform_device ls1x_uart_pdev = {
45 .id = PLAT8250_DEV_PLATFORM,
47 .platform_data = ls1x_serial8250_pdata,
51 void __init ls1x_serial_set_uartclk(struct platform_device *pdev)
54 struct plat_serial8250_port *p;
56 clk = clk_get(&pdev->dev, pdev->name);
58 pr_err("unable to get %s clock, err=%ld",
59 pdev->name, PTR_ERR(clk));
62 clk_prepare_enable(clk);
64 for (p = pdev->dev.platform_data; p->flags != 0; ++p)
65 p->uartclk = clk_get_rate(clk);
69 static struct plat_ls1x_cpufreq ls1x_cpufreq_pdata = {
70 .clk_name = "cpu_clk",
71 .osc_clk_name = "osc_33m_clk",
72 .max_freq = 266 * 1000,
73 .min_freq = 33 * 1000,
76 struct platform_device ls1x_cpufreq_pdev = {
77 .name = "ls1x-cpufreq",
79 .platform_data = &ls1x_cpufreq_pdata,
84 static struct resource ls1x_dma_resources[] = {
86 .start = LS1X_DMAC_BASE,
87 .end = LS1X_DMAC_BASE + SZ_4 - 1,
88 .flags = IORESOURCE_MEM,
91 .start = LS1X_DMA0_IRQ,
93 .flags = IORESOURCE_IRQ,
96 .start = LS1X_DMA1_IRQ,
98 .flags = IORESOURCE_IRQ,
101 .start = LS1X_DMA2_IRQ,
102 .end = LS1X_DMA2_IRQ,
103 .flags = IORESOURCE_IRQ,
107 struct platform_device ls1x_dma_pdev = {
110 .num_resources = ARRAY_SIZE(ls1x_dma_resources),
111 .resource = ls1x_dma_resources,
114 void __init ls1x_dma_set_platdata(struct plat_ls1x_dma *pdata)
116 ls1x_dma_pdev.dev.platform_data = pdata;
119 /* Synopsys Ethernet GMAC */
120 static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
124 static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
128 int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
130 struct plat_stmmacenet_data *plat_dat = NULL;
133 val = __raw_readl(LS1X_MUX_CTRL1);
135 plat_dat = dev_get_platdata(&pdev->dev);
136 if (plat_dat->bus_id) {
137 __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
138 GMAC1_USE_UART0, LS1X_MUX_CTRL0);
139 switch (plat_dat->interface) {
140 case PHY_INTERFACE_MODE_RGMII:
141 val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
143 case PHY_INTERFACE_MODE_MII:
144 val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
147 pr_err("unsupported mii mode %d\n",
148 plat_dat->interface);
153 switch (plat_dat->interface) {
154 case PHY_INTERFACE_MODE_RGMII:
155 val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
157 case PHY_INTERFACE_MODE_MII:
158 val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
161 pr_err("unsupported mii mode %d\n",
162 plat_dat->interface);
167 __raw_writel(val, LS1X_MUX_CTRL1);
172 static struct plat_stmmacenet_data ls1x_eth0_pdata = {
175 .interface = PHY_INTERFACE_MODE_MII,
176 .mdio_bus_data = &ls1x_mdio_bus_data,
177 .dma_cfg = &ls1x_eth_dma_cfg,
180 .init = ls1x_eth_mux_init,
183 static struct resource ls1x_eth0_resources[] = {
185 .start = LS1X_GMAC0_BASE,
186 .end = LS1X_GMAC0_BASE + SZ_64K - 1,
187 .flags = IORESOURCE_MEM,
191 .start = LS1X_GMAC0_IRQ,
192 .flags = IORESOURCE_IRQ,
196 struct platform_device ls1x_eth0_pdev = {
199 .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
200 .resource = ls1x_eth0_resources,
202 .platform_data = &ls1x_eth0_pdata,
206 static struct plat_stmmacenet_data ls1x_eth1_pdata = {
209 .interface = PHY_INTERFACE_MODE_MII,
210 .mdio_bus_data = &ls1x_mdio_bus_data,
211 .dma_cfg = &ls1x_eth_dma_cfg,
214 .init = ls1x_eth_mux_init,
217 static struct resource ls1x_eth1_resources[] = {
219 .start = LS1X_GMAC1_BASE,
220 .end = LS1X_GMAC1_BASE + SZ_64K - 1,
221 .flags = IORESOURCE_MEM,
225 .start = LS1X_GMAC1_IRQ,
226 .flags = IORESOURCE_IRQ,
230 struct platform_device ls1x_eth1_pdev = {
233 .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
234 .resource = ls1x_eth1_resources,
236 .platform_data = &ls1x_eth1_pdata,
241 static struct resource ls1x_gpio0_resources[] = {
243 .start = LS1X_GPIO0_BASE,
244 .end = LS1X_GPIO0_BASE + SZ_4 - 1,
245 .flags = IORESOURCE_MEM,
249 struct platform_device ls1x_gpio0_pdev = {
252 .num_resources = ARRAY_SIZE(ls1x_gpio0_resources),
253 .resource = ls1x_gpio0_resources,
256 static struct resource ls1x_gpio1_resources[] = {
258 .start = LS1X_GPIO1_BASE,
259 .end = LS1X_GPIO1_BASE + SZ_4 - 1,
260 .flags = IORESOURCE_MEM,
264 struct platform_device ls1x_gpio1_pdev = {
267 .num_resources = ARRAY_SIZE(ls1x_gpio1_resources),
268 .resource = ls1x_gpio1_resources,
272 static struct resource ls1x_nand_resources[] = {
274 .start = LS1X_NAND_BASE,
275 .end = LS1X_NAND_BASE + SZ_32 - 1,
276 .flags = IORESOURCE_MEM,
279 /* DMA channel 0 is dedicated to NAND */
280 .start = LS1X_DMA_CHANNEL0,
281 .end = LS1X_DMA_CHANNEL0,
282 .flags = IORESOURCE_DMA,
286 struct platform_device ls1x_nand_pdev = {
289 .num_resources = ARRAY_SIZE(ls1x_nand_resources),
290 .resource = ls1x_nand_resources,
293 void __init ls1x_nand_set_platdata(struct plat_ls1x_nand *pdata)
295 ls1x_nand_pdev.dev.platform_data = pdata;
299 static u64 ls1x_ehci_dmamask = DMA_BIT_MASK(32);
301 static struct resource ls1x_ehci_resources[] = {
303 .start = LS1X_EHCI_BASE,
304 .end = LS1X_EHCI_BASE + SZ_32K - 1,
305 .flags = IORESOURCE_MEM,
308 .start = LS1X_EHCI_IRQ,
309 .flags = IORESOURCE_IRQ,
313 static struct usb_ehci_pdata ls1x_ehci_pdata = {
316 struct platform_device ls1x_ehci_pdev = {
317 .name = "ehci-platform",
319 .num_resources = ARRAY_SIZE(ls1x_ehci_resources),
320 .resource = ls1x_ehci_resources,
322 .dma_mask = &ls1x_ehci_dmamask,
323 .platform_data = &ls1x_ehci_pdata,
327 /* Real Time Clock */
328 struct platform_device ls1x_rtc_pdev = {