arch/powerpc/boot/dts/mpc8544ds.dts

   1 /*
   2  * MPC8544 DS Device Tree Source
   3  *
   4  * Copyright 2007, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "fsl/mpc8544si-pre.dtsi"
  13
  14 / {
  15         model = "MPC8544DS";
  16         compatible = "MPC8544DS", "MPC85xxDS";
  17
  18         memory {
  19                 device_type = "memory";
  20                 reg = <0 0 0 0>;        // Filled by U-Boot
  21         };
  22
  23         lbc: localbus@e0005000 {
  24                 reg = <0 0xe0005000 0 0x1000>;
  25         };
  26
  27         board_soc: soc: soc8544@e0000000 {
  28                 ranges = <0x0 0x0 0xe0000000 0x100000>;
  29         };
  30
  31         pci0: pci@e0008000 {
  32                 reg = <0 0xe0008000 0 0x1000>;
  33                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
  34                           0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
  35                 clock-frequency = <66666666>;
  36                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  37                 interrupt-map = <
  38
  39                         /* IDSEL 0x11 J17 Slot 1 */
  40                         0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
  41                         0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
  42                         0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
  43                         0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
  44
  45                         /* IDSEL 0x12 J16 Slot 2 */
  46
  47                         0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
  48                         0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
  49                         0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
  50                         0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
  51         };
  52
  53         pci1: pcie@e0009000 {
  54                 reg = <0x0 0xe0009000 0x0 0x1000>;
  55                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
  56                           0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
  57                 pcie@0 {
  58                         ranges = <0x2000000 0x0 0x80000000
  59                                   0x2000000 0x0 0x80000000
  60                                   0x0 0x20000000
  61
  62                                   0x1000000 0x0 0x0
  63                                   0x1000000 0x0 0x0
  64                                   0x0 0x10000>;
  65                 };
  66         };
  67
  68         pci2: pcie@e000a000 {
  69                 reg = <0x0 0xe000a000 0x0 0x1000>;
  70                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
  71                           0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
  72                 pcie@0 {
  73                         ranges = <0x2000000 0x0 0xa0000000
  74                                   0x2000000 0x0 0xa0000000
  75                                   0x0 0x10000000
  76
  77                                   0x1000000 0x0 0x0
  78                                   0x1000000 0x0 0x0
  79                                   0x0 0x10000>;
  80                 };
  81         };
  82
  83         board_pci3: pci3: pcie@e000b000 {
  84                 reg = <0x0 0xe000b000 0x0 0x1000>;
  85                 ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
  86                           0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
  87                 pcie@0 {
  88                         ranges = <0x2000000 0x0 0xb0000000
  89                                   0x2000000 0x0 0xb0000000
  90                                   0x0 0x100000
  91
  92                                   0x1000000 0x0 0x0
  93                                   0x1000000 0x0 0x0
  94                                   0x0 0x100000>;
  95                 };
  96         };
  97 };
  98
  99 /*
 100  * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
 101  * for interrupt-map & interrupt-map-mask
 102  */
 103
 104 /include/ "fsl/mpc8544si-post.dtsi"
 105 /include/ "mpc8544ds.dtsi"