1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
37 #include <asm/head-64.h>
51 #define EX_PPR 88 /* SMT thread status register (priority) */
54 #ifdef CONFIG_RELOCATABLE
55 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
57 LOAD_HANDLER(r12,label); \
59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
61 mtmsrd r10,1; /* Set RI (EE=0) */ \
64 /* If not relocatable, we can jump directly -- and save messing with LR */
65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
69 mtmsrd r10,1; /* Set RI (EE=0) */ \
72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
81 EXCEPTION_PROLOG_0(area); \
82 EXCEPTION_PROLOG_1(area, extra, vec); \
83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
86 * We're short on space and time in the exception prolog, so we can't
87 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
88 * Instead we get the base of the kernel from paca->kernelbase and or in the low
89 * part of label. This requires that the label be within 64KB of kernelbase, and
90 * that kernelbase be 64K aligned.
92 #define LOAD_HANDLER(reg, label) \
93 ld reg,PACAKBASE(r13); /* get high part of &label */ \
94 ori reg,reg,(FIXED_SYMBOL_ABS_ADDR(label))@l;
96 #define __LOAD_HANDLER(reg, label) \
97 ld reg,PACAKBASE(r13); \
98 ori reg,reg,(ABS_ADDR(label))@l;
100 /* Exception register prefixes */
104 #if defined(CONFIG_RELOCATABLE)
106 * If we support interrupts with relocation on AND we're a relocatable kernel,
107 * we need to use CTR to get to the 2nd level handler. So, save/restore it
110 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
111 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
112 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
114 /* ...else CTR is unused and in register. */
115 #define SAVE_CTR(reg, area)
116 #define GET_CTR(reg, area) mfctr reg
117 #define RESTORE_CTR(reg, area)
121 * PPR save/restore macros used in exceptions_64s.S
122 * Used for P7 or later processors
124 #define SAVE_PPR(area, ra, rb) \
125 BEGIN_FTR_SECTION_NESTED(940) \
126 ld ra,PACACURRENT(r13); \
127 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
128 std rb,TASKTHREADPPR(ra); \
129 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
131 #define RESTORE_PPR_PACA(area, ra) \
132 BEGIN_FTR_SECTION_NESTED(941) \
133 ld ra,area+EX_PPR(r13); \
135 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
138 * Get an SPR into a register if the CPU has the given feature
140 #define OPT_GET_SPR(ra, spr, ftr) \
141 BEGIN_FTR_SECTION_NESTED(943) \
143 END_FTR_SECTION_NESTED(ftr,ftr,943)
146 * Set an SPR from a register if the CPU has the given feature
148 #define OPT_SET_SPR(ra, spr, ftr) \
149 BEGIN_FTR_SECTION_NESTED(943) \
151 END_FTR_SECTION_NESTED(ftr,ftr,943)
154 * Save a register to the PACA if the CPU has the given feature
156 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
157 BEGIN_FTR_SECTION_NESTED(943) \
158 std ra,offset(r13); \
159 END_FTR_SECTION_NESTED(ftr,ftr,943)
161 #define EXCEPTION_PROLOG_0(area) \
163 std r9,area+EX_R9(r13); /* save r9 */ \
164 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
166 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
167 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
169 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
170 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
171 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
172 SAVE_CTR(r10, area); \
175 std r11,area+EX_R11(r13); \
176 std r12,area+EX_R12(r13); \
178 std r10,area+EX_R13(r13)
179 #define EXCEPTION_PROLOG_1(area, extra, vec) \
180 __EXCEPTION_PROLOG_1(area, extra, vec)
182 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
183 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
184 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
185 LOAD_HANDLER(r12,label) \
186 mtspr SPRN_##h##SRR0,r12; \
187 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
188 mtspr SPRN_##h##SRR1,r10; \
190 b . /* prevent speculative execution */
191 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
192 __EXCEPTION_PROLOG_PSERIES_1(label, h)
194 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
195 EXCEPTION_PROLOG_0(area); \
196 EXCEPTION_PROLOG_1(area, extra, vec); \
197 EXCEPTION_PROLOG_PSERIES_1(label, h);
199 #define __KVMTEST(h, n) \
200 lbz r10,HSTATE_IN_GUEST(r13); \
204 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
206 * If hv is possible, interrupts come into to the hv version
207 * of the kvmppc_interrupt code, which then jumps to the PR handler,
208 * kvmppc_interrupt_pr, if the guest is a PR guest.
210 #define kvmppc_interrupt kvmppc_interrupt_hv
212 #define kvmppc_interrupt kvmppc_interrupt_pr
215 #ifdef CONFIG_RELOCATABLE
216 #define BRANCH_TO_COMMON(reg, label) \
217 __LOAD_HANDLER(reg, label); \
222 #define BRANCH_TO_COMMON(reg, label) \
227 #define __KVM_HANDLER_PROLOG(area, n) \
228 BEGIN_FTR_SECTION_NESTED(947) \
229 ld r10,area+EX_CFAR(r13); \
230 std r10,HSTATE_CFAR(r13); \
231 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
232 BEGIN_FTR_SECTION_NESTED(948) \
233 ld r10,area+EX_PPR(r13); \
234 std r10,HSTATE_PPR(r13); \
235 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
236 ld r10,area+EX_R10(r13); \
237 stw r9,HSTATE_SCRATCH1(r13); \
238 ld r9,area+EX_R9(r13); \
239 std r12,HSTATE_SCRATCH0(r13); \
241 #define __KVM_HANDLER(area, h, n) \
242 __KVM_HANDLER_PROLOG(area, n) \
246 #define __KVM_HANDLER_SKIP(area, h, n) \
247 cmpwi r10,KVM_GUEST_MODE_SKIP; \
248 ld r10,area+EX_R10(r13); \
250 stw r9,HSTATE_SCRATCH1(r13); \
251 BEGIN_FTR_SECTION_NESTED(948) \
252 ld r9,area+EX_PPR(r13); \
253 std r9,HSTATE_PPR(r13); \
254 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
255 ld r9,area+EX_R9(r13); \
256 std r12,HSTATE_SCRATCH0(r13); \
258 b kvmppc_interrupt; \
259 89: mtocrf 0x80,r9; \
260 ld r9,area+EX_R9(r13); \
261 b kvmppc_skip_##h##interrupt
263 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
264 #define KVMTEST(h, n) __KVMTEST(h, n)
265 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
266 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
269 #define KVMTEST(h, n)
270 #define KVM_HANDLER(area, h, n)
271 #define KVM_HANDLER_SKIP(area, h, n)
277 * The common exception prolog is used for all except a few exceptions
278 * such as a segment miss on a kernel address. We have to be prepared
279 * to take another exception from the point where we first touch the
280 * kernel stack onwards.
282 * On entry r13 points to the paca, r9-r13 are saved in the paca,
283 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
284 * SRR1, and relocation is on.
286 #define EXCEPTION_PROLOG_COMMON(n, area) \
287 andi. r10,r12,MSR_PR; /* See if coming from user */ \
288 mr r10,r1; /* Save r1 */ \
289 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
291 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
292 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
293 blt+ cr1,3f; /* abort if it is */ \
294 li r1,(n); /* will be reloaded later */ \
295 sth r1,PACA_TRAP_SAVE(r13); \
296 std r3,area+EX_R3(r13); \
297 addi r3,r13,area; /* r3 -> where regs are saved*/ \
298 RESTORE_CTR(r1, area); \
300 3: std r9,_CCR(r1); /* save CR in stackframe */ \
301 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
302 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
303 std r10,0(r1); /* make stack chain pointer */ \
304 std r0,GPR0(r1); /* save r0 in stackframe */ \
305 std r10,GPR1(r1); /* save r1 in stackframe */ \
306 beq 4f; /* if from kernel mode */ \
307 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \
308 SAVE_PPR(area, r9, r10); \
309 4: EXCEPTION_PROLOG_COMMON_2(area) \
310 EXCEPTION_PROLOG_COMMON_3(n) \
313 /* Save original regs values from save area to stack frame. */
314 #define EXCEPTION_PROLOG_COMMON_2(area) \
315 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
316 ld r10,area+EX_R10(r13); \
319 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
320 ld r10,area+EX_R12(r13); \
321 ld r11,area+EX_R13(r13); \
325 BEGIN_FTR_SECTION_NESTED(66); \
326 ld r10,area+EX_CFAR(r13); \
327 std r10,ORIG_GPR3(r1); \
328 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
329 GET_CTR(r10, area); \
332 #define EXCEPTION_PROLOG_COMMON_3(n) \
333 std r2,GPR2(r1); /* save r2 in stackframe */ \
334 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
335 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
336 mflr r9; /* Get LR, later save to stack */ \
337 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
339 lbz r10,PACASOFTIRQEN(r13); \
340 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
344 std r9,_TRAP(r1); /* set trap number */ \
346 ld r11,exception_marker@toc(r2); \
347 std r10,RESULT(r1); /* clear regs->result */ \
348 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
353 #define STD_EXCEPTION_PSERIES(vec, label) \
354 SET_SCRATCH0(r13); /* save r13 */ \
355 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
356 EXC_STD, KVMTEST_PR, vec); \
358 /* Version of above for when we have to branch out-of-line */
359 #define __OOL_EXCEPTION(vec, label, hdlr) \
361 EXCEPTION_PROLOG_0(PACA_EXGEN) \
364 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \
365 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
366 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
368 #define STD_EXCEPTION_HV(loc, vec, label) \
369 SET_SCRATCH0(r13); /* save r13 */ \
370 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
371 EXC_HV, KVMTEST_HV, vec);
373 #define STD_EXCEPTION_HV_OOL(vec, label) \
374 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
375 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
377 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
378 /* No guest interrupts come through here */ \
379 SET_SCRATCH0(r13); /* save r13 */ \
380 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
382 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
383 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
384 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD)
386 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
387 /* No guest interrupts come through here */ \
388 SET_SCRATCH0(r13); /* save r13 */ \
389 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_HV, NOTEST, vec);
391 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
392 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
393 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
395 /* This associate vector numbers with bits in paca->irq_happened */
396 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
397 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
398 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC
399 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
400 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
401 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
402 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
404 #define __SOFTEN_TEST(h, vec) \
405 lbz r10,PACASOFTIRQEN(r13); \
407 li r10,SOFTEN_VALUE_##vec; \
408 beq masked_##h##interrupt
410 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
412 #define SOFTEN_TEST_PR(vec) \
413 KVMTEST(EXC_STD, vec); \
414 _SOFTEN_TEST(EXC_STD, vec)
416 #define SOFTEN_TEST_HV(vec) \
417 KVMTEST(EXC_HV, vec); \
418 _SOFTEN_TEST(EXC_HV, vec)
420 #define KVMTEST_PR(vec) \
421 KVMTEST(EXC_STD, vec)
423 #define KVMTEST_HV(vec) \
426 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
427 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
429 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
430 SET_SCRATCH0(r13); /* save r13 */ \
431 EXCEPTION_PROLOG_0(PACA_EXGEN); \
432 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
433 EXCEPTION_PROLOG_PSERIES_1(label, h);
435 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
436 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
438 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
439 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
440 EXC_STD, SOFTEN_TEST_PR)
442 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \
443 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \
444 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
446 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
447 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
448 EXC_HV, SOFTEN_TEST_HV)
450 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
451 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
452 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
454 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
455 SET_SCRATCH0(r13); /* save r13 */ \
456 EXCEPTION_PROLOG_0(PACA_EXGEN); \
457 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
458 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
460 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
461 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
463 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
464 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
465 EXC_STD, SOFTEN_NOTEST_PR)
467 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
468 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
469 EXC_HV, SOFTEN_NOTEST_HV)
471 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
472 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \
473 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
476 * Our exception common code can be passed various "additions"
477 * to specify the behaviour of interrupts, whether to kick the
482 * This addition reconciles our actual IRQ state with the various software
483 * flags that track it. This may call C code.
485 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11)
490 #define RUNLATCH_ON \
492 CURRENT_THREAD_INFO(r3, r1); \
493 ld r4,TI_LOCAL_FLAGS(r3); \
494 andi. r0,r4,_TLF_RUNLATCH; \
495 beql ppc64_runlatch_on_trampoline; \
496 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
498 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
499 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
500 /* Volatile regs are potentially clobbered here */ \
502 addi r3,r1,STACK_FRAME_OVERHEAD; \
506 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
507 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
508 ADD_NVGPRS;ADD_RECONCILE)
511 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
512 * in the idle task and therefore need the special idle handling
513 * (finish nap and runlatch)
515 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
516 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
517 FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON)
520 * When the idle code in power4_idle puts the CPU into NAP mode,
521 * it has to do so in a loop, and relies on the external interrupt
522 * and decrementer interrupt entry code to get it out of the loop.
523 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
524 * to signal that it is in the loop and needs help to get out.
526 #ifdef CONFIG_PPC_970_NAP
529 CURRENT_THREAD_INFO(r11, r1); \
530 ld r9,TI_LOCAL_FLAGS(r11); \
531 andi. r10,r9,_TLF_NAPPING; \
532 bnel power4_fixup_nap; \
533 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
538 #endif /* _ASM_POWERPC_EXCEPTION_H */