2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
19 #include <asm/head-64.h>
22 * There are a few constraints to be concerned with.
23 * - Real mode exceptions code/data must be located at their physical location.
24 * - Virtual mode exceptions must be mapped at their 0xc000... location.
25 * - Fixed location code must not call directly beyond the __end_interrupts
26 * area when built with CONFIG_RELOCATABLE. LOAD_HANDLER / bctr sequence
28 * - LOAD_HANDLER targets must be within first 64K of physical 0 /
30 * - Conditional branch targets must be within +/-32K of caller.
32 * "Virtual exceptions" run with relocation on (MSR_IR=1, MSR_DR=1), and
33 * therefore don't have to run in physically located code or rfid to
34 * virtual mode kernel code. However on relocatable kernels they do have
35 * to branch to KERNELBASE offset because the rest of the kernel (outside
36 * the exception vectors) may be located elsewhere.
38 * Virtual exceptions correspond with physical, except their entry points
39 * are offset by 0xc000000000000000 and also tend to get an added 0x4000
40 * offset applied. Virtual exceptions are enabled with the Alternate
41 * Interrupt Location (AIL) bit set in the LPCR. However this does not
42 * guarantee they will be delivered virtually. Some conditions (see the ISA)
43 * cause exceptions to be delivered in real mode.
45 * It's impossible to receive interrupts below 0x300 via AIL.
47 * KVM: None of the virtual exceptions are from the guest. Anything that
48 * escalated to HV=1 from HV=0 is delivered via real mode handlers.
51 * We layout physical memory as follows:
52 * 0x0000 - 0x00ff : Secondary processor spin code
53 * 0x0100 - 0x18ff : Real mode pSeries interrupt vectors
54 * 0x1900 - 0x3fff : Real mode trampolines
55 * 0x4000 - 0x58ff : Relon (IR=1,DR=1) mode pSeries interrupt vectors
56 * 0x5900 - 0x6fff : Relon mode trampolines
57 * 0x7000 - 0x7fff : FWNMI data area
58 * 0x8000 - .... : Common interrupt handlers, remaining early
59 * setup code, rest of kernel.
61 * We could reclaim 0x4000-0x42ff for real mode trampolines if the space
62 * is necessary. Until then it's more consistent to explicitly put VIRT_NONE
65 OPEN_FIXED_SECTION(real_vectors, 0x0100, 0x1900)
66 OPEN_FIXED_SECTION(real_trampolines, 0x1900, 0x4000)
67 OPEN_FIXED_SECTION(virt_vectors, 0x4000, 0x5900)
68 OPEN_FIXED_SECTION(virt_trampolines, 0x5900, 0x7000)
69 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
71 * Data area reserved for FWNMI option.
72 * This address (0x7000) is fixed by the RPA.
73 * pseries and powernv need to keep the whole page from
74 * 0x7000 to 0x8000 free for use by the firmware
76 ZERO_FIXED_SECTION(fwnmi_page, 0x7000, 0x8000)
77 OPEN_TEXT_SECTION(0x8000)
79 OPEN_TEXT_SECTION(0x7000)
82 USE_FIXED_SECTION(real_vectors)
85 * This is the start of the interrupt handlers for pSeries
86 * This code runs with relocation off.
87 * Code from here to __end_interrupts gets copied down to real
88 * address 0x100 when we are running a relocatable kernel.
89 * Therefore any relative branches in this section must only
90 * branch to labels in this section.
92 .globl __start_interrupts
95 /* No virt vectors corresponding with 0x0..0x100 */
96 EXC_VIRT_NONE(0x4000, 0x4100)
99 #ifdef CONFIG_PPC_P7_NAP
101 * If running native on arch 2.06 or later, check if we are waking up
102 * from nap/sleep/winkle, and branch to idle handler.
104 #define IDLETEST(n) \
105 BEGIN_FTR_SECTION ; \
106 mfspr r10,SPRN_SRR1 ; \
107 rlwinm. r10,r10,47-31,30,31 ; \
110 BRANCH_TO_COMMON(r10, system_reset_idle_common) ; \
112 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
114 #define IDLETEST NOTEST
117 EXC_REAL_BEGIN(system_reset, 0x100, 0x200)
119 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
122 EXC_REAL_END(system_reset, 0x100, 0x200)
123 EXC_VIRT_NONE(0x4100, 0x4200)
125 #ifdef CONFIG_PPC_P7_NAP
126 EXC_COMMON_BEGIN(system_reset_idle_common)
127 bl pnv_restore_hyp_resource
129 li r0,PNV_THREAD_RUNNING
130 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
132 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
133 li r0,KVM_HWTHREAD_IN_KERNEL
134 stb r0,HSTATE_HWTHREAD_STATE(r13)
135 /* Order setting hwthread_state vs. testing hwthread_req */
137 lbz r0,HSTATE_HWTHREAD_REQ(r13)
144 /* Return SRR1 from power7_nap() */
148 2: b pnv_wakeup_noloss
151 EXC_COMMON(system_reset_common, 0x100, system_reset_exception)
153 #ifdef CONFIG_PPC_PSERIES
155 * Vectors for the FWNMI option. Share common code.
157 TRAMP_REAL_BEGIN(system_reset_fwnmi)
158 SET_SCRATCH0(r13) /* save r13 */
159 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
161 #endif /* CONFIG_PPC_PSERIES */
164 EXC_REAL_BEGIN(machine_check, 0x200, 0x300)
165 /* This is moved out of line as it can be patched by FW, but
166 * some code path might still want to branch into the original
169 SET_SCRATCH0(r13) /* save r13 */
171 * Running native on arch 2.06 or later, we may wakeup from winkle
172 * inside machine check. If yes, then last bit of HSPGR0 would be set
173 * to 1. Hence clear it unconditionally.
178 EXCEPTION_PROLOG_0(PACA_EXMC)
180 b machine_check_powernv_early
182 b machine_check_pSeries_0
183 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
184 EXC_REAL_END(machine_check, 0x200, 0x300)
185 EXC_VIRT_NONE(0x4200, 0x4300)
186 TRAMP_REAL_BEGIN(machine_check_powernv_early)
188 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
193 * Original R9 to R13 is saved on PACA_EXMC
195 * Switch to mc_emergency stack and handle re-entrancy (we limit
196 * the nested MCE upto level 4 to avoid stack overflow).
197 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
199 * We use paca->in_mce to check whether this is the first entry or
200 * nested machine check. We increment paca->in_mce to track nested
203 * If this is the first entry then set stack pointer to
204 * paca->mc_emergency_sp, otherwise r1 is already pointing to
205 * stack frame on mc_emergency stack.
207 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
208 * checkstop if we get another machine check exception before we do
209 * rfid with MSR_ME=1.
211 mr r11,r1 /* Save r1 */
212 lhz r10,PACA_IN_MCE(r13)
213 cmpwi r10,0 /* Are we in nested machine check */
214 bne 0f /* Yes, we are. */
215 /* First machine check entry */
216 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
217 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
218 addi r10,r10,1 /* increment paca->in_mce */
219 sth r10,PACA_IN_MCE(r13)
220 /* Limit nested MCE to level 4 to avoid stack overflow */
222 bgt 2f /* Check if we hit limit of 4 */
223 std r11,GPR1(r1) /* Save r1 on the stack. */
224 std r11,0(r1) /* make stack chain pointer */
225 mfspr r11,SPRN_SRR0 /* Save SRR0 */
227 mfspr r11,SPRN_SRR1 /* Save SRR1 */
229 mfspr r11,SPRN_DAR /* Save DAR */
231 mfspr r11,SPRN_DSISR /* Save DSISR */
233 std r9,_CCR(r1) /* Save CR in stackframe */
234 /* Save r9 through r13 from EXMC save area to stack frame. */
235 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
236 mfmsr r11 /* get MSR value */
237 ori r11,r11,MSR_ME /* turn on ME bit */
238 ori r11,r11,MSR_RI /* turn on RI bit */
239 LOAD_HANDLER(r12, machine_check_handle_early)
240 1: mtspr SPRN_SRR0,r12
243 b . /* prevent speculative execution */
245 /* Stack overflow. Stay on emergency stack and panic.
246 * Keep the ME bit off while panic-ing, so that if we hit
247 * another machine check we checkstop.
249 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
251 LOAD_HANDLER(r12, unrecover_mce)
253 andc r11,r11,r10 /* Turn off MSR_ME */
255 b . /* prevent speculative execution */
256 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
258 TRAMP_REAL_BEGIN(machine_check_pSeries)
259 .globl machine_check_fwnmi
261 SET_SCRATCH0(r13) /* save r13 */
262 EXCEPTION_PROLOG_0(PACA_EXMC)
263 machine_check_pSeries_0:
264 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST_PR, 0x200)
266 * The following is essentially EXCEPTION_PROLOG_PSERIES_1 with the
267 * difference that MSR_RI is not enabled, because PACA_EXMC is being
268 * used, so nested machine check corrupts it. machine_check_common
274 LOAD_HANDLER(r12, machine_check_common)
279 b . /* prevent speculative execution */
281 TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
283 EXC_COMMON_BEGIN(machine_check_common)
285 * Machine check is different because we use a different
286 * save area: PACA_EXMC instead of PACA_EXGEN.
289 std r10,PACA_EXMC+EX_DAR(r13)
291 stw r10,PACA_EXMC+EX_DSISR(r13)
292 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
294 RECONCILE_IRQ_STATE(r10, r11)
295 ld r3,PACA_EXMC+EX_DAR(r13)
296 lwz r4,PACA_EXMC+EX_DSISR(r13)
297 /* Enable MSR_RI when finished with PACA_EXMC */
303 addi r3,r1,STACK_FRAME_OVERHEAD
304 bl machine_check_exception
307 #define MACHINE_CHECK_HANDLER_WINDUP \
308 /* Clear MSR_RI before setting SRR0 and SRR1. */\
310 mfmsr r9; /* get MSR value */ \
312 mtmsrd r9,1; /* Clear MSR_RI */ \
313 /* Move original SRR0 and SRR1 into the respective regs */ \
315 mtspr SPRN_SRR1,r9; \
317 mtspr SPRN_SRR0,r3; \
329 /* Decrement paca->in_mce. */ \
330 lhz r12,PACA_IN_MCE(r13); \
332 sth r12,PACA_IN_MCE(r13); \
334 REST_2GPRS(12, r1); \
335 /* restore original r1. */ \
339 * Handle machine check early in real mode. We come here with
340 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
342 EXC_COMMON_BEGIN(machine_check_handle_early)
343 std r0,GPR0(r1) /* Save r0 */
344 EXCEPTION_PROLOG_COMMON_3(0x200)
346 addi r3,r1,STACK_FRAME_OVERHEAD
347 bl machine_check_early
348 std r3,RESULT(r1) /* Save result */
350 #ifdef CONFIG_PPC_P7_NAP
352 * Check if thread was in power saving mode. We come here when any
353 * of the following is true:
354 * a. thread wasn't in power saving mode
355 * b. thread was in power saving mode with no state loss,
356 * supervisor state loss or hypervisor state loss.
358 * Go back to nap/sleep/winkle mode again if (b) is true.
360 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
361 beq 4f /* No, it wasn;t */
362 /* Thread was in power saving mode. Go back to nap again. */
365 /* Supervisor/Hypervisor state loss */
367 stb r0,PACA_NAPSTATELOST(r13)
368 3: bl machine_check_queue_event
369 MACHINE_CHECK_HANDLER_WINDUP
373 * Check what idle state this CPU was in and go back to same mode
376 lbz r3,PACA_THREAD_IDLE_STATE(r13)
377 cmpwi r3,PNV_THREAD_NAP
379 IDLE_STATE_ENTER_SEQ(PPC_NAP)
382 cmpwi r3,PNV_THREAD_SLEEP
384 IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
389 * Go back to winkle. Please note that this thread was woken up in
390 * machine check from winkle and have not restored the per-subcore
391 * state. Hence before going back to winkle, set last bit of HSPGR0
392 * to 1. This will make sure that if this thread gets woken up
393 * again at reset vector 0x100 then it will get chance to restore
398 IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
403 * Check if we are coming from hypervisor userspace. If yes then we
404 * continue in host kernel in V mode to deliver the MC event.
406 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
408 andi. r11,r12,MSR_PR /* See if coming from user. */
409 bne 9f /* continue in V mode if we are. */
412 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
414 * We are coming from kernel context. Check if we are coming from
415 * guest. if yes, then we can continue. We will fall through
416 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
418 lbz r11,HSTATE_IN_GUEST(r13)
419 cmpwi r11,0 /* Check if coming from guest */
420 bne 9f /* continue if we are. */
423 * At this point we are not sure about what context we come from.
424 * Queue up the MCE event and return from the interrupt.
425 * But before that, check if this is an un-recoverable exception.
426 * If yes, then stay on emergency stack and panic.
430 1: mfspr r11,SPRN_SRR0
431 LOAD_HANDLER(r10,unrecover_mce)
435 * We are going down. But there are chances that we might get hit by
436 * another MCE during panic path and we may run into unstable state
437 * with no way out. Hence, turn ME bit off while going down, so that
438 * when another MCE is hit during panic path, system will checkstop
439 * and hypervisor will get restarted cleanly by SP.
442 andc r10,r10,r3 /* Turn off MSR_ME */
448 * Check if we have successfully handled/recovered from error, if not
449 * then stay on emergency stack and panic.
451 ld r3,RESULT(r1) /* Load result */
452 cmpdi r3,0 /* see if we handled MCE successfully */
454 beq 1b /* if !handled then panic */
456 * Return from MC interrupt.
457 * Queue up the MCE event so that we can log it later, while
458 * returning from kernel or opal call.
460 bl machine_check_queue_event
461 MACHINE_CHECK_HANDLER_WINDUP
464 /* Deliver the machine check to host kernel in V mode. */
465 MACHINE_CHECK_HANDLER_WINDUP
466 b machine_check_pSeries
468 EXC_COMMON_BEGIN(unrecover_mce)
469 /* Invoke machine_check_exception to print MCE event and panic. */
470 addi r3,r1,STACK_FRAME_OVERHEAD
471 bl machine_check_exception
473 * We will not reach here. Even if we did, there is no way out. Call
474 * unrecoverable_exception and die.
476 1: addi r3,r1,STACK_FRAME_OVERHEAD
477 bl unrecoverable_exception
481 EXC_REAL(data_access, 0x300, 0x380)
482 EXC_VIRT(data_access, 0x4300, 0x4380, 0x300)
483 TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
485 EXC_COMMON_BEGIN(data_access_common)
487 * Here r13 points to the paca, r9 contains the saved CR,
488 * SRR0 and SRR1 are saved in r11 and r12,
489 * r9 - r13 are saved in paca->exgen.
492 std r10,PACA_EXGEN+EX_DAR(r13)
494 stw r10,PACA_EXGEN+EX_DSISR(r13)
495 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
496 RECONCILE_IRQ_STATE(r10, r11)
498 ld r3,PACA_EXGEN+EX_DAR(r13)
499 lwz r4,PACA_EXGEN+EX_DSISR(r13)
503 BEGIN_MMU_FTR_SECTION
504 b do_hash_page /* Try to handle as hpte fault */
507 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
510 EXC_REAL_BEGIN(data_access_slb, 0x380, 0x400)
512 EXCEPTION_PROLOG_0(PACA_EXSLB)
513 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
514 std r3,PACA_EXSLB+EX_R3(r13)
518 #ifndef CONFIG_RELOCATABLE
522 * We can't just use a direct branch to slb_miss_realmode
523 * because the distance from here to there depends on where
524 * the kernel ends up being put.
527 LOAD_HANDLER(r10, slb_miss_realmode)
531 EXC_REAL_END(data_access_slb, 0x380, 0x400)
533 EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x4400)
535 EXCEPTION_PROLOG_0(PACA_EXSLB)
536 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
537 std r3,PACA_EXSLB+EX_R3(r13)
541 #ifndef CONFIG_RELOCATABLE
545 * We can't just use a direct branch to slb_miss_realmode
546 * because the distance from here to there depends on where
547 * the kernel ends up being put.
550 LOAD_HANDLER(r10, slb_miss_realmode)
554 EXC_VIRT_END(data_access_slb, 0x4380, 0x4400)
555 TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
558 EXC_REAL(instruction_access, 0x400, 0x480)
559 EXC_VIRT(instruction_access, 0x4400, 0x4480, 0x400)
560 TRAMP_KVM(PACA_EXGEN, 0x400)
562 EXC_COMMON_BEGIN(instruction_access_common)
563 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
564 RECONCILE_IRQ_STATE(r10, r11)
571 BEGIN_MMU_FTR_SECTION
572 b do_hash_page /* Try to handle as hpte fault */
575 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
578 EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x500)
580 EXCEPTION_PROLOG_0(PACA_EXSLB)
581 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
582 std r3,PACA_EXSLB+EX_R3(r13)
583 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
586 #ifndef CONFIG_RELOCATABLE
590 LOAD_HANDLER(r10, slb_miss_realmode)
594 EXC_REAL_END(instruction_access_slb, 0x480, 0x500)
596 EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x4500)
598 EXCEPTION_PROLOG_0(PACA_EXSLB)
599 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
600 std r3,PACA_EXSLB+EX_R3(r13)
601 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
604 #ifndef CONFIG_RELOCATABLE
608 LOAD_HANDLER(r10, slb_miss_realmode)
612 EXC_VIRT_END(instruction_access_slb, 0x4480, 0x4500)
613 TRAMP_KVM(PACA_EXSLB, 0x480)
616 /* This handler is used by both 0x380 and 0x480 slb miss interrupts */
617 EXC_COMMON_BEGIN(slb_miss_realmode)
619 * r13 points to the PACA, r9 contains the saved CR,
620 * r12 contain the saved SRR1, SRR0 is still ready for return
621 * r3 has the faulting address
622 * r9 - r13 are saved in paca->exslb.
623 * r3 is saved in paca->slb_r3
624 * cr6.eq is set for a D-SLB miss, clear for a I-SLB miss
625 * We assume we aren't going to take any exceptions during this
629 #ifdef CONFIG_RELOCATABLE
633 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
634 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
635 std r3,PACA_EXSLB+EX_DAR(r13)
638 #ifdef CONFIG_PPC_STD_MMU_64
639 BEGIN_MMU_FTR_SECTION
640 bl slb_allocate_realmode
641 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
644 ld r10,PACA_EXSLB+EX_LR(r13)
645 ld r3,PACA_EXSLB+EX_R3(r13)
646 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
649 beq 8f /* if bad address, make full stack frame */
651 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
654 /* All done -- return from exception. */
659 mtcrf 0x02,r9 /* I/D indication is in cr6 */
660 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
663 RESTORE_PPR_PACA(PACA_EXSLB, r9)
664 ld r9,PACA_EXSLB+EX_R9(r13)
665 ld r10,PACA_EXSLB+EX_R10(r13)
666 ld r11,PACA_EXSLB+EX_R11(r13)
667 ld r12,PACA_EXSLB+EX_R12(r13)
668 ld r13,PACA_EXSLB+EX_R13(r13)
670 b . /* prevent speculative execution */
672 2: mfspr r11,SPRN_SRR0
673 LOAD_HANDLER(r10,unrecov_slb)
680 8: mfspr r11,SPRN_SRR0
681 LOAD_HANDLER(r10,bad_addr_slb)
688 EXC_COMMON_BEGIN(unrecov_slb)
689 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
690 RECONCILE_IRQ_STATE(r10, r11)
692 1: addi r3,r1,STACK_FRAME_OVERHEAD
693 bl unrecoverable_exception
696 EXC_COMMON_BEGIN(bad_addr_slb)
697 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXSLB)
698 RECONCILE_IRQ_STATE(r10, r11)
699 ld r3, PACA_EXSLB+EX_DAR(r13)
702 li r10, 0x480 /* fix trap number for I-SLB miss */
705 addi r3, r1, STACK_FRAME_OVERHEAD
709 EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x600)
710 .globl hardware_interrupt_hv;
711 hardware_interrupt_hv:
713 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
714 EXC_HV, SOFTEN_TEST_HV)
716 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
718 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
719 EXC_STD, SOFTEN_TEST_PR)
721 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
722 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
723 EXC_REAL_END(hardware_interrupt, 0x500, 0x600)
725 EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x4600)
726 .globl hardware_interrupt_relon_hv;
727 hardware_interrupt_relon_hv:
729 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_HV, SOFTEN_TEST_HV)
731 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_STD, SOFTEN_TEST_PR)
732 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
733 EXC_VIRT_END(hardware_interrupt, 0x4500, 0x4600)
735 EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
738 EXC_REAL(alignment, 0x600, 0x700)
739 EXC_VIRT(alignment, 0x4600, 0x4700, 0x600)
740 TRAMP_KVM(PACA_EXGEN, 0x600)
741 EXC_COMMON_BEGIN(alignment_common)
743 std r10,PACA_EXGEN+EX_DAR(r13)
745 stw r10,PACA_EXGEN+EX_DSISR(r13)
746 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
747 ld r3,PACA_EXGEN+EX_DAR(r13)
748 lwz r4,PACA_EXGEN+EX_DSISR(r13)
752 RECONCILE_IRQ_STATE(r10, r11)
753 addi r3,r1,STACK_FRAME_OVERHEAD
754 bl alignment_exception
758 EXC_REAL(program_check, 0x700, 0x800)
759 EXC_VIRT(program_check, 0x4700, 0x4800, 0x700)
760 TRAMP_KVM(PACA_EXGEN, 0x700)
761 EXC_COMMON_BEGIN(program_check_common)
762 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
764 RECONCILE_IRQ_STATE(r10, r11)
765 addi r3,r1,STACK_FRAME_OVERHEAD
766 bl program_check_exception
770 EXC_REAL(fp_unavailable, 0x800, 0x900)
771 EXC_VIRT(fp_unavailable, 0x4800, 0x4900, 0x800)
772 TRAMP_KVM(PACA_EXGEN, 0x800)
773 EXC_COMMON_BEGIN(fp_unavailable_common)
774 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
775 bne 1f /* if from user, just load it up */
777 RECONCILE_IRQ_STATE(r10, r11)
778 addi r3,r1,STACK_FRAME_OVERHEAD
779 bl kernel_fp_unavailable_exception
782 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
784 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
785 * transaction), go do TM stuff
787 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
789 END_FTR_SECTION_IFSET(CPU_FTR_TM)
792 b fast_exception_return
793 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
794 2: /* User process was in a transaction */
796 RECONCILE_IRQ_STATE(r10, r11)
797 addi r3,r1,STACK_FRAME_OVERHEAD
803 EXC_REAL_MASKABLE(decrementer, 0x900, 0x980)
804 EXC_VIRT_MASKABLE(decrementer, 0x4900, 0x4980, 0x900)
805 TRAMP_KVM(PACA_EXGEN, 0x900)
806 EXC_COMMON_ASYNC(decrementer_common, 0x900, timer_interrupt)
809 EXC_REAL_HV(hdecrementer, 0x980, 0xa00)
810 EXC_VIRT_HV(hdecrementer, 0x4980, 0x4a00, 0x980)
811 TRAMP_KVM_HV(PACA_EXGEN, 0x980)
812 EXC_COMMON(hdecrementer_common, 0x980, hdec_interrupt)
815 EXC_REAL_MASKABLE(doorbell_super, 0xa00, 0xb00)
816 EXC_VIRT_MASKABLE(doorbell_super, 0x4a00, 0x4b00, 0xa00)
817 TRAMP_KVM(PACA_EXGEN, 0xa00)
818 #ifdef CONFIG_PPC_DOORBELL
819 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, doorbell_exception)
821 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, unknown_exception)
825 EXC_REAL(trap_0b, 0xb00, 0xc00)
826 EXC_VIRT(trap_0b, 0x4b00, 0x4c00, 0xb00)
827 TRAMP_KVM(PACA_EXGEN, 0xb00)
828 EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
830 #define LOAD_SYSCALL_HANDLER(reg) \
831 __LOAD_HANDLER(reg, system_call_common)
833 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
834 #define SYSCALL_PSERIES_1 \
838 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
841 mfspr r11,SPRN_SRR0 ; \
844 #define SYSCALL_PSERIES_2_RFID \
845 mfspr r12,SPRN_SRR1 ; \
846 LOAD_SYSCALL_HANDLER(r10) ; \
847 mtspr SPRN_SRR0,r10 ; \
848 ld r10,PACAKMSR(r13) ; \
849 mtspr SPRN_SRR1,r10 ; \
851 b . ; /* prevent speculative execution */
853 #define SYSCALL_PSERIES_3 \
854 /* Fast LE/BE switch system call */ \
855 1: mfspr r12,SPRN_SRR1 ; \
856 xori r12,r12,MSR_LE ; \
857 mtspr SPRN_SRR1,r12 ; \
858 rfid ; /* return to userspace */ \
859 b . ; /* prevent speculative execution */
861 #if defined(CONFIG_RELOCATABLE)
863 * We can't branch directly so we do it via the CTR which
864 * is volatile across system calls.
866 #define SYSCALL_PSERIES_2_DIRECT \
867 LOAD_SYSCALL_HANDLER(r12) ; \
869 mfspr r12,SPRN_SRR1 ; \
874 /* We can branch directly */
875 #define SYSCALL_PSERIES_2_DIRECT \
876 mfspr r12,SPRN_SRR1 ; \
878 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
879 b system_call_common ;
882 EXC_REAL_BEGIN(system_call, 0xc00, 0xd00)
884 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
885 * that support it) before changing to HMT_MEDIUM. That allows the KVM
886 * code to save that value into the guest state (it is the guest's PPR
887 * value). Otherwise just change to HMT_MEDIUM as userspace has
888 * already saved the PPR.
890 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
893 std r9,PACA_EXGEN+EX_R9(r13)
894 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
896 std r10,PACA_EXGEN+EX_R10(r13)
897 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
905 SYSCALL_PSERIES_2_RFID
907 EXC_REAL_END(system_call, 0xc00, 0xd00)
909 EXC_VIRT_BEGIN(system_call, 0x4c00, 0x4d00)
912 SYSCALL_PSERIES_2_DIRECT
914 EXC_VIRT_END(system_call, 0x4c00, 0x4d00)
916 TRAMP_KVM(PACA_EXGEN, 0xc00)
919 EXC_REAL(single_step, 0xd00, 0xe00)
920 EXC_VIRT(single_step, 0x4d00, 0x4e00, 0xd00)
921 TRAMP_KVM(PACA_EXGEN, 0xd00)
922 EXC_COMMON(single_step_common, 0xd00, single_step_exception)
924 EXC_REAL_OOL_HV(h_data_storage, 0xe00, 0xe20)
925 EXC_VIRT_NONE(0x4e00, 0x4e20)
926 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0xe00)
927 EXC_COMMON_BEGIN(h_data_storage_common)
929 std r10,PACA_EXGEN+EX_DAR(r13)
930 mfspr r10,SPRN_HDSISR
931 stw r10,PACA_EXGEN+EX_DSISR(r13)
932 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
934 RECONCILE_IRQ_STATE(r10, r11)
935 addi r3,r1,STACK_FRAME_OVERHEAD
940 EXC_REAL_OOL_HV(h_instr_storage, 0xe20, 0xe40)
941 EXC_VIRT_NONE(0x4e20, 0x4e40)
942 TRAMP_KVM_HV(PACA_EXGEN, 0xe20)
943 EXC_COMMON(h_instr_storage_common, 0xe20, unknown_exception)
946 EXC_REAL_OOL_HV(emulation_assist, 0xe40, 0xe60)
947 EXC_VIRT_OOL_HV(emulation_assist, 0x4e40, 0x4e60, 0xe40)
948 TRAMP_KVM_HV(PACA_EXGEN, 0xe40)
949 EXC_COMMON(emulation_assist_common, 0xe40, emulation_assist_interrupt)
953 * hmi_exception trampoline is a special case. It jumps to hmi_exception_early
954 * first, and then eventaully from there to the trampoline to get into virtual
957 __EXC_REAL_OOL_HV_DIRECT(hmi_exception, 0xe60, 0xe80, hmi_exception_early)
958 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(hmi_exception, 0xe60)
959 EXC_VIRT_NONE(0x4e60, 0x4e80)
960 TRAMP_KVM_HV(PACA_EXGEN, 0xe60)
961 TRAMP_REAL_BEGIN(hmi_exception_early)
962 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, 0xe60)
963 mr r10,r1 /* Save r1 */
964 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
965 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
966 std r9,_CCR(r1) /* save CR in stackframe */
967 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
968 std r11,_NIP(r1) /* save HSRR0 in stackframe */
969 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
970 std r12,_MSR(r1) /* save SRR1 in stackframe */
971 std r10,0(r1) /* make stack chain pointer */
972 std r0,GPR0(r1) /* save r0 in stackframe */
973 std r10,GPR1(r1) /* save r1 in stackframe */
974 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
975 EXCEPTION_PROLOG_COMMON_3(0xe60)
976 addi r3,r1,STACK_FRAME_OVERHEAD
977 bl hmi_exception_realmode
978 /* Windup the stack. */
979 /* Move original HSRR0 and HSRR1 into the respective regs */
997 /* restore original r1. */
1001 * Go to virtual mode and pull the HMI event information from
1004 .globl hmi_exception_after_realmode
1005 hmi_exception_after_realmode:
1007 EXCEPTION_PROLOG_0(PACA_EXGEN)
1008 b tramp_real_hmi_exception
1010 EXC_COMMON_ASYNC(hmi_exception_common, 0xe60, handle_hmi_exception)
1013 EXC_REAL_OOL_MASKABLE_HV(h_doorbell, 0xe80, 0xea0)
1014 EXC_VIRT_OOL_MASKABLE_HV(h_doorbell, 0x4e80, 0x4ea0, 0xe80)
1015 TRAMP_KVM_HV(PACA_EXGEN, 0xe80)
1016 #ifdef CONFIG_PPC_DOORBELL
1017 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, doorbell_exception)
1019 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, unknown_exception)
1023 EXC_REAL_OOL_MASKABLE_HV(h_virt_irq, 0xea0, 0xec0)
1024 EXC_VIRT_OOL_MASKABLE_HV(h_virt_irq, 0x4ea0, 0x4ec0, 0xea0)
1025 TRAMP_KVM_HV(PACA_EXGEN, 0xea0)
1026 EXC_COMMON_ASYNC(h_virt_irq_common, 0xea0, do_IRQ)
1029 EXC_REAL_NONE(0xec0, 0xf00)
1030 EXC_VIRT_NONE(0x4ec0, 0x4f00)
1033 EXC_REAL_OOL(performance_monitor, 0xf00, 0xf20)
1034 EXC_VIRT_OOL(performance_monitor, 0x4f00, 0x4f20, 0xf00)
1035 TRAMP_KVM(PACA_EXGEN, 0xf00)
1036 EXC_COMMON_ASYNC(performance_monitor_common, 0xf00, performance_monitor_exception)
1039 EXC_REAL_OOL(altivec_unavailable, 0xf20, 0xf40)
1040 EXC_VIRT_OOL(altivec_unavailable, 0x4f20, 0x4f40, 0xf20)
1041 TRAMP_KVM(PACA_EXGEN, 0xf20)
1042 EXC_COMMON_BEGIN(altivec_unavailable_common)
1043 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1044 #ifdef CONFIG_ALTIVEC
1047 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1048 BEGIN_FTR_SECTION_NESTED(69)
1049 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1050 * transaction), go do TM stuff
1052 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1054 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1057 b fast_exception_return
1058 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1059 2: /* User process was in a transaction */
1061 RECONCILE_IRQ_STATE(r10, r11)
1062 addi r3,r1,STACK_FRAME_OVERHEAD
1063 bl altivec_unavailable_tm
1067 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1070 RECONCILE_IRQ_STATE(r10, r11)
1071 addi r3,r1,STACK_FRAME_OVERHEAD
1072 bl altivec_unavailable_exception
1076 EXC_REAL_OOL(vsx_unavailable, 0xf40, 0xf60)
1077 EXC_VIRT_OOL(vsx_unavailable, 0x4f40, 0x4f60, 0xf40)
1078 TRAMP_KVM(PACA_EXGEN, 0xf40)
1079 EXC_COMMON_BEGIN(vsx_unavailable_common)
1080 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1084 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1085 BEGIN_FTR_SECTION_NESTED(69)
1086 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1087 * transaction), go do TM stuff
1089 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1091 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1094 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1095 2: /* User process was in a transaction */
1097 RECONCILE_IRQ_STATE(r10, r11)
1098 addi r3,r1,STACK_FRAME_OVERHEAD
1099 bl vsx_unavailable_tm
1103 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1106 RECONCILE_IRQ_STATE(r10, r11)
1107 addi r3,r1,STACK_FRAME_OVERHEAD
1108 bl vsx_unavailable_exception
1112 EXC_REAL_OOL(facility_unavailable, 0xf60, 0xf80)
1113 EXC_VIRT_OOL(facility_unavailable, 0x4f60, 0x4f80, 0xf60)
1114 TRAMP_KVM(PACA_EXGEN, 0xf60)
1115 EXC_COMMON(facility_unavailable_common, 0xf60, facility_unavailable_exception)
1118 EXC_REAL_OOL_HV(h_facility_unavailable, 0xf80, 0xfa0)
1119 EXC_VIRT_OOL_HV(h_facility_unavailable, 0x4f80, 0x4fa0, 0xf80)
1120 TRAMP_KVM_HV(PACA_EXGEN, 0xf80)
1121 EXC_COMMON(h_facility_unavailable_common, 0xf80, facility_unavailable_exception)
1124 EXC_REAL_NONE(0xfa0, 0x1200)
1125 EXC_VIRT_NONE(0x4fa0, 0x5200)
1127 #ifdef CONFIG_CBE_RAS
1128 EXC_REAL_HV(cbe_system_error, 0x1200, 0x1300)
1129 EXC_VIRT_NONE(0x5200, 0x5300)
1130 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1200)
1131 EXC_COMMON(cbe_system_error_common, 0x1200, cbe_system_error_exception)
1132 #else /* CONFIG_CBE_RAS */
1133 EXC_REAL_NONE(0x1200, 0x1300)
1134 EXC_VIRT_NONE(0x5200, 0x5300)
1138 EXC_REAL(instruction_breakpoint, 0x1300, 0x1400)
1139 EXC_VIRT(instruction_breakpoint, 0x5300, 0x5400, 0x1300)
1140 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1300)
1141 EXC_COMMON(instruction_breakpoint_common, 0x1300, instruction_breakpoint_exception)
1143 EXC_REAL_NONE(0x1400, 0x1500)
1144 EXC_VIRT_NONE(0x5400, 0x5500)
1146 EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x1600)
1147 mtspr SPRN_SPRG_HSCRATCH0,r13
1148 EXCEPTION_PROLOG_0(PACA_EXGEN)
1149 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
1151 #ifdef CONFIG_PPC_DENORMALISATION
1152 mfspr r10,SPRN_HSRR1
1153 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
1154 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
1155 addi r11,r11,-4 /* HSRR0 is next instruction */
1160 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
1161 EXC_REAL_END(denorm_exception_hv, 0x1500, 0x1600)
1163 #ifdef CONFIG_PPC_DENORMALISATION
1164 EXC_VIRT_BEGIN(denorm_exception, 0x5500, 0x5600)
1165 b exc_real_0x1500_denorm_exception_hv
1166 EXC_VIRT_END(denorm_exception, 0x5500, 0x5600)
1168 EXC_VIRT_NONE(0x5500, 0x5600)
1171 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1500)
1173 #ifdef CONFIG_PPC_DENORMALISATION
1174 TRAMP_REAL_BEGIN(denorm_assist)
1177 * To denormalise we need to move a copy of the register to itself.
1178 * For POWER6 do that here for all FP regs.
1181 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
1182 xori r10,r10,(MSR_FE0|MSR_FE1)
1186 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
1187 #define FMR4(n) FMR2(n) ; FMR2(n+2)
1188 #define FMR8(n) FMR4(n) ; FMR4(n+4)
1189 #define FMR16(n) FMR8(n) ; FMR8(n+8)
1190 #define FMR32(n) FMR16(n) ; FMR16(n+16)
1195 * To denormalise we need to move a copy of the register to itself.
1196 * For POWER7 do that here for the first 32 VSX registers only.
1199 oris r10,r10,MSR_VSX@h
1203 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
1204 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
1205 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
1206 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
1207 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
1210 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
1214 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
1216 * To denormalise we need to move a copy of the register to itself.
1217 * For POWER8 we need to do that for all 64 VSX registers
1221 mtspr SPRN_HSRR0,r11
1223 ld r9,PACA_EXGEN+EX_R9(r13)
1224 RESTORE_PPR_PACA(PACA_EXGEN, r10)
1226 ld r10,PACA_EXGEN+EX_CFAR(r13)
1228 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1229 ld r10,PACA_EXGEN+EX_R10(r13)
1230 ld r11,PACA_EXGEN+EX_R11(r13)
1231 ld r12,PACA_EXGEN+EX_R12(r13)
1232 ld r13,PACA_EXGEN+EX_R13(r13)
1237 EXC_COMMON_HV(denorm_common, 0x1500, unknown_exception)
1240 #ifdef CONFIG_CBE_RAS
1241 EXC_REAL_HV(cbe_maintenance, 0x1600, 0x1700)
1242 EXC_VIRT_NONE(0x5600, 0x5700)
1243 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1600)
1244 EXC_COMMON(cbe_maintenance_common, 0x1600, cbe_maintenance_exception)
1245 #else /* CONFIG_CBE_RAS */
1246 EXC_REAL_NONE(0x1600, 0x1700)
1247 EXC_VIRT_NONE(0x5600, 0x5700)
1251 EXC_REAL(altivec_assist, 0x1700, 0x1800)
1252 EXC_VIRT(altivec_assist, 0x5700, 0x5800, 0x1700)
1253 TRAMP_KVM(PACA_EXGEN, 0x1700)
1254 #ifdef CONFIG_ALTIVEC
1255 EXC_COMMON(altivec_assist_common, 0x1700, altivec_assist_exception)
1257 EXC_COMMON(altivec_assist_common, 0x1700, unknown_exception)
1261 #ifdef CONFIG_CBE_RAS
1262 EXC_REAL_HV(cbe_thermal, 0x1800, 0x1900)
1263 EXC_VIRT_NONE(0x5800, 0x5900)
1264 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1800)
1265 EXC_COMMON(cbe_thermal_common, 0x1800, cbe_thermal_exception)
1266 #else /* CONFIG_CBE_RAS */
1267 EXC_REAL_NONE(0x1800, 0x1900)
1268 EXC_VIRT_NONE(0x5800, 0x5900)
1273 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
1274 * - If it was a decrementer interrupt, we bump the dec to max and and return.
1275 * - If it was a doorbell we return immediately since doorbells are edge
1276 * triggered and won't automatically refire.
1277 * - If it was a HMI we return immediately since we handled it in realmode
1278 * and it won't refire.
1279 * - else we hard disable and return.
1280 * This is called with r10 containing the value to OR to the paca field.
1282 #define MASKED_INTERRUPT(_H) \
1283 masked_##_H##interrupt: \
1284 std r11,PACA_EXGEN+EX_R11(r13); \
1285 lbz r11,PACAIRQHAPPENED(r13); \
1287 stb r11,PACAIRQHAPPENED(r13); \
1288 cmpwi r10,PACA_IRQ_DEC; \
1291 ori r10,r10,0xffff; \
1292 mtspr SPRN_DEC,r10; \
1294 1: cmpwi r10,PACA_IRQ_DBELL; \
1296 cmpwi r10,PACA_IRQ_HMI; \
1298 mfspr r10,SPRN_##_H##SRR1; \
1299 rldicl r10,r10,48,1; /* clear MSR_EE */ \
1300 rotldi r10,r10,16; \
1301 mtspr SPRN_##_H##SRR1,r10; \
1303 ld r9,PACA_EXGEN+EX_R9(r13); \
1304 ld r10,PACA_EXGEN+EX_R10(r13); \
1305 ld r11,PACA_EXGEN+EX_R11(r13); \
1306 GET_SCRATCH0(r13); \
1311 * Real mode exceptions actually use this too, but alternate
1312 * instruction code patches (which end up in the common .text area)
1313 * cannot reach these if they are put there.
1315 USE_FIXED_SECTION(virt_trampolines)
1319 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1320 TRAMP_REAL_BEGIN(kvmppc_skip_interrupt)
1322 * Here all GPRs are unchanged from when the interrupt happened
1323 * except for r13, which is saved in SPRG_SCRATCH0.
1325 mfspr r13, SPRN_SRR0
1327 mtspr SPRN_SRR0, r13
1332 TRAMP_REAL_BEGIN(kvmppc_skip_Hinterrupt)
1334 * Here all GPRs are unchanged from when the interrupt happened
1335 * except for r13, which is saved in SPRG_SCRATCH0.
1337 mfspr r13, SPRN_HSRR0
1339 mtspr SPRN_HSRR0, r13
1346 * Ensure that any handlers that get invoked from the exception prologs
1347 * above are below the first 64KB (0x10000) of the kernel image because
1348 * the prologs assemble the addresses of these handlers using the
1349 * LOAD_HANDLER macro, which uses an ori instruction.
1352 /*** Common interrupt handlers ***/
1356 * Relocation-on interrupts: A subset of the interrupts can be delivered
1357 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
1358 * it. Addresses are the same as the original interrupt addresses, but
1359 * offset by 0xc000000000004000.
1360 * It's impossible to receive interrupts below 0x300 via this mechanism.
1361 * KVM: None of these traps are from the guest ; anything that escalated
1362 * to HV=1 from HV=0 is delivered via real mode handlers.
1366 * This uses the standard macro, since the original 0x300 vector
1367 * only has extra guff for STAB-based processors -- which never
1371 EXC_COMMON_BEGIN(ppc64_runlatch_on_trampoline)
1372 b __ppc64_runlatch_on
1374 USE_FIXED_SECTION(virt_trampolines)
1376 * The __end_interrupts marker must be past the out-of-line (OOL)
1377 * handlers, so that they are copied to real address 0x100 when running
1378 * a relocatable kernel. This ensures they can be reached from the short
1379 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1380 * directly, without using LOAD_HANDLER().
1383 .globl __end_interrupts
1385 DEFINE_FIXED_SYMBOL(__end_interrupts)
1387 #ifdef CONFIG_PPC_970_NAP
1388 EXC_COMMON_BEGIN(power4_fixup_nap)
1390 std r9,TI_LOCAL_FLAGS(r11)
1391 ld r10,_LINK(r1) /* make idle task do the */
1392 std r10,_NIP(r1) /* equivalent of a blr */
1396 CLOSE_FIXED_SECTION(real_vectors);
1397 CLOSE_FIXED_SECTION(real_trampolines);
1398 CLOSE_FIXED_SECTION(virt_vectors);
1399 CLOSE_FIXED_SECTION(virt_trampolines);
1408 #ifdef CONFIG_PPC_STD_MMU_64
1409 andis. r0,r4,0xa410 /* weird error? */
1410 bne- handle_page_fault /* if not, try to insert a HPTE */
1411 andis. r0,r4,DSISR_DABRMATCH@h
1412 bne- handle_dabr_fault
1413 CURRENT_THREAD_INFO(r11, r1)
1414 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1415 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1416 bne 77f /* then don't call hash_page now */
1419 * r3 contains the faulting address
1421 * r5 contains the trap number
1424 * at return r3 = 0 for success, 1 for page fault, negative for error
1428 bl __hash_page /* build HPTE if possible */
1429 cmpdi r3,0 /* see if __hash_page succeeded */
1432 beq fast_exc_return_irq /* Return from exception on success */
1436 #endif /* CONFIG_PPC_STD_MMU_64 */
1438 /* Here we have a page fault that hash_page can't handle. */
1442 addi r3,r1,STACK_FRAME_OVERHEAD
1448 addi r3,r1,STACK_FRAME_OVERHEAD
1453 /* We have a data breakpoint exception - handle it */
1458 addi r3,r1,STACK_FRAME_OVERHEAD
1460 12: b ret_from_except_lite
1463 #ifdef CONFIG_PPC_STD_MMU_64
1464 /* We have a page fault that hash_page could handle but HV refused
1469 addi r3,r1,STACK_FRAME_OVERHEAD
1476 * We come here as a result of a DSI at a point where we don't want
1477 * to call hash_page, such as when we are accessing memory (possibly
1478 * user memory) inside a PMU interrupt that occurred while interrupts
1479 * were soft-disabled. We want to invoke the exception handler for
1480 * the access, or panic if there isn't a handler.
1484 addi r3,r1,STACK_FRAME_OVERHEAD
1490 * Here we have detected that the kernel stack pointer is bad.
1491 * R9 contains the saved CR, r13 points to the paca,
1492 * r10 contains the (bad) kernel stack pointer,
1493 * r11 and r12 contain the saved SRR0 and SRR1.
1494 * We switch to using an emergency stack, save the registers there,
1495 * and call kernel_bad_stack(), which panics.
1498 ld r1,PACAEMERGSP(r13)
1499 subi r1,r1,64+INT_FRAME_SIZE
1505 mfspr r12,SPRN_DSISR
1531 std r10,ORIG_GPR3(r1)
1532 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1535 lhz r12,PACA_TRAP_SAVE(r13)
1537 addi r11,r1,INT_FRAME_SIZE
1542 ld r11,exception_marker@toc(r2)
1544 std r11,STACK_FRAME_OVERHEAD-16(r1)
1545 1: addi r3,r1,STACK_FRAME_OVERHEAD
1550 * Called from arch_local_irq_enable when an interrupt needs
1551 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
1552 * which kind of interrupt. MSR:EE is already off. We generate a
1553 * stackframe like if a real interrupt had happened.
1555 * Note: While MSR:EE is off, we need to make sure that _MSR
1556 * in the generated frame has EE set to 1 or the exception
1557 * handler will not properly re-enable them.
1559 _GLOBAL(__replay_interrupt)
1560 /* We are going to jump to the exception common code which
1561 * will retrieve various register values from the PACA which
1562 * we don't give a damn about, so we don't bother storing them.
1569 beq decrementer_common
1571 beq hardware_interrupt_common
1574 beq h_doorbell_common
1576 beq h_virt_irq_common
1578 beq hmi_exception_common
1581 beq doorbell_super_common
1582 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)