3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
26 #include <linux/init.h>
30 #include <asm/ppc_asm.h>
31 #include <asm/head-64.h>
32 #include <asm/asm-offsets.h>
34 #include <asm/cputable.h>
35 #include <asm/setup.h>
36 #include <asm/hvcall.h>
37 #include <asm/thread_info.h>
38 #include <asm/firmware.h>
39 #include <asm/page_64.h>
40 #include <asm/irqflags.h>
41 #include <asm/kvm_book3s_asm.h>
42 #include <asm/ptrace.h>
43 #include <asm/hw_irq.h>
44 #include <asm/cputhreads.h>
45 #include <asm/ppc-opcode.h>
47 /* The physical memory is laid out such that the secondary processor
48 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
49 * using the layout described in exceptions-64s.S
53 * Entering into this code we make the following assumptions:
55 * For pSeries or server processors:
56 * 1. The MMU is off & open firmware is running in real mode.
57 * 2. The kernel is entered at __start
58 * -or- For OPAL entry:
59 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
60 * with device-tree in gpr3. We also get OPAL base in r8 and
61 * entry in r9 for debugging purposes
62 * 2. Secondary processors enter at 0x60 with PIR in gpr3
64 * For Book3E processors:
65 * 1. The MMU is on running in AS0 in a state defined in ePAPR
66 * 2. The kernel is entered at __start
69 OPEN_FIXED_SECTION(first_256B, 0x0, 0x100)
70 USE_FIXED_SECTION(first_256B)
72 * Offsets are relative from the start of fixed section, and
73 * first_256B starts at 0. Offsets are a bit easier to use here
74 * than the fixed section entry macros.
78 /* NOP this out unconditionally */
81 b __start_initialization_multiplatform
84 /* Catch branch to 0 in real mode */
87 /* Secondary processors spin on this value until it becomes non-zero.
88 * When non-zero, it contains the real address of the function the cpu
92 .globl __secondary_hold_spinloop
93 __secondary_hold_spinloop:
96 /* Secondary processors write this value with their cpu # */
97 /* after they enter the spin loop immediately below. */
98 .globl __secondary_hold_acknowledge
99 __secondary_hold_acknowledge:
102 #ifdef CONFIG_RELOCATABLE
103 /* This flag is set to 1 by a loader if the kernel should run
104 * at the loaded address instead of the linked address. This
105 * is used by kexec-tools to keep the the kdump kernel in the
106 * crash_kernel region. The loader is responsible for
107 * observing the alignment requirement.
109 /* Do not move this variable as kexec-tools knows about it. */
113 DEFINE_FIXED_SYMBOL(__run_at_load)
114 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
119 * The following code is used to hold secondary processors
120 * in a spin loop after they have entered the kernel, but
121 * before the bulk of the kernel has been relocated. This code
122 * is relocated to physical address 0x60 before prom_init is run.
123 * All of it must fit below the first exception vector at 0x100.
124 * Use .globl here not _GLOBAL because we want __secondary_hold
125 * to be the actual text address, not a descriptor.
127 .globl __secondary_hold
130 #ifndef CONFIG_PPC_BOOK3E
133 mtmsrd r24 /* RI on */
135 /* Grab our physical cpu number */
137 /* stash r4 for book3e */
140 /* Tell the master cpu we're here */
141 /* Relocation is off & we are located at an address less */
142 /* than 0x100, so only need to grab low order offset. */
143 std r24,(ABS_ADDR(__secondary_hold_acknowledge))(0)
147 #ifdef CONFIG_PPC_BOOK3E
150 /* All secondary cpus wait here until told to start. */
151 100: ld r12,(ABS_ADDR(__secondary_hold_spinloop))(r26)
155 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
156 #ifdef CONFIG_PPC_BOOK3E
162 * it may be the case that other platforms have r4 right to
163 * begin with, this gives us some safety in case it is not
165 #ifdef CONFIG_PPC_BOOK3E
170 /* Make sure that patched code is visible */
176 CLOSE_FIXED_SECTION(first_256B)
178 /* This value is used to mark exception frames on the stack. */
181 .tc ID_72656773_68657265[TC],0x7265677368657265
185 * On server, we include the exception vectors code here as it
186 * relies on absolute addressing which is only possible within
187 * this compilation unit
189 #ifdef CONFIG_PPC_BOOK3S
190 #include "exceptions-64s.S"
192 OPEN_TEXT_SECTION(0x100)
197 #ifdef CONFIG_PPC_BOOK3E
199 * The booting_thread_hwid holds the thread id we want to boot in cpu
200 * hotplug case. It is set by cpu hotplug code, and is invalid by default.
201 * The thread id is the same as the initial value of SPRN_PIR[THREAD_ID]
204 .globl booting_thread_hwid
206 .long INVALID_THREAD_HWID
209 * start a thread in the same core
211 * r3 = the thread physical id
212 * r4 = the entry point where thread starts
214 _GLOBAL(book3e_start_thread)
215 LOAD_REG_IMMEDIATE(r5, MSR_KERNEL)
220 /* If the thread id is invalid, just exit. */
238 * stop a thread in the same core
240 * r3 = the thread physical id
242 _GLOBAL(book3e_stop_thread)
247 /* If the thread id is invalid, just exit. */
256 _GLOBAL(fsl_secondary_thread_init)
259 /* Enable branch prediction */
261 ori r3,r3,BUCSR_INIT@l
266 * Fix PIR to match the linear numbering in the device tree.
268 * On e6500, the reset value of PIR uses the low three bits for
269 * the thread within a core, and the upper bits for the core
270 * number. There are two threads per core, so shift everything
271 * but the low bit right by two bits so that the cpu numbering is
274 * If the old value of BUCSR is non-zero, this thread has run
275 * before. Thus, we assume we are coming from kexec or a similar
276 * scenario, and PIR is already set to the correct value. This
277 * is a bit of a hack, but there are limited opportunities for
278 * getting information into the thread and the alternatives
279 * seemed like they'd be overkill. We can't tell just by looking
280 * at the old PIR value which state it's in, since the same value
281 * could be valid for one thread out of reset and for a different
288 rlwimi r3, r3, 30, 2, 30
293 _GLOBAL(generic_secondary_thread_init)
296 /* turn on 64-bit mode */
299 /* get a valid TOC pointer, wherever we're mapped at */
303 #ifdef CONFIG_PPC_BOOK3E
304 /* Book3E initialization */
306 bl book3e_secondary_thread_init
308 b generic_secondary_common_init
311 * On pSeries and most other platforms, secondary processors spin
312 * in the following code.
313 * At entry, r3 = this processor's number (physical cpu id)
315 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
316 * this core already exists (setup via some other mechanism such
317 * as SCOM before entry).
319 _GLOBAL(generic_secondary_smp_init)
324 /* turn on 64-bit mode */
327 /* get a valid TOC pointer, wherever we're mapped at */
331 #ifdef CONFIG_PPC_BOOK3E
332 /* Book3E initialization */
335 bl book3e_secondary_core_init
338 * After common core init has finished, check if the current thread is the
339 * one we wanted to boot. If not, start the specified thread and stop the
342 LOAD_REG_ADDR(r4, booting_thread_hwid)
344 li r5, INVALID_THREAD_HWID
349 * The value of booting_thread_hwid has been stored in r3,
350 * so make it invalid.
355 * Get the current thread id and check if it is the one we wanted.
356 * If not, start the one specified in booting_thread_hwid and stop
357 * the current thread.
363 /* start the specified thread */
364 LOAD_REG_ADDR(r5, fsl_secondary_thread_init)
366 bl book3e_start_thread
368 /* stop the current thread */
370 bl book3e_stop_thread
376 generic_secondary_common_init:
377 /* Set up a paca value for this processor. Since we have the
378 * physical cpu id in r24, we need to search the pacas to find
379 * which logical id maps to our physical one.
381 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
382 ld r13,0(r13) /* Get base vaddr of paca array */
384 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
385 b kexec_wait /* wait for next kernel if !SMP */
387 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
388 lwz r7,0(r7) /* also the max paca allocated */
389 li r5,0 /* logical cpu id */
390 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
391 cmpw r6,r24 /* Compare to our id */
393 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
395 cmpw r5,r7 /* Check if more pacas exist */
398 mr r3,r24 /* not found, copy phys to r3 */
399 b kexec_wait /* next kernel might do better */
402 #ifdef CONFIG_PPC_BOOK3E
403 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
404 mtspr SPRN_SPRG_TLB_EXFRAME,r12
407 /* From now on, r24 is expected to be logical cpuid */
410 /* See if we need to call a cpu state restore handler */
411 LOAD_REG_ADDR(r23, cur_cpu_spec)
413 ld r12,CPU_SPEC_RESTORE(r23)
416 #ifdef PPC64_ELF_ABI_v1
422 3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
430 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
433 beq 4b /* Loop until told to go */
435 sync /* order paca.run and cur_cpu_spec */
436 isync /* In case code patching happened */
438 /* Create a temp kernel stack for use before relocation is on. */
439 ld r1,PACAEMERGSP(r13)
440 subi r1,r1,STACK_FRAME_OVERHEAD
447 * Assumes we're mapped EA == RA if the MMU is on.
449 #ifdef CONFIG_PPC_BOOK3S
452 andi. r0,r3,MSR_IR|MSR_DR
460 b . /* prevent speculative execution */
465 * Here is our main kernel entry point. We support currently 2 kind of entries
466 * depending on the value of r5.
468 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
471 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
472 * DT block, r4 is a physical pointer to the kernel itself
475 __start_initialization_multiplatform:
476 /* Make sure we are running in 64 bits mode */
479 /* Get TOC pointer (current runtime address) */
482 /* find out where we are now */
484 0: mflr r26 /* r26 = runtime addr here */
485 addis r26,r26,(_stext - 0b)@ha
486 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
489 * Are we booted from a PROM Of-type client-interface ?
493 b __boot_from_prom /* yes -> prom */
495 /* Save parameters */
498 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
499 /* Save OPAL entry */
504 #ifdef CONFIG_PPC_BOOK3E
505 bl start_initialization_book3e
508 /* Setup some critical 970 SPRs before switching MMU off */
511 cmpwi r0,0x39 /* 970 */
513 cmpwi r0,0x3c /* 970FX */
515 cmpwi r0,0x44 /* 970MP */
517 cmpwi r0,0x45 /* 970GX */
519 1: bl __cpu_preinit_ppc970
522 /* Switch off MMU if not already off */
525 #endif /* CONFIG_PPC_BOOK3E */
528 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
529 /* Save parameters */
537 * Align the stack to 16-byte boundary
538 * Depending on the size and layout of the ELF sections in the initial
539 * boot binary, the stack pointer may be unaligned on PowerMac
543 #ifdef CONFIG_RELOCATABLE
544 /* Relocate code for where we are now */
549 /* Restore parameters */
556 /* Do all of the interaction with OF client interface */
559 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
561 /* We never return. We also hit that trap if trying to boot
562 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
566 #ifdef CONFIG_RELOCATABLE
567 /* process relocations for the final address of the kernel */
568 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
570 #if defined(CONFIG_PPC_BOOK3E)
571 tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */
573 lwz r7,(FIXED_SYMBOL_ABS_ADDR(__run_at_load))(r26)
574 #if defined(CONFIG_PPC_BOOK3E)
577 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
582 #if defined(CONFIG_PPC_BOOK3E)
583 /* IVPR needs to be set after relocation. */
589 * We need to run with _stext at physical address PHYSICAL_START.
590 * This will leave some code in the first 256B of
591 * real memory, which are reserved for software use.
593 * Note: This process overwrites the OF exception vectors.
595 li r3,0 /* target addr */
596 #ifdef CONFIG_PPC_BOOK3E
597 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
599 mr. r4,r26 /* In some cases the loader may */
600 #if defined(CONFIG_PPC_BOOK3E)
603 beq 9f /* have already put us at zero */
604 li r6,0x100 /* Start offset, the first 0x100 */
605 /* bytes were copied earlier. */
607 #ifdef CONFIG_RELOCATABLE
609 * Check if the kernel has to be running as relocatable kernel based on the
610 * variable __run_at_load, if it is set the kernel is treated as relocatable
611 * kernel, otherwise it will be moved to PHYSICAL_START
613 #if defined(CONFIG_PPC_BOOK3E)
614 tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */
616 lwz r7,(FIXED_SYMBOL_ABS_ADDR(__run_at_load))(r26)
620 #ifdef CONFIG_PPC_BOOK3E
621 LOAD_REG_ADDR(r5, __end_interrupts)
622 LOAD_REG_ADDR(r11, _stext)
625 /* just copy interrupts */
626 LOAD_REG_IMMEDIATE(r5, FIXED_SYMBOL_ABS_ADDR(__end_interrupts))
631 /* # bytes of memory to copy */
632 lis r5,(ABS_ADDR(copy_to_here))@ha
633 addi r5,r5,(ABS_ADDR(copy_to_here))@l
635 bl copy_and_flush /* copy the first n bytes */
636 /* this includes the code being */
638 /* Jump to the copy of this code that we just made */
639 addis r8,r3,(ABS_ADDR(4f))@ha
640 addi r12,r8,(ABS_ADDR(4f))@l
645 p_end: .llong _end - copy_to_here
649 * Now copy the rest of the kernel up to _end, add
650 * _end - copy_to_here to the copy limit and run again.
652 addis r8,r26,(ABS_ADDR(p_end))@ha
653 ld r8,(ABS_ADDR(p_end))@l(r8)
655 5: bl copy_and_flush /* copy the rest */
657 9: b start_here_multiplatform
660 * Copy routine used to copy the kernel to start at physical address 0
661 * and flush and invalidate the caches as needed.
662 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
663 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
665 * Note: this routine *only* clobbers r0, r6 and lr
667 _GLOBAL(copy_and_flush)
670 4: li r0,8 /* Use the smallest common */
671 /* denominator cache line */
672 /* size. This results in */
673 /* extra cache line flushes */
674 /* but operation is correct. */
675 /* Can't get cache line size */
676 /* from NACA as it is being */
679 mtctr r0 /* put # words/line in ctr */
680 3: addi r6,r6,8 /* copy a cache line */
684 dcbst r6,r3 /* write it to memory */
686 icbi r6,r3 /* flush the icache line */
699 #ifdef CONFIG_PPC_PMAC
701 * On PowerMac, secondary processors starts from the reset vector, which
702 * is temporarily turned into a call to one of the functions below.
707 .globl __secondary_start_pmac_0
708 __secondary_start_pmac_0:
709 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
719 _GLOBAL(pmac_secondary_start)
720 /* turn on 64-bit mode */
725 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
732 /* get TOC pointer (real address) */
736 /* Copy some CPU settings from CPU 0 */
737 bl __restore_cpu_ppc970
739 /* pSeries do that early though I don't think we really need it */
742 mtmsrd r3 /* RI on */
744 /* Set up a paca value for this processor. */
745 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
746 ld r4,0(r4) /* Get base vaddr of paca array */
747 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
748 add r13,r13,r4 /* for this processor. */
749 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
751 /* Mark interrupts soft and hard disabled (they might be enabled
752 * in the PACA when doing hotplug)
755 stb r0,PACASOFTIRQEN(r13)
756 li r0,PACA_IRQ_HARD_DIS
757 stb r0,PACAIRQHAPPENED(r13)
759 /* Create a temp kernel stack for use before relocation is on. */
760 ld r1,PACAEMERGSP(r13)
761 subi r1,r1,STACK_FRAME_OVERHEAD
765 #endif /* CONFIG_PPC_PMAC */
768 * This function is called after the master CPU has released the
769 * secondary processors. The execution environment is relocation off.
770 * The paca for this processor has the following fields initialized at
772 * 1. Processor number
773 * 2. Segment table pointer (virtual address)
774 * On entry the following are set:
775 * r1 = stack pointer (real addr of temp stack)
776 * r24 = cpu# (in Linux terms)
777 * r13 = paca virtual address
778 * SPRG_PACA = paca virtual address
783 .globl __secondary_start
785 /* Set thread priority to MEDIUM */
788 /* Initialize the kernel stack */
789 LOAD_REG_ADDR(r3, current_set)
790 sldi r28,r24,3 /* get current_set[cpu#] */
792 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
793 std r14,PACAKSAVE(r13)
795 /* Do early setup for that CPU (SLB and hash table pointer) */
796 bl early_setup_secondary
799 * setup the new stack pointer, but *don't* use this until
804 /* Clear backchain so we get nice backtraces */
808 /* Mark interrupts soft and hard disabled (they might be enabled
809 * in the PACA when doing hotplug)
811 stb r7,PACASOFTIRQEN(r13)
812 li r0,PACA_IRQ_HARD_DIS
813 stb r0,PACAIRQHAPPENED(r13)
815 /* enable MMU and jump to start_secondary */
816 LOAD_REG_ADDR(r3, start_secondary_prolog)
817 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
822 b . /* prevent speculative execution */
825 * Running with relocation on at this point. All we want to do is
826 * zero the stack back-chain pointer and get the TOC virtual address
827 * before going into C code.
829 start_secondary_prolog:
832 std r3,0(r1) /* Zero the stack frame pointer */
836 * Reset stack pointer and call start_secondary
837 * to continue with online operation when woken up
838 * from cede in cpu offline.
840 _GLOBAL(start_secondary_resume)
841 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
843 std r3,0(r1) /* Zero the stack frame pointer */
849 * This subroutine clobbers r11 and r12
852 mfmsr r11 /* grab the current MSR */
853 #ifdef CONFIG_PPC_BOOK3E
854 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
856 #else /* CONFIG_PPC_BOOK3E */
857 li r12,(MSR_64BIT | MSR_ISF)@highest
866 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
867 * by the toolchain). It computes the correct value for wherever we
868 * are running at the moment, using position-independent code.
870 * Note: The compiler constructs pointers using offsets from the
871 * TOC in -mcmodel=medium mode. After we relocate to 0 but before
872 * the MMU is on we need our TOC to be a virtual address otherwise
873 * these pointers will be real addresses which may get stored and
874 * accessed later with the MMU on. We use tovirt() at the call
875 * sites to handle this.
877 _GLOBAL(relative_toc)
881 ld r2,(p_toc - 0b)(r11)
887 p_toc: .llong __toc_start + 0x8000 - 0b
890 * This is where the main kernel code starts.
892 start_here_multiplatform:
897 /* Clear out the BSS. It may have been done in prom_init,
898 * already but that's irrelevant since prom_init will soon
899 * be detached from the kernel completely. Besides, we need
900 * to clear it now for kexec-style entry.
902 LOAD_REG_ADDR(r11,__bss_stop)
903 LOAD_REG_ADDR(r8,__bss_start)
904 sub r11,r11,r8 /* bss size */
905 addi r11,r11,7 /* round up to an even double word */
906 srdi. r11,r11,3 /* shift right by 3 */
910 mtctr r11 /* zero this many doublewords */
915 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
916 /* Setup OPAL entry */
917 LOAD_REG_ADDR(r11, opal)
922 #ifndef CONFIG_PPC_BOOK3E
925 mtmsrd r6 /* RI on */
928 #ifdef CONFIG_RELOCATABLE
929 /* Save the physical address we're running at in kernstart_addr */
930 LOAD_REG_ADDR(r4, kernstart_addr)
935 /* The following gets the stack set up with the regs */
936 /* pointing to the real addr of the kernel stack. This is */
937 /* all done to support the C function call below which sets */
938 /* up the htab. This is done because we have relocated the */
939 /* kernel but are still running in real mode. */
941 LOAD_REG_ADDR(r3,init_thread_union)
943 /* set up a stack pointer */
944 addi r1,r3,THREAD_SIZE
946 stdu r0,-STACK_FRAME_OVERHEAD(r1)
949 * Do very early kernel initializations, including initial hash table
950 * and SLB setup before we turn on relocation.
953 /* Restore parameters passed from prom_init/kexec */
955 bl early_setup /* also sets r13 and SPRG_PACA */
957 LOAD_REG_ADDR(r3, start_here_common)
962 b . /* prevent speculative execution */
964 /* This is where all platforms converge execution */
967 /* relocation is on at this point */
968 std r1,PACAKSAVE(r13)
970 /* Load the TOC (virtual address) */
973 /* Mark interrupts soft and hard disabled (they might be enabled
974 * in the PACA when doing hotplug)
977 stb r0,PACASOFTIRQEN(r13)
978 li r0,PACA_IRQ_HARD_DIS
979 stb r0,PACAIRQHAPPENED(r13)
981 /* Generic kernel entry */
988 * We put a few things here that have to be page-aligned.
989 * This stuff goes at the beginning of the bss, which is page-aligned.
993 * pgd dir should be aligned to PGD_TABLE_SIZE which is 64K.
994 * We will need to find a better way to fix this
998 .globl swapper_pg_dir
1000 .space PGD_TABLE_SIZE
1002 .globl empty_zero_page