2 * Common prep/pmac/chrp boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/tty.h>
14 #include <linux/seq_file.h>
15 #include <linux/root_dev.h>
16 #include <linux/cpu.h>
17 #include <linux/console.h>
18 #include <linux/memblock.h>
22 #include <asm/processor.h>
23 #include <asm/pgtable.h>
24 #include <asm/setup.h>
27 #include <asm/cputable.h>
28 #include <asm/bootx.h>
29 #include <asm/btext.h>
30 #include <asm/machdep.h>
31 #include <asm/uaccess.h>
32 #include <asm/pmac_feature.h>
33 #include <asm/sections.h>
34 #include <asm/nvram.h>
37 #include <asm/serial.h>
39 #include <asm/mmu_context.h>
40 #include <asm/code-patching.h>
44 extern void bootx_init(unsigned long r4, unsigned long phys);
47 EXPORT_SYMBOL_GPL(boot_cpuid_phys);
49 int smp_hw_index[NR_CPUS];
51 unsigned long ISA_DMA_THRESHOLD;
52 unsigned int DMA_MODE_READ;
53 unsigned int DMA_MODE_WRITE;
56 * These are used in binfmt_elf.c to put aux entries on the stack
57 * for each elf executable being started.
64 * We're called here very early in the boot.
66 * Note that the kernel may be running at an address which is different
67 * from the address that it was linked at, so we must use RELOC/PTRRELOC
68 * to access static data (including strings). -- paulus
70 notrace unsigned long __init early_init(unsigned long dt_ptr)
72 unsigned long offset = reloc_offset();
74 /* First zero the BSS -- use memset_io, some platforms don't have
76 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
77 __bss_stop - __bss_start);
80 * Identify the CPU type and fix up code sections
81 * that depend on which cpu we have.
83 identify_cpu(offset, mfspr(SPRN_PVR));
85 apply_feature_fixups();
87 return KERNELBASE + offset;
92 * This is run before start_kernel(), the kernel has been relocated
93 * and we are running with enough of the MMU enabled to have our
94 * proper kernel virtual addresses
96 * Find out what kind of machine we're on and save any data we need
97 * from the early boot process (devtree is copied on pmac by prom_init()).
98 * This is called very early on the boot process, after a minimal
99 * MMU environment has been set up but before MMU_init is called.
101 extern unsigned int memset_nocache_branch; /* Insn to be replaced by NOP */
103 notrace void __init machine_init(u64 dt_ptr)
105 /* Enable early debugging if any specified (see udbg.h) */
108 patch_instruction((unsigned int *)&memcpy, PPC_INST_NOP);
109 patch_instruction(&memset_nocache_branch, PPC_INST_NOP);
111 /* Do some early initialization based on the flat device tree */
112 early_init_devtree(__va(dt_ptr));
118 setup_kdump_trampoline();
121 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
122 cpu_has_feature(CPU_FTR_CAN_NAP))
123 ppc_md.power_save = ppc6xx_idle;
127 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
128 cpu_has_feature(CPU_FTR_CAN_NAP))
129 ppc_md.power_save = e500_idle;
132 ppc_md.progress("id mach(): done", 0x200);
135 /* Checks "l2cr=xxxx" command-line option */
136 int __init ppc_setup_l2cr(char *str)
138 if (cpu_has_feature(CPU_FTR_L2CR)) {
139 unsigned long val = simple_strtoul(str, NULL, 0);
140 printk(KERN_INFO "l2cr set to %lx\n", val);
141 _set_L2CR(0); /* force invalidate by disable cache */
142 _set_L2CR(val); /* and enable it */
146 __setup("l2cr=", ppc_setup_l2cr);
148 /* Checks "l3cr=xxxx" command-line option */
149 int __init ppc_setup_l3cr(char *str)
151 if (cpu_has_feature(CPU_FTR_L3CR)) {
152 unsigned long val = simple_strtoul(str, NULL, 0);
153 printk(KERN_INFO "l3cr set to %lx\n", val);
154 _set_L3CR(val); /* and enable it */
158 __setup("l3cr=", ppc_setup_l3cr);
160 #ifdef CONFIG_GENERIC_NVRAM
162 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
163 unsigned char nvram_read_byte(int addr)
165 if (ppc_md.nvram_read_val)
166 return ppc_md.nvram_read_val(addr);
169 EXPORT_SYMBOL(nvram_read_byte);
171 void nvram_write_byte(unsigned char val, int addr)
173 if (ppc_md.nvram_write_val)
174 ppc_md.nvram_write_val(addr, val);
176 EXPORT_SYMBOL(nvram_write_byte);
178 ssize_t nvram_get_size(void)
180 if (ppc_md.nvram_size)
181 return ppc_md.nvram_size();
184 EXPORT_SYMBOL(nvram_get_size);
186 void nvram_sync(void)
188 if (ppc_md.nvram_sync)
191 EXPORT_SYMBOL(nvram_sync);
193 #endif /* CONFIG_NVRAM */
195 int __init ppc_init(void)
197 /* clear the progress line */
199 ppc_md.progress(" ", 0xffff);
201 /* call platform init */
202 if (ppc_md.init != NULL) {
208 arch_initcall(ppc_init);
210 static void __init irqstack_early_init(void)
214 /* interrupt stacks must be in lowmem, we get that for free on ppc32
215 * as the memblock is limited to lowmem by default */
216 for_each_possible_cpu(i) {
217 softirq_ctx[i] = (struct thread_info *)
218 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
219 hardirq_ctx[i] = (struct thread_info *)
220 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
224 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
225 static void __init exc_lvl_early_init(void)
227 unsigned int i, hw_cpu;
229 /* interrupt stacks must be in lowmem, we get that for free on ppc32
230 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
231 for_each_possible_cpu(i) {
233 hw_cpu = get_hard_smp_processor_id(i);
238 critirq_ctx[hw_cpu] = (struct thread_info *)
239 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
241 dbgirq_ctx[hw_cpu] = (struct thread_info *)
242 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
243 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
244 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
249 #define exc_lvl_early_init()
252 /* Warning, IO base is not yet inited */
253 void __init setup_arch(char **cmdline_p)
255 *cmdline_p = boot_command_line;
257 /* so udelay does something sensible, assume <= 1000 bogomips */
258 loops_per_jiffy = 500000000 / HZ;
260 unflatten_device_tree();
263 if (ppc_md.init_early)
266 find_legacy_serial_ports();
268 smp_setup_cpu_maps();
270 /* Register early console */
271 register_early_udbg_console();
276 * Set cache line size based on type of cpu as a default.
277 * Systems with OF can look in the properties on the cpu node(s)
278 * for a possibly more accurate value.
280 dcache_bsize = cur_cpu_spec->dcache_bsize;
281 icache_bsize = cur_cpu_spec->icache_bsize;
283 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
284 ucache_bsize = icache_bsize = dcache_bsize;
289 init_mm.start_code = (unsigned long)_stext;
290 init_mm.end_code = (unsigned long) _etext;
291 init_mm.end_data = (unsigned long) _edata;
292 init_mm.brk = klimit;
294 exc_lvl_early_init();
296 irqstack_early_init();
299 if ( ppc_md.progress ) ppc_md.progress("setup_arch: initmem", 0x3eab);
301 #ifdef CONFIG_DUMMY_CONSOLE
302 conswitchp = &dummy_con;
305 if (ppc_md.setup_arch)
307 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
311 /* Initialize the MMU context management stuff */