arch/powerpc/kvm/booke.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License, version 2, as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  14  *
  15  * Copyright IBM Corp. 2007
  16  * Copyright 2010-2011 Freescale Semiconductor, Inc.
  17  *
  18  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  19  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  20  *          Scott Wood <scottwood@freescale.com>
  21  *          Varun Sethi <varun.sethi@freescale.com>
  22  */
  23
  24 #include <linux/errno.h>
  25 #include <linux/err.h>
  26 #include <linux/kvm_host.h>
  27 #include <linux/gfp.h>
  28 #include <linux/module.h>
  29 #include <linux/vmalloc.h>
  30 #include <linux/fs.h>
  31
  32 #include <asm/cputable.h>
  33 #include <asm/uaccess.h>
  34 #include <asm/kvm_ppc.h>
  35 #include <asm/cacheflush.h>
  36 #include <asm/dbell.h>
  37 #include <asm/hw_irq.h>
  38 #include <asm/irq.h>
  39 #include <asm/time.h>
  40
  41 #include "timing.h"
  42 #include "booke.h"
  43
  44 #define CREATE_TRACE_POINTS
  45 #include "trace_booke.h"
  46
  47 unsigned long kvmppc_booke_handlers;
  48
  49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  51
  52 struct kvm_stats_debugfs_item debugfs_entries[] = {
  53         { "mmio",       VCPU_STAT(mmio_exits) },
  54         { "dcr",        VCPU_STAT(dcr_exits) },
  55         { "sig",        VCPU_STAT(signal_exits) },
  56         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
  57         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
  58         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
  59         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
  60         { "sysc",       VCPU_STAT(syscall_exits) },
  61         { "isi",        VCPU_STAT(isi_exits) },
  62         { "dsi",        VCPU_STAT(dsi_exits) },
  63         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
  64         { "dec",        VCPU_STAT(dec_exits) },
  65         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
  66         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  67         { "doorbell", VCPU_STAT(dbell_exits) },
  68         { "guest doorbell", VCPU_STAT(gdbell_exits) },
  69         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  70         { NULL }
  71 };
  72
  73 /* TODO: use vcpu_printf() */
  74 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
  75 {
  76         int i;
  77
  78         printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
  79         printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
  80         printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
  81                                             vcpu->arch.shared->srr1);
  82
  83         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
  84
  85         for (i = 0; i < 32; i += 4) {
  86                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
  87                        kvmppc_get_gpr(vcpu, i),
  88                        kvmppc_get_gpr(vcpu, i+1),
  89                        kvmppc_get_gpr(vcpu, i+2),
  90                        kvmppc_get_gpr(vcpu, i+3));
  91         }
  92 }
  93
  94 #ifdef CONFIG_SPE
  95 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
  96 {
  97         preempt_disable();
  98         enable_kernel_spe();
  99         kvmppc_save_guest_spe(vcpu);
 100         vcpu->arch.shadow_msr &= ~MSR_SPE;
 101         preempt_enable();
 102 }
 103
 104 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
 105 {
 106         preempt_disable();
 107         enable_kernel_spe();
 108         kvmppc_load_guest_spe(vcpu);
 109         vcpu->arch.shadow_msr |= MSR_SPE;
 110         preempt_enable();
 111 }
 112
 113 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
 114 {
 115         if (vcpu->arch.shared->msr & MSR_SPE) {
 116                 if (!(vcpu->arch.shadow_msr & MSR_SPE))
 117                         kvmppc_vcpu_enable_spe(vcpu);
 118         } else if (vcpu->arch.shadow_msr & MSR_SPE) {
 119                 kvmppc_vcpu_disable_spe(vcpu);
 120         }
 121 }
 122 #else
 123 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
 124 {
 125 }
 126 #endif
 127
 128 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
 129 {
 130 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
 131         /* We always treat the FP bit as enabled from the host
 132            perspective, so only need to adjust the shadow MSR */
 133         vcpu->arch.shadow_msr &= ~MSR_FP;
 134         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
 135 #endif
 136 }
 137
 138 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
 139 {
 140         /* Synchronize guest's desire to get debug interrupts into shadow MSR */
 141 #ifndef CONFIG_KVM_BOOKE_HV
 142         vcpu->arch.shadow_msr &= ~MSR_DE;
 143         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
 144 #endif
 145
 146         /* Force enable debug interrupts when user space wants to debug */
 147         if (vcpu->guest_debug) {
 148 #ifdef CONFIG_KVM_BOOKE_HV
 149                 /*
 150                  * Since there is no shadow MSR, sync MSR_DE into the guest
 151                  * visible MSR.
 152                  */
 153                 vcpu->arch.shared->msr |= MSR_DE;
 154 #else
 155                 vcpu->arch.shadow_msr |= MSR_DE;
 156                 vcpu->arch.shared->msr &= ~MSR_DE;
 157 #endif
 158         }
 159 }
 160
 161 /*
 162  * Helper function for "full" MSR writes.  No need to call this if only
 163  * EE/CE/ME/DE/RI are changing.
 164  */
 165 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
 166 {
 167         u32 old_msr = vcpu->arch.shared->msr;
 168
 169 #ifdef CONFIG_KVM_BOOKE_HV
 170         new_msr |= MSR_GS;
 171 #endif
 172
 173         vcpu->arch.shared->msr = new_msr;
 174
 175         kvmppc_mmu_msr_notify(vcpu, old_msr);
 176         kvmppc_vcpu_sync_spe(vcpu);
 177         kvmppc_vcpu_sync_fpu(vcpu);
 178         kvmppc_vcpu_sync_debug(vcpu);
 179 }
 180
 181 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
 182                                        unsigned int priority)
 183 {
 184         trace_kvm_booke_queue_irqprio(vcpu, priority);
 185         set_bit(priority, &vcpu->arch.pending_exceptions);
 186 }
 187
 188 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
 189                                         ulong dear_flags, ulong esr_flags)
 190 {
 191         vcpu->arch.queued_dear = dear_flags;
 192         vcpu->arch.queued_esr = esr_flags;
 193         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
 194 }
 195
 196 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
 197                                            ulong dear_flags, ulong esr_flags)
 198 {
 199         vcpu->arch.queued_dear = dear_flags;
 200         vcpu->arch.queued_esr = esr_flags;
 201         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
 202 }
 203
 204 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
 205                                            ulong esr_flags)
 206 {
 207         vcpu->arch.queued_esr = esr_flags;
 208         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
 209 }
 210
 211 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
 212                                         ulong esr_flags)
 213 {
 214         vcpu->arch.queued_dear = dear_flags;
 215         vcpu->arch.queued_esr = esr_flags;
 216         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
 217 }
 218
 219 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
 220 {
 221         vcpu->arch.queued_esr = esr_flags;
 222         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
 223 }
 224
 225 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
 226 {
 227         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
 228 }
 229
 230 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
 231 {
 232         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
 233 }
 234
 235 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
 236 {
 237         clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
 238 }
 239
 240 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
 241                                 struct kvm_interrupt *irq)
 242 {
 243         unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
 244
 245         if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
 246                 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
 247
 248         kvmppc_booke_queue_irqprio(vcpu, prio);
 249 }
 250
 251 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
 252 {
 253         clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
 254         clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
 255 }
 256
 257 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
 258 {
 259         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
 260 }
 261
 262 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
 263 {
 264         clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
 265 }
 266
 267 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 268 {
 269 #ifdef CONFIG_KVM_BOOKE_HV
 270         mtspr(SPRN_GSRR0, srr0);
 271         mtspr(SPRN_GSRR1, srr1);
 272 #else
 273         vcpu->arch.shared->srr0 = srr0;
 274         vcpu->arch.shared->srr1 = srr1;
 275 #endif
 276 }
 277
 278 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 279 {
 280         vcpu->arch.csrr0 = srr0;
 281         vcpu->arch.csrr1 = srr1;
 282 }
 283
 284 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 285 {
 286         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
 287                 vcpu->arch.dsrr0 = srr0;
 288                 vcpu->arch.dsrr1 = srr1;
 289         } else {
 290                 set_guest_csrr(vcpu, srr0, srr1);
 291         }
 292 }
 293
 294 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 295 {
 296         vcpu->arch.mcsrr0 = srr0;
 297         vcpu->arch.mcsrr1 = srr1;
 298 }
 299
 300 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
 301 {
 302 #ifdef CONFIG_KVM_BOOKE_HV
 303         return mfspr(SPRN_GDEAR);
 304 #else
 305         return vcpu->arch.shared->dar;
 306 #endif
 307 }
 308
 309 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
 310 {
 311 #ifdef CONFIG_KVM_BOOKE_HV
 312         mtspr(SPRN_GDEAR, dear);
 313 #else
 314         vcpu->arch.shared->dar = dear;
 315 #endif
 316 }
 317
 318 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
 319 {
 320 #ifdef CONFIG_KVM_BOOKE_HV
 321         return mfspr(SPRN_GESR);
 322 #else
 323         return vcpu->arch.shared->esr;
 324 #endif
 325 }
 326
 327 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
 328 {
 329 #ifdef CONFIG_KVM_BOOKE_HV
 330         mtspr(SPRN_GESR, esr);
 331 #else
 332         vcpu->arch.shared->esr = esr;
 333 #endif
 334 }
 335
 336 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
 337 {
 338 #ifdef CONFIG_KVM_BOOKE_HV
 339         return mfspr(SPRN_GEPR);
 340 #else
 341         return vcpu->arch.epr;
 342 #endif
 343 }
 344
 345 /* Deliver the interrupt of the corresponding priority, if possible. */
 346 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
 347                                         unsigned int priority)
 348 {
 349         int allowed = 0;
 350         ulong msr_mask = 0;
 351         bool update_esr = false, update_dear = false, update_epr = false;
 352         ulong crit_raw = vcpu->arch.shared->critical;
 353         ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
 354         bool crit;
 355         bool keep_irq = false;
 356         enum int_class int_class;
 357         ulong new_msr = vcpu->arch.shared->msr;
 358
 359         /* Truncate crit indicators in 32 bit mode */
 360         if (!(vcpu->arch.shared->msr & MSR_SF)) {
 361                 crit_raw &= 0xffffffff;
 362                 crit_r1 &= 0xffffffff;
 363         }
 364
 365         /* Critical section when crit == r1 */
 366         crit = (crit_raw == crit_r1);
 367         /* ... and we're in supervisor mode */
 368         crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
 369
 370         if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
 371                 priority = BOOKE_IRQPRIO_EXTERNAL;
 372                 keep_irq = true;
 373         }
 374
 375         if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
 376                 update_epr = true;
 377
 378         switch (priority) {
 379         case BOOKE_IRQPRIO_DTLB_MISS:
 380         case BOOKE_IRQPRIO_DATA_STORAGE:
 381         case BOOKE_IRQPRIO_ALIGNMENT:
 382                 update_dear = true;
 383                 /* fall through */
 384         case BOOKE_IRQPRIO_INST_STORAGE:
 385         case BOOKE_IRQPRIO_PROGRAM:
 386                 update_esr = true;
 387                 /* fall through */
 388         case BOOKE_IRQPRIO_ITLB_MISS:
 389         case BOOKE_IRQPRIO_SYSCALL:
 390         case BOOKE_IRQPRIO_FP_UNAVAIL:
 391         case BOOKE_IRQPRIO_SPE_UNAVAIL:
 392         case BOOKE_IRQPRIO_SPE_FP_DATA:
 393         case BOOKE_IRQPRIO_SPE_FP_ROUND:
 394         case BOOKE_IRQPRIO_AP_UNAVAIL:
 395                 allowed = 1;
 396                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
 397                 int_class = INT_CLASS_NONCRIT;
 398                 break;
 399         case BOOKE_IRQPRIO_WATCHDOG:
 400         case BOOKE_IRQPRIO_CRITICAL:
 401         case BOOKE_IRQPRIO_DBELL_CRIT:
 402                 allowed = vcpu->arch.shared->msr & MSR_CE;
 403                 allowed = allowed && !crit;
 404                 msr_mask = MSR_ME;
 405                 int_class = INT_CLASS_CRIT;
 406                 break;
 407         case BOOKE_IRQPRIO_MACHINE_CHECK:
 408                 allowed = vcpu->arch.shared->msr & MSR_ME;
 409                 allowed = allowed && !crit;
 410                 int_class = INT_CLASS_MC;
 411                 break;
 412         case BOOKE_IRQPRIO_DECREMENTER:
 413         case BOOKE_IRQPRIO_FIT:
 414                 keep_irq = true;
 415                 /* fall through */
 416         case BOOKE_IRQPRIO_EXTERNAL:
 417         case BOOKE_IRQPRIO_DBELL:
 418                 allowed = vcpu->arch.shared->msr & MSR_EE;
 419                 allowed = allowed && !crit;
 420                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
 421                 int_class = INT_CLASS_NONCRIT;
 422                 break;
 423         case BOOKE_IRQPRIO_DEBUG:
 424                 allowed = vcpu->arch.shared->msr & MSR_DE;
 425                 allowed = allowed && !crit;
 426                 msr_mask = MSR_ME;
 427                 int_class = INT_CLASS_CRIT;
 428                 break;
 429         }
 430
 431         if (allowed) {
 432                 switch (int_class) {
 433                 case INT_CLASS_NONCRIT:
 434                         set_guest_srr(vcpu, vcpu->arch.pc,
 435                                       vcpu->arch.shared->msr);
 436                         break;
 437                 case INT_CLASS_CRIT:
 438                         set_guest_csrr(vcpu, vcpu->arch.pc,
 439                                        vcpu->arch.shared->msr);
 440                         break;
 441                 case INT_CLASS_DBG:
 442                         set_guest_dsrr(vcpu, vcpu->arch.pc,
 443                                        vcpu->arch.shared->msr);
 444                         break;
 445                 case INT_CLASS_MC:
 446                         set_guest_mcsrr(vcpu, vcpu->arch.pc,
 447                                         vcpu->arch.shared->msr);
 448                         break;
 449                 }
 450
 451                 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
 452                 if (update_esr == true)
 453                         set_guest_esr(vcpu, vcpu->arch.queued_esr);
 454                 if (update_dear == true)
 455                         set_guest_dear(vcpu, vcpu->arch.queued_dear);
 456                 if (update_epr == true) {
 457                         if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
 458                                 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
 459                         else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
 460                                 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
 461                                 kvmppc_mpic_set_epr(vcpu);
 462                         }
 463                 }
 464
 465                 new_msr &= msr_mask;
 466 #if defined(CONFIG_64BIT)
 467                 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
 468                         new_msr |= MSR_CM;
 469 #endif
 470                 kvmppc_set_msr(vcpu, new_msr);
 471
 472                 if (!keep_irq)
 473                         clear_bit(priority, &vcpu->arch.pending_exceptions);
 474         }
 475
 476 #ifdef CONFIG_KVM_BOOKE_HV
 477         /*
 478          * If an interrupt is pending but masked, raise a guest doorbell
 479          * so that we are notified when the guest enables the relevant
 480          * MSR bit.
 481          */
 482         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
 483                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
 484         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
 485                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
 486         if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
 487                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
 488 #endif
 489
 490         return allowed;
 491 }
 492
 493 /*
 494  * Return the number of jiffies until the next timeout.  If the timeout is
 495  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
 496  * because the larger value can break the timer APIs.
 497  */
 498 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
 499 {
 500         u64 tb, wdt_tb, wdt_ticks = 0;
 501         u64 nr_jiffies = 0;
 502         u32 period = TCR_GET_WP(vcpu->arch.tcr);
 503
 504         wdt_tb = 1ULL << (63 - period);
 505         tb = get_tb();
 506         /*
 507          * The watchdog timeout will hapeen when TB bit corresponding
 508          * to watchdog will toggle from 0 to 1.
 509          */
 510         if (tb & wdt_tb)
 511                 wdt_ticks = wdt_tb;
 512
 513         wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
 514
 515         /* Convert timebase ticks to jiffies */
 516         nr_jiffies = wdt_ticks;
 517
 518         if (do_div(nr_jiffies, tb_ticks_per_jiffy))
 519                 nr_jiffies++;
 520
 521         return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
 522 }
 523
 524 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
 525 {
 526         unsigned long nr_jiffies;
 527         unsigned long flags;
 528
 529         /*
 530          * If TSR_ENW and TSR_WIS are not set then no need to exit to
 531          * userspace, so clear the KVM_REQ_WATCHDOG request.
 532          */
 533         if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
 534                 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
 535
 536         spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
 537         nr_jiffies = watchdog_next_timeout(vcpu);
 538         /*
 539          * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
 540          * then do not run the watchdog timer as this can break timer APIs.
 541          */
 542         if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
 543                 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
 544         else
 545                 del_timer(&vcpu->arch.wdt_timer);
 546         spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
 547 }
 548
 549 void kvmppc_watchdog_func(unsigned long data)
 550 {
 551         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
 552         u32 tsr, new_tsr;
 553         int final;
 554
 555         do {
 556                 new_tsr = tsr = vcpu->arch.tsr;
 557                 final = 0;
 558
 559                 /* Time out event */
 560                 if (tsr & TSR_ENW) {
 561                         if (tsr & TSR_WIS)
 562                                 final = 1;
 563                         else
 564                                 new_tsr = tsr | TSR_WIS;
 565                 } else {
 566                         new_tsr = tsr | TSR_ENW;
 567                 }
 568         } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
 569
 570         if (new_tsr & TSR_WIS) {
 571                 smp_wmb();
 572                 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
 573                 kvm_vcpu_kick(vcpu);
 574         }
 575
 576         /*
 577          * If this is final watchdog expiry and some action is required
 578          * then exit to userspace.
 579          */
 580         if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
 581             vcpu->arch.watchdog_enabled) {
 582                 smp_wmb();
 583                 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
 584                 kvm_vcpu_kick(vcpu);
 585         }
 586
 587         /*
 588          * Stop running the watchdog timer after final expiration to
 589          * prevent the host from being flooded with timers if the
 590          * guest sets a short period.
 591          * Timers will resume when TSR/TCR is updated next time.
 592          */
 593         if (!final)
 594                 arm_next_watchdog(vcpu);
 595 }
 596
 597 static void update_timer_ints(struct kvm_vcpu *vcpu)
 598 {
 599         if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
 600                 kvmppc_core_queue_dec(vcpu);
 601         else
 602                 kvmppc_core_dequeue_dec(vcpu);
 603
 604         if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
 605                 kvmppc_core_queue_watchdog(vcpu);
 606         else
 607                 kvmppc_core_dequeue_watchdog(vcpu);
 608 }
 609
 610 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
 611 {
 612         unsigned long *pending = &vcpu->arch.pending_exceptions;
 613         unsigned int priority;
 614
 615         priority = __ffs(*pending);
 616         while (priority < BOOKE_IRQPRIO_MAX) {
 617                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
 618                         break;
 619
 620                 priority = find_next_bit(pending,
 621                                          BITS_PER_BYTE * sizeof(*pending),
 622                                          priority + 1);
 623         }
 624
 625         /* Tell the guest about our interrupt status */
 626         vcpu->arch.shared->int_pending = !!*pending;
 627 }
 628
 629 /* Check pending exceptions and deliver one, if possible. */
 630 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
 631 {
 632         int r = 0;
 633         WARN_ON_ONCE(!irqs_disabled());
 634
 635         kvmppc_core_check_exceptions(vcpu);
 636
 637         if (vcpu->requests) {
 638                 /* Exception delivery raised request; start over */
 639                 return 1;
 640         }
 641
 642         if (vcpu->arch.shared->msr & MSR_WE) {
 643                 local_irq_enable();
 644                 kvm_vcpu_block(vcpu);
 645                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
 646                 local_irq_disable();
 647
 648                 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
 649                 r = 1;
 650         };
 651
 652         return r;
 653 }
 654
 655 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
 656 {
 657         int r = 1; /* Indicate we want to get back into the guest */
 658
 659         if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
 660                 update_timer_ints(vcpu);
 661 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
 662         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
 663                 kvmppc_core_flush_tlb(vcpu);
 664 #endif
 665
 666         if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
 667                 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
 668                 r = 0;
 669         }
 670
 671         if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
 672                 vcpu->run->epr.epr = 0;
 673                 vcpu->arch.epr_needed = true;
 674                 vcpu->run->exit_reason = KVM_EXIT_EPR;
 675                 r = 0;
 676         }
 677
 678         return r;
 679 }
 680
 681 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 682 {
 683         int ret, s;
 684         struct thread_struct thread;
 685 #ifdef CONFIG_PPC_FPU
 686         unsigned int fpscr;
 687         int fpexc_mode;
 688         u64 fpr[32];
 689 #endif
 690
 691         if (!vcpu->arch.sane) {
 692                 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
 693                 return -EINVAL;
 694         }
 695
 696         local_irq_disable();
 697         s = kvmppc_prepare_to_enter(vcpu);
 698         if (s <= 0) {
 699                 local_irq_enable();
 700                 ret = s;
 701                 goto out;
 702         }
 703
 704 #ifdef CONFIG_PPC_FPU
 705         /* Save userspace FPU state in stack */
 706         enable_kernel_fp();
 707         memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
 708         fpscr = current->thread.fpscr.val;
 709         fpexc_mode = current->thread.fpexc_mode;
 710
 711         /* Restore guest FPU state to thread */
 712         memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
 713         current->thread.fpscr.val = vcpu->arch.fpscr;
 714
 715         /*
 716          * Since we can't trap on MSR_FP in GS-mode, we consider the guest
 717          * as always using the FPU.  Kernel usage of FP (via
 718          * enable_kernel_fp()) in this thread must not occur while
 719          * vcpu->fpu_active is set.
 720          */
 721         vcpu->fpu_active = 1;
 722
 723         kvmppc_load_guest_fp(vcpu);
 724 #endif
 725
 726         /* Switch to guest debug context */
 727         thread.debug = vcpu->arch.shadow_dbg_reg;
 728         switch_booke_debug_regs(&thread);
 729         thread.debug = current->thread.debug;
 730         current->thread.debug = vcpu->arch.shadow_dbg_reg;
 731
 732         kvmppc_fix_ee_before_entry();
 733
 734         ret = __kvmppc_vcpu_run(kvm_run, vcpu);
 735
 736         /* No need for kvm_guest_exit. It's done in handle_exit.
 737            We also get here with interrupts enabled. */
 738
 739         /* Switch back to user space debug context */
 740         switch_booke_debug_regs(&thread);
 741         current->thread.debug = thread.debug;
 742
 743 #ifdef CONFIG_PPC_FPU
 744         kvmppc_save_guest_fp(vcpu);
 745
 746         vcpu->fpu_active = 0;
 747
 748         /* Save guest FPU state from thread */
 749         memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
 750         vcpu->arch.fpscr = current->thread.fpscr.val;
 751
 752         /* Restore userspace FPU state from stack */
 753         memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
 754         current->thread.fpscr.val = fpscr;
 755         current->thread.fpexc_mode = fpexc_mode;
 756 #endif
 757
 758 out:
 759         vcpu->mode = OUTSIDE_GUEST_MODE;
 760         return ret;
 761 }
 762
 763 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
 764 {
 765         enum emulation_result er;
 766
 767         er = kvmppc_emulate_instruction(run, vcpu);
 768         switch (er) {
 769         case EMULATE_DONE:
 770                 /* don't overwrite subtypes, just account kvm_stats */
 771                 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
 772                 /* Future optimization: only reload non-volatiles if
 773                  * they were actually modified by emulation. */
 774                 return RESUME_GUEST_NV;
 775
 776         case EMULATE_DO_DCR:
 777                 run->exit_reason = KVM_EXIT_DCR;
 778                 return RESUME_HOST;
 779
 780         case EMULATE_FAIL:
 781                 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
 782                        __func__, vcpu->arch.pc, vcpu->arch.last_inst);
 783                 /* For debugging, encode the failing instruction and
 784                  * report it to userspace. */
 785                 run->hw.hardware_exit_reason = ~0ULL << 32;
 786                 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
 787                 kvmppc_core_queue_program(vcpu, ESR_PIL);
 788                 return RESUME_HOST;
 789
 790         case EMULATE_EXIT_USER:
 791                 return RESUME_HOST;
 792
 793         default:
 794                 BUG();
 795         }
 796 }
 797
 798 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
 799 {
 800         struct debug_reg *dbg_reg = &(vcpu->arch.shadow_dbg_reg);
 801         u32 dbsr = vcpu->arch.dbsr;
 802
 803         run->debug.arch.status = 0;
 804         run->debug.arch.address = vcpu->arch.pc;
 805
 806         if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
 807                 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
 808         } else {
 809                 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
 810                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
 811                 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
 812                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
 813                 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
 814                         run->debug.arch.address = dbg_reg->dac1;
 815                 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
 816                         run->debug.arch.address = dbg_reg->dac2;
 817         }
 818
 819         return RESUME_HOST;
 820 }
 821
 822 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
 823 {
 824         ulong r1, ip, msr, lr;
 825
 826         asm("mr %0, 1" : "=r"(r1));
 827         asm("mflr %0" : "=r"(lr));
 828         asm("mfmsr %0" : "=r"(msr));
 829         asm("bl 1f; 1: mflr %0" : "=r"(ip));
 830
 831         memset(regs, 0, sizeof(*regs));
 832         regs->gpr[1] = r1;
 833         regs->nip = ip;
 834         regs->msr = msr;
 835         regs->link = lr;
 836 }
 837
 838 /*
 839  * For interrupts needed to be handled by host interrupt handlers,
 840  * corresponding host handler are called from here in similar way
 841  * (but not exact) as they are called from low level handler
 842  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
 843  */
 844 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
 845                                      unsigned int exit_nr)
 846 {
 847         struct pt_regs regs;
 848
 849         switch (exit_nr) {
 850         case BOOKE_INTERRUPT_EXTERNAL:
 851                 kvmppc_fill_pt_regs(&regs);
 852                 do_IRQ(&regs);
 853                 break;
 854         case BOOKE_INTERRUPT_DECREMENTER:
 855                 kvmppc_fill_pt_regs(&regs);
 856                 timer_interrupt(&regs);
 857                 break;
 858 #if defined(CONFIG_PPC_DOORBELL)
 859         case BOOKE_INTERRUPT_DOORBELL:
 860                 kvmppc_fill_pt_regs(&regs);
 861                 doorbell_exception(&regs);
 862                 break;
 863 #endif
 864         case BOOKE_INTERRUPT_MACHINE_CHECK:
 865                 /* FIXME */
 866                 break;
 867         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
 868                 kvmppc_fill_pt_regs(&regs);
 869                 performance_monitor_exception(&regs);
 870                 break;
 871         case BOOKE_INTERRUPT_WATCHDOG:
 872                 kvmppc_fill_pt_regs(&regs);
 873 #ifdef CONFIG_BOOKE_WDT
 874                 WatchdogException(&regs);
 875 #else
 876                 unknown_exception(&regs);
 877 #endif
 878                 break;
 879         case BOOKE_INTERRUPT_CRITICAL:
 880                 unknown_exception(&regs);
 881                 break;
 882         case BOOKE_INTERRUPT_DEBUG:
 883                 /* Save DBSR before preemption is enabled */
 884                 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
 885                 kvmppc_clear_dbsr();
 886                 break;
 887         }
 888 }
 889
 890 /**
 891  * kvmppc_handle_exit
 892  *
 893  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
 894  */
 895 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 896                        unsigned int exit_nr)
 897 {
 898         int r = RESUME_HOST;
 899         int s;
 900         int idx;
 901
 902 #ifdef CONFIG_PPC64
 903         WARN_ON(local_paca->irq_happened != 0);
 904 #endif
 905
 906         /*
 907          * We enter with interrupts disabled in hardware, but
 908          * we need to call hard_irq_disable anyway to ensure that
 909          * the software state is kept in sync.
 910          */
 911         hard_irq_disable();
 912
 913         /* update before a new last_exit_type is rewritten */
 914         kvmppc_update_timing_stats(vcpu);
 915
 916         /* restart interrupts if they were meant for the host */
 917         kvmppc_restart_interrupt(vcpu, exit_nr);
 918
 919         local_irq_enable();
 920
 921         trace_kvm_exit(exit_nr, vcpu);
 922         kvm_guest_exit();
 923
 924         run->exit_reason = KVM_EXIT_UNKNOWN;
 925         run->ready_for_interrupt_injection = 1;
 926
 927         switch (exit_nr) {
 928         case BOOKE_INTERRUPT_MACHINE_CHECK:
 929                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
 930                 kvmppc_dump_vcpu(vcpu);
 931                 /* For debugging, send invalid exit reason to user space */
 932                 run->hw.hardware_exit_reason = ~1ULL << 32;
 933                 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
 934                 r = RESUME_HOST;
 935                 break;
 936
 937         case BOOKE_INTERRUPT_EXTERNAL:
 938                 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
 939                 r = RESUME_GUEST;
 940                 break;
 941
 942         case BOOKE_INTERRUPT_DECREMENTER:
 943                 kvmppc_account_exit(vcpu, DEC_EXITS);
 944                 r = RESUME_GUEST;
 945                 break;
 946
 947         case BOOKE_INTERRUPT_WATCHDOG:
 948                 r = RESUME_GUEST;
 949                 break;
 950
 951         case BOOKE_INTERRUPT_DOORBELL:
 952                 kvmppc_account_exit(vcpu, DBELL_EXITS);
 953                 r = RESUME_GUEST;
 954                 break;
 955
 956         case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
 957                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
 958
 959                 /*
 960                  * We are here because there is a pending guest interrupt
 961                  * which could not be delivered as MSR_CE or MSR_ME was not
 962                  * set.  Once we break from here we will retry delivery.
 963                  */
 964                 r = RESUME_GUEST;
 965                 break;
 966
 967         case BOOKE_INTERRUPT_GUEST_DBELL:
 968                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
 969
 970                 /*
 971                  * We are here because there is a pending guest interrupt
 972                  * which could not be delivered as MSR_EE was not set.  Once
 973                  * we break from here we will retry delivery.
 974                  */
 975                 r = RESUME_GUEST;
 976                 break;
 977
 978         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
 979                 r = RESUME_GUEST;
 980                 break;
 981
 982         case BOOKE_INTERRUPT_HV_PRIV:
 983                 r = emulation_exit(run, vcpu);
 984                 break;
 985
 986         case BOOKE_INTERRUPT_PROGRAM:
 987                 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
 988                         /*
 989                          * Program traps generated by user-level software must
 990                          * be handled by the guest kernel.
 991                          *
 992                          * In GS mode, hypervisor privileged instructions trap
 993                          * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
 994                          * actual program interrupts, handled by the guest.
 995                          */
 996                         kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
 997                         r = RESUME_GUEST;
 998                         kvmppc_account_exit(vcpu, USR_PR_INST);
 999                         break;
1000                 }
1001
1002                 r = emulation_exit(run, vcpu);
1003                 break;
1004
1005         case BOOKE_INTERRUPT_FP_UNAVAIL:
1006                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1007                 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1008                 r = RESUME_GUEST;
1009                 break;
1010
1011 #ifdef CONFIG_SPE
1012         case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1013                 if (vcpu->arch.shared->msr & MSR_SPE)
1014                         kvmppc_vcpu_enable_spe(vcpu);
1015                 else
1016                         kvmppc_booke_queue_irqprio(vcpu,
1017                                                    BOOKE_IRQPRIO_SPE_UNAVAIL);
1018                 r = RESUME_GUEST;
1019                 break;
1020         }
1021
1022         case BOOKE_INTERRUPT_SPE_FP_DATA:
1023                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1024                 r = RESUME_GUEST;
1025                 break;
1026
1027         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1028                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1029                 r = RESUME_GUEST;
1030                 break;
1031 #else
1032         case BOOKE_INTERRUPT_SPE_UNAVAIL:
1033                 /*
1034                  * Guest wants SPE, but host kernel doesn't support it.  Send
1035                  * an "unimplemented operation" program check to the guest.
1036                  */
1037                 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1038                 r = RESUME_GUEST;
1039                 break;
1040
1041         /*
1042          * These really should never happen without CONFIG_SPE,
1043          * as we should never enable the real MSR[SPE] in the guest.
1044          */
1045         case BOOKE_INTERRUPT_SPE_FP_DATA:
1046         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1047                 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1048                        __func__, exit_nr, vcpu->arch.pc);
1049                 run->hw.hardware_exit_reason = exit_nr;
1050                 r = RESUME_HOST;
1051                 break;
1052 #endif
1053
1054         case BOOKE_INTERRUPT_DATA_STORAGE:
1055                 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1056                                                vcpu->arch.fault_esr);
1057                 kvmppc_account_exit(vcpu, DSI_EXITS);
1058                 r = RESUME_GUEST;
1059                 break;
1060
1061         case BOOKE_INTERRUPT_INST_STORAGE:
1062                 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1063                 kvmppc_account_exit(vcpu, ISI_EXITS);
1064                 r = RESUME_GUEST;
1065                 break;
1066
1067         case BOOKE_INTERRUPT_ALIGNMENT:
1068                 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1069                                             vcpu->arch.fault_esr);
1070                 r = RESUME_GUEST;
1071                 break;
1072
1073 #ifdef CONFIG_KVM_BOOKE_HV
1074         case BOOKE_INTERRUPT_HV_SYSCALL:
1075                 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1076                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1077                 } else {
1078                         /*
1079                          * hcall from guest userspace -- send privileged
1080                          * instruction program check.
1081                          */
1082                         kvmppc_core_queue_program(vcpu, ESR_PPR);
1083                 }
1084
1085                 r = RESUME_GUEST;
1086                 break;
1087 #else
1088         case BOOKE_INTERRUPT_SYSCALL:
1089                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1090                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1091                         /* KVM PV hypercalls */
1092                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1093                         r = RESUME_GUEST;
1094                 } else {
1095                         /* Guest syscalls */
1096                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1097                 }
1098                 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1099                 r = RESUME_GUEST;
1100                 break;
1101 #endif
1102
1103         case BOOKE_INTERRUPT_DTLB_MISS: {
1104                 unsigned long eaddr = vcpu->arch.fault_dear;
1105                 int gtlb_index;
1106                 gpa_t gpaddr;
1107                 gfn_t gfn;
1108
1109 #ifdef CONFIG_KVM_E500V2
1110                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1111                     (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1112                         kvmppc_map_magic(vcpu);
1113                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1114                         r = RESUME_GUEST;
1115
1116                         break;
1117                 }
1118 #endif
1119
1120                 /* Check the guest TLB. */
1121                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1122                 if (gtlb_index < 0) {
1123                         /* The guest didn't have a mapping for it. */
1124                         kvmppc_core_queue_dtlb_miss(vcpu,
1125                                                     vcpu->arch.fault_dear,
1126                                                     vcpu->arch.fault_esr);
1127                         kvmppc_mmu_dtlb_miss(vcpu);
1128                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1129                         r = RESUME_GUEST;
1130                         break;
1131                 }
1132
1133                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1134
1135                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1136                 gfn = gpaddr >> PAGE_SHIFT;
1137
1138                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1139                         /* The guest TLB had a mapping, but the shadow TLB
1140                          * didn't, and it is RAM. This could be because:
1141                          * a) the entry is mapping the host kernel, or
1142                          * b) the guest used a large mapping which we're faking
1143                          * Either way, we need to satisfy the fault without
1144                          * invoking the guest. */
1145                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1146                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1147                         r = RESUME_GUEST;
1148                 } else {
1149                         /* Guest has mapped and accessed a page which is not
1150                          * actually RAM. */
1151                         vcpu->arch.paddr_accessed = gpaddr;
1152                         vcpu->arch.vaddr_accessed = eaddr;
1153                         r = kvmppc_emulate_mmio(run, vcpu);
1154                         kvmppc_account_exit(vcpu, MMIO_EXITS);
1155                 }
1156
1157                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1158                 break;
1159         }
1160
1161         case BOOKE_INTERRUPT_ITLB_MISS: {
1162                 unsigned long eaddr = vcpu->arch.pc;
1163                 gpa_t gpaddr;
1164                 gfn_t gfn;
1165                 int gtlb_index;
1166
1167                 r = RESUME_GUEST;
1168
1169                 /* Check the guest TLB. */
1170                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1171                 if (gtlb_index < 0) {
1172                         /* The guest didn't have a mapping for it. */
1173                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1174                         kvmppc_mmu_itlb_miss(vcpu);
1175                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1176                         break;
1177                 }
1178
1179                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1180
1181                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1182
1183                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1184                 gfn = gpaddr >> PAGE_SHIFT;
1185
1186                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1187                         /* The guest TLB had a mapping, but the shadow TLB
1188                          * didn't. This could be because:
1189                          * a) the entry is mapping the host kernel, or
1190                          * b) the guest used a large mapping which we're faking
1191                          * Either way, we need to satisfy the fault without
1192                          * invoking the guest. */
1193                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1194                 } else {
1195                         /* Guest mapped and leaped at non-RAM! */
1196                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1197                 }
1198
1199                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1200                 break;
1201         }
1202
1203         case BOOKE_INTERRUPT_DEBUG: {
1204                 r = kvmppc_handle_debug(run, vcpu);
1205                 if (r == RESUME_HOST)
1206                         run->exit_reason = KVM_EXIT_DEBUG;
1207                 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1208                 break;
1209         }
1210
1211         default:
1212                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1213                 BUG();
1214         }
1215
1216         /*
1217          * To avoid clobbering exit_reason, only check for signals if we
1218          * aren't already exiting to userspace for some other reason.
1219          */
1220         if (!(r & RESUME_HOST)) {
1221                 local_irq_disable();
1222                 s = kvmppc_prepare_to_enter(vcpu);
1223                 if (s <= 0) {
1224                         local_irq_enable();
1225                         r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1226                 } else {
1227                         kvmppc_fix_ee_before_entry();
1228                 }
1229         }
1230
1231         return r;
1232 }
1233
1234 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1235 {
1236         u32 old_tsr = vcpu->arch.tsr;
1237
1238         vcpu->arch.tsr = new_tsr;
1239
1240         if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1241                 arm_next_watchdog(vcpu);
1242
1243         update_timer_ints(vcpu);
1244 }
1245
1246 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1247 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1248 {
1249         int i;
1250         int r;
1251
1252         vcpu->arch.pc = 0;
1253         vcpu->arch.shared->pir = vcpu->vcpu_id;
1254         kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1255         kvmppc_set_msr(vcpu, 0);
1256
1257 #ifndef CONFIG_KVM_BOOKE_HV
1258         vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1259         vcpu->arch.shadow_pid = 1;
1260         vcpu->arch.shared->msr = 0;
1261 #endif
1262
1263         /* Eye-catching numbers so we know if the guest takes an interrupt
1264          * before it's programmed its own IVPR/IVORs. */
1265         vcpu->arch.ivpr = 0x55550000;
1266         for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1267                 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1268
1269         kvmppc_init_timing_stats(vcpu);
1270
1271         r = kvmppc_core_vcpu_setup(vcpu);
1272         kvmppc_sanity_check(vcpu);
1273         return r;
1274 }
1275
1276 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1277 {
1278         /* setup watchdog timer once */
1279         spin_lock_init(&vcpu->arch.wdt_lock);
1280         setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1281                     (unsigned long)vcpu);
1282
1283         return 0;
1284 }
1285
1286 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1287 {
1288         del_timer_sync(&vcpu->arch.wdt_timer);
1289 }
1290
1291 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1292 {
1293         int i;
1294
1295         regs->pc = vcpu->arch.pc;
1296         regs->cr = kvmppc_get_cr(vcpu);
1297         regs->ctr = vcpu->arch.ctr;
1298         regs->lr = vcpu->arch.lr;
1299         regs->xer = kvmppc_get_xer(vcpu);
1300         regs->msr = vcpu->arch.shared->msr;
1301         regs->srr0 = vcpu->arch.shared->srr0;
1302         regs->srr1 = vcpu->arch.shared->srr1;
1303         regs->pid = vcpu->arch.pid;
1304         regs->sprg0 = vcpu->arch.shared->sprg0;
1305         regs->sprg1 = vcpu->arch.shared->sprg1;
1306         regs->sprg2 = vcpu->arch.shared->sprg2;
1307         regs->sprg3 = vcpu->arch.shared->sprg3;
1308         regs->sprg4 = vcpu->arch.shared->sprg4;
1309         regs->sprg5 = vcpu->arch.shared->sprg5;
1310         regs->sprg6 = vcpu->arch.shared->sprg6;
1311         regs->sprg7 = vcpu->arch.shared->sprg7;
1312
1313         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1314                 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1315
1316         return 0;
1317 }
1318
1319 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1320 {
1321         int i;
1322
1323         vcpu->arch.pc = regs->pc;
1324         kvmppc_set_cr(vcpu, regs->cr);
1325         vcpu->arch.ctr = regs->ctr;
1326         vcpu->arch.lr = regs->lr;
1327         kvmppc_set_xer(vcpu, regs->xer);
1328         kvmppc_set_msr(vcpu, regs->msr);
1329         vcpu->arch.shared->srr0 = regs->srr0;
1330         vcpu->arch.shared->srr1 = regs->srr1;
1331         kvmppc_set_pid(vcpu, regs->pid);
1332         vcpu->arch.shared->sprg0 = regs->sprg0;
1333         vcpu->arch.shared->sprg1 = regs->sprg1;
1334         vcpu->arch.shared->sprg2 = regs->sprg2;
1335         vcpu->arch.shared->sprg3 = regs->sprg3;
1336         vcpu->arch.shared->sprg4 = regs->sprg4;
1337         vcpu->arch.shared->sprg5 = regs->sprg5;
1338         vcpu->arch.shared->sprg6 = regs->sprg6;
1339         vcpu->arch.shared->sprg7 = regs->sprg7;
1340
1341         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1342                 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1343
1344         return 0;
1345 }
1346
1347 static void get_sregs_base(struct kvm_vcpu *vcpu,
1348                            struct kvm_sregs *sregs)
1349 {
1350         u64 tb = get_tb();
1351
1352         sregs->u.e.features |= KVM_SREGS_E_BASE;
1353
1354         sregs->u.e.csrr0 = vcpu->arch.csrr0;
1355         sregs->u.e.csrr1 = vcpu->arch.csrr1;
1356         sregs->u.e.mcsr = vcpu->arch.mcsr;
1357         sregs->u.e.esr = get_guest_esr(vcpu);
1358         sregs->u.e.dear = get_guest_dear(vcpu);
1359         sregs->u.e.tsr = vcpu->arch.tsr;
1360         sregs->u.e.tcr = vcpu->arch.tcr;
1361         sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1362         sregs->u.e.tb = tb;
1363         sregs->u.e.vrsave = vcpu->arch.vrsave;
1364 }
1365
1366 static int set_sregs_base(struct kvm_vcpu *vcpu,
1367                           struct kvm_sregs *sregs)
1368 {
1369         if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1370                 return 0;
1371
1372         vcpu->arch.csrr0 = sregs->u.e.csrr0;
1373         vcpu->arch.csrr1 = sregs->u.e.csrr1;
1374         vcpu->arch.mcsr = sregs->u.e.mcsr;
1375         set_guest_esr(vcpu, sregs->u.e.esr);
1376         set_guest_dear(vcpu, sregs->u.e.dear);
1377         vcpu->arch.vrsave = sregs->u.e.vrsave;
1378         kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1379
1380         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1381                 vcpu->arch.dec = sregs->u.e.dec;
1382                 kvmppc_emulate_dec(vcpu);
1383         }
1384
1385         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1386                 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1387
1388         return 0;
1389 }
1390
1391 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1392                               struct kvm_sregs *sregs)
1393 {
1394         sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1395
1396         sregs->u.e.pir = vcpu->vcpu_id;
1397         sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1398         sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1399         sregs->u.e.decar = vcpu->arch.decar;
1400         sregs->u.e.ivpr = vcpu->arch.ivpr;
1401 }
1402
1403 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1404                              struct kvm_sregs *sregs)
1405 {
1406         if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1407                 return 0;
1408
1409         if (sregs->u.e.pir != vcpu->vcpu_id)
1410                 return -EINVAL;
1411
1412         vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1413         vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1414         vcpu->arch.decar = sregs->u.e.decar;
1415         vcpu->arch.ivpr = sregs->u.e.ivpr;
1416
1417         return 0;
1418 }
1419
1420 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1421 {
1422         sregs->u.e.features |= KVM_SREGS_E_IVOR;
1423
1424         sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1425         sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1426         sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1427         sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1428         sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1429         sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1430         sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1431         sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1432         sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1433         sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1434         sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1435         sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1436         sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1437         sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1438         sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1439         sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1440         return 0;
1441 }
1442
1443 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1444 {
1445         if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1446                 return 0;
1447
1448         vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1449         vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1450         vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1451         vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1452         vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1453         vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1454         vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1455         vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1456         vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1457         vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1458         vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1459         vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1460         vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1461         vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1462         vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1463         vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1464
1465         return 0;
1466 }
1467
1468 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1469                                   struct kvm_sregs *sregs)
1470 {
1471         sregs->pvr = vcpu->arch.pvr;
1472
1473         get_sregs_base(vcpu, sregs);
1474         get_sregs_arch206(vcpu, sregs);
1475         return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1476 }
1477
1478 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1479                                   struct kvm_sregs *sregs)
1480 {
1481         int ret;
1482
1483         if (vcpu->arch.pvr != sregs->pvr)
1484                 return -EINVAL;
1485
1486         ret = set_sregs_base(vcpu, sregs);
1487         if (ret < 0)
1488                 return ret;
1489
1490         ret = set_sregs_arch206(vcpu, sregs);
1491         if (ret < 0)
1492                 return ret;
1493
1494         return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1495 }
1496
1497 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1498 {
1499         int r = 0;
1500         union kvmppc_one_reg val;
1501         int size;
1502
1503         size = one_reg_size(reg->id);
1504         if (size > sizeof(val))
1505                 return -EINVAL;
1506
1507         switch (reg->id) {
1508         case KVM_REG_PPC_IAC1:
1509                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac1);
1510                 break;
1511         case KVM_REG_PPC_IAC2:
1512                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac2);
1513                 break;
1514 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1515         case KVM_REG_PPC_IAC3:
1516                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac3);
1517                 break;
1518         case KVM_REG_PPC_IAC4:
1519                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac4);
1520                 break;
1521 #endif
1522         case KVM_REG_PPC_DAC1:
1523                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac1);
1524                 break;
1525         case KVM_REG_PPC_DAC2:
1526                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac2);
1527                 break;
1528         case KVM_REG_PPC_EPR: {
1529                 u32 epr = get_guest_epr(vcpu);
1530                 val = get_reg_val(reg->id, epr);
1531                 break;
1532         }
1533 #if defined(CONFIG_64BIT)
1534         case KVM_REG_PPC_EPCR:
1535                 val = get_reg_val(reg->id, vcpu->arch.epcr);
1536                 break;
1537 #endif
1538         case KVM_REG_PPC_TCR:
1539                 val = get_reg_val(reg->id, vcpu->arch.tcr);
1540                 break;
1541         case KVM_REG_PPC_TSR:
1542                 val = get_reg_val(reg->id, vcpu->arch.tsr);
1543                 break;
1544         case KVM_REG_PPC_DEBUG_INST:
1545                 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV_DEBUG);
1546                 break;
1547         case KVM_REG_PPC_VRSAVE:
1548                 val = get_reg_val(reg->id, vcpu->arch.vrsave);
1549                 break;
1550         default:
1551                 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val);
1552                 break;
1553         }
1554
1555         if (r)
1556                 return r;
1557
1558         if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1559                 r = -EFAULT;
1560
1561         return r;
1562 }
1563
1564 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1565 {
1566         int r = 0;
1567         union kvmppc_one_reg val;
1568         int size;
1569
1570         size = one_reg_size(reg->id);
1571         if (size > sizeof(val))
1572                 return -EINVAL;
1573
1574         if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1575                 return -EFAULT;
1576
1577         switch (reg->id) {
1578         case KVM_REG_PPC_IAC1:
1579                 vcpu->arch.dbg_reg.iac1 = set_reg_val(reg->id, val);
1580                 break;
1581         case KVM_REG_PPC_IAC2:
1582                 vcpu->arch.dbg_reg.iac2 = set_reg_val(reg->id, val);
1583                 break;
1584 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1585         case KVM_REG_PPC_IAC3:
1586                 vcpu->arch.dbg_reg.iac3 = set_reg_val(reg->id, val);
1587                 break;
1588         case KVM_REG_PPC_IAC4:
1589                 vcpu->arch.dbg_reg.iac4 = set_reg_val(reg->id, val);
1590                 break;
1591 #endif
1592         case KVM_REG_PPC_DAC1:
1593                 vcpu->arch.dbg_reg.dac1 = set_reg_val(reg->id, val);
1594                 break;
1595         case KVM_REG_PPC_DAC2:
1596                 vcpu->arch.dbg_reg.dac2 = set_reg_val(reg->id, val);
1597                 break;
1598         case KVM_REG_PPC_EPR: {
1599                 u32 new_epr = set_reg_val(reg->id, val);
1600                 kvmppc_set_epr(vcpu, new_epr);
1601                 break;
1602         }
1603 #if defined(CONFIG_64BIT)
1604         case KVM_REG_PPC_EPCR: {
1605                 u32 new_epcr = set_reg_val(reg->id, val);
1606                 kvmppc_set_epcr(vcpu, new_epcr);
1607                 break;
1608         }
1609 #endif
1610         case KVM_REG_PPC_OR_TSR: {
1611                 u32 tsr_bits = set_reg_val(reg->id, val);
1612                 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1613                 break;
1614         }
1615         case KVM_REG_PPC_CLEAR_TSR: {
1616                 u32 tsr_bits = set_reg_val(reg->id, val);
1617                 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1618                 break;
1619         }
1620         case KVM_REG_PPC_TSR: {
1621                 u32 tsr = set_reg_val(reg->id, val);
1622                 kvmppc_set_tsr(vcpu, tsr);
1623                 break;
1624         }
1625         case KVM_REG_PPC_TCR: {
1626                 u32 tcr = set_reg_val(reg->id, val);
1627                 kvmppc_set_tcr(vcpu, tcr);
1628                 break;
1629         }
1630         case KVM_REG_PPC_VRSAVE:
1631                 vcpu->arch.vrsave = set_reg_val(reg->id, val);
1632                 break;
1633         default:
1634                 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val);
1635                 break;
1636         }
1637
1638         return r;
1639 }
1640
1641 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1642 {
1643         return -ENOTSUPP;
1644 }
1645
1646 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1647 {
1648         return -ENOTSUPP;
1649 }
1650
1651 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1652                                   struct kvm_translation *tr)
1653 {
1654         int r;
1655
1656         r = kvmppc_core_vcpu_translate(vcpu, tr);
1657         return r;
1658 }
1659
1660 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1661 {
1662         return -ENOTSUPP;
1663 }
1664
1665 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1666                               struct kvm_memory_slot *dont)
1667 {
1668 }
1669
1670 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1671                                unsigned long npages)
1672 {
1673         return 0;
1674 }
1675
1676 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1677                                       struct kvm_memory_slot *memslot,
1678                                       struct kvm_userspace_memory_region *mem)
1679 {
1680         return 0;
1681 }
1682
1683 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1684                                 struct kvm_userspace_memory_region *mem,
1685                                 const struct kvm_memory_slot *old)
1686 {
1687 }
1688
1689 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1690 {
1691 }
1692
1693 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1694 {
1695 #if defined(CONFIG_64BIT)
1696         vcpu->arch.epcr = new_epcr;
1697 #ifdef CONFIG_KVM_BOOKE_HV
1698         vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1699         if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1700                 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1701 #endif
1702 #endif
1703 }
1704
1705 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1706 {
1707         vcpu->arch.tcr = new_tcr;
1708         arm_next_watchdog(vcpu);
1709         update_timer_ints(vcpu);
1710 }
1711
1712 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1713 {
1714         set_bits(tsr_bits, &vcpu->arch.tsr);
1715         smp_wmb();
1716         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1717         kvm_vcpu_kick(vcpu);
1718 }
1719
1720 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1721 {
1722         clear_bits(tsr_bits, &vcpu->arch.tsr);
1723
1724         /*
1725          * We may have stopped the watchdog due to
1726          * being stuck on final expiration.
1727          */
1728         if (tsr_bits & (TSR_ENW | TSR_WIS))
1729                 arm_next_watchdog(vcpu);
1730
1731         update_timer_ints(vcpu);
1732 }
1733
1734 void kvmppc_decrementer_func(unsigned long data)
1735 {
1736         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1737
1738         if (vcpu->arch.tcr & TCR_ARE) {
1739                 vcpu->arch.dec = vcpu->arch.decar;
1740                 kvmppc_emulate_dec(vcpu);
1741         }
1742
1743         kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1744 }
1745
1746 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1747                                        uint64_t addr, int index)
1748 {
1749         switch (index) {
1750         case 0:
1751                 dbg_reg->dbcr0 |= DBCR0_IAC1;
1752                 dbg_reg->iac1 = addr;
1753                 break;
1754         case 1:
1755                 dbg_reg->dbcr0 |= DBCR0_IAC2;
1756                 dbg_reg->iac2 = addr;
1757                 break;
1758 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1759         case 2:
1760                 dbg_reg->dbcr0 |= DBCR0_IAC3;
1761                 dbg_reg->iac3 = addr;
1762                 break;
1763         case 3:
1764                 dbg_reg->dbcr0 |= DBCR0_IAC4;
1765                 dbg_reg->iac4 = addr;
1766                 break;
1767 #endif
1768         default:
1769                 return -EINVAL;
1770         }
1771
1772         dbg_reg->dbcr0 |= DBCR0_IDM;
1773         return 0;
1774 }
1775
1776 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1777                                        int type, int index)
1778 {
1779         switch (index) {
1780         case 0:
1781                 if (type & KVMPPC_DEBUG_WATCH_READ)
1782                         dbg_reg->dbcr0 |= DBCR0_DAC1R;
1783                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1784                         dbg_reg->dbcr0 |= DBCR0_DAC1W;
1785                 dbg_reg->dac1 = addr;
1786                 break;
1787         case 1:
1788                 if (type & KVMPPC_DEBUG_WATCH_READ)
1789                         dbg_reg->dbcr0 |= DBCR0_DAC2R;
1790                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1791                         dbg_reg->dbcr0 |= DBCR0_DAC2W;
1792                 dbg_reg->dac2 = addr;
1793                 break;
1794         default:
1795                 return -EINVAL;
1796         }
1797
1798         dbg_reg->dbcr0 |= DBCR0_IDM;
1799         return 0;
1800 }
1801 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1802 {
1803         /* XXX: Add similar MSR protection for BookE-PR */
1804 #ifdef CONFIG_KVM_BOOKE_HV
1805         BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1806         if (set) {
1807                 if (prot_bitmap & MSR_UCLE)
1808                         vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1809                 if (prot_bitmap & MSR_DE)
1810                         vcpu->arch.shadow_msrp |= MSRP_DEP;
1811                 if (prot_bitmap & MSR_PMM)
1812                         vcpu->arch.shadow_msrp |= MSRP_PMMP;
1813         } else {
1814                 if (prot_bitmap & MSR_UCLE)
1815                         vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1816                 if (prot_bitmap & MSR_DE)
1817                         vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1818                 if (prot_bitmap & MSR_PMM)
1819                         vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1820         }
1821 #endif
1822 }
1823
1824 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1825                                          struct kvm_guest_debug *dbg)
1826 {
1827         struct debug_reg *dbg_reg;
1828         int n, b = 0, w = 0;
1829
1830         if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1831                 vcpu->arch.shadow_dbg_reg.dbcr0 = 0;
1832                 vcpu->guest_debug = 0;
1833                 kvm_guest_protect_msr(vcpu, MSR_DE, false);
1834                 return 0;
1835         }
1836
1837         kvm_guest_protect_msr(vcpu, MSR_DE, true);
1838         vcpu->guest_debug = dbg->control;
1839         vcpu->arch.shadow_dbg_reg.dbcr0 = 0;
1840         /* Set DBCR0_EDM in guest visible DBCR0 register. */
1841         vcpu->arch.dbg_reg.dbcr0 = DBCR0_EDM;
1842
1843         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
1844                 vcpu->arch.shadow_dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1845
1846         /* Code below handles only HW breakpoints */
1847         dbg_reg = &(vcpu->arch.shadow_dbg_reg);
1848
1849 #ifdef CONFIG_KVM_BOOKE_HV
1850         /*
1851          * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
1852          * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
1853          */
1854         dbg_reg->dbcr1 = 0;
1855         dbg_reg->dbcr2 = 0;
1856 #else
1857         /*
1858          * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
1859          * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
1860          * is set.
1861          */
1862         dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
1863                           DBCR1_IAC4US;
1864         dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
1865 #endif
1866
1867         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1868                 return 0;
1869
1870         for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
1871                 uint64_t addr = dbg->arch.bp[n].addr;
1872                 uint32_t type = dbg->arch.bp[n].type;
1873
1874                 if (type == KVMPPC_DEBUG_NONE)
1875                         continue;
1876
1877                 if (type & !(KVMPPC_DEBUG_WATCH_READ |
1878                              KVMPPC_DEBUG_WATCH_WRITE |
1879                              KVMPPC_DEBUG_BREAKPOINT))
1880                         return -EINVAL;
1881
1882                 if (type & KVMPPC_DEBUG_BREAKPOINT) {
1883                         /* Setting H/W breakpoint */
1884                         if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
1885                                 return -EINVAL;
1886                 } else {
1887                         /* Setting H/W watchpoint */
1888                         if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
1889                                                         type, w++))
1890                                 return -EINVAL;
1891                 }
1892         }
1893
1894         return 0;
1895 }
1896
1897 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1898 {
1899         vcpu->cpu = smp_processor_id();
1900         current->thread.kvm_vcpu = vcpu;
1901 }
1902
1903 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1904 {
1905         current->thread.kvm_vcpu = NULL;
1906         vcpu->cpu = -1;
1907
1908         /* Clear pending debug event in DBSR */
1909         kvmppc_clear_dbsr();
1910 }
1911
1912 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1913 {
1914         vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
1915 }
1916
1917 int kvmppc_core_init_vm(struct kvm *kvm)
1918 {
1919         return kvm->arch.kvm_ops->init_vm(kvm);
1920 }
1921
1922 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
1923 {
1924         return kvm->arch.kvm_ops->vcpu_create(kvm, id);
1925 }
1926
1927 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1928 {
1929         vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
1930 }
1931
1932 void kvmppc_core_destroy_vm(struct kvm *kvm)
1933 {
1934         kvm->arch.kvm_ops->destroy_vm(kvm);
1935 }
1936
1937 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1938 {
1939         vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
1940 }
1941
1942 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
1943 {
1944         vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
1945 }
1946
1947 int __init kvmppc_booke_init(void)
1948 {
1949 #ifndef CONFIG_KVM_BOOKE_HV
1950         unsigned long ivor[16];
1951         unsigned long *handler = kvmppc_booke_handler_addr;
1952         unsigned long max_ivor = 0;
1953         unsigned long handler_len;
1954         int i;
1955
1956         /* We install our own exception handlers by hijacking IVPR. IVPR must
1957          * be 16-bit aligned, so we need a 64KB allocation. */
1958         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1959                                                  VCPU_SIZE_ORDER);
1960         if (!kvmppc_booke_handlers)
1961                 return -ENOMEM;
1962
1963         /* XXX make sure our handlers are smaller than Linux's */
1964
1965         /* Copy our interrupt handlers to match host IVORs. That way we don't
1966          * have to swap the IVORs on every guest/host transition. */
1967         ivor[0] = mfspr(SPRN_IVOR0);
1968         ivor[1] = mfspr(SPRN_IVOR1);
1969         ivor[2] = mfspr(SPRN_IVOR2);
1970         ivor[3] = mfspr(SPRN_IVOR3);
1971         ivor[4] = mfspr(SPRN_IVOR4);
1972         ivor[5] = mfspr(SPRN_IVOR5);
1973         ivor[6] = mfspr(SPRN_IVOR6);
1974         ivor[7] = mfspr(SPRN_IVOR7);
1975         ivor[8] = mfspr(SPRN_IVOR8);
1976         ivor[9] = mfspr(SPRN_IVOR9);
1977         ivor[10] = mfspr(SPRN_IVOR10);
1978         ivor[11] = mfspr(SPRN_IVOR11);
1979         ivor[12] = mfspr(SPRN_IVOR12);
1980         ivor[13] = mfspr(SPRN_IVOR13);
1981         ivor[14] = mfspr(SPRN_IVOR14);
1982         ivor[15] = mfspr(SPRN_IVOR15);
1983
1984         for (i = 0; i < 16; i++) {
1985                 if (ivor[i] > max_ivor)
1986                         max_ivor = i;
1987
1988                 handler_len = handler[i + 1] - handler[i];
1989                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1990                        (void *)handler[i], handler_len);
1991         }
1992
1993         handler_len = handler[max_ivor + 1] - handler[max_ivor];
1994         flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
1995                            ivor[max_ivor] + handler_len);
1996 #endif /* !BOOKE_HV */
1997         return 0;
1998 }
1999
2000 void __exit kvmppc_booke_exit(void)
2001 {
2002         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2003         kvm_exit();
2004 }