4 * Copyright 2011 IBM Corp.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/tty.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/irq.h>
24 #include <linux/seq_file.h>
26 #include <linux/of_fdt.h>
27 #include <linux/interrupt.h>
28 #include <linux/bug.h>
29 #include <linux/pci.h>
30 #include <linux/cpufreq.h>
32 #include <asm/machdep.h>
33 #include <asm/firmware.h>
37 #include <asm/kexec.h>
39 #include <asm/cputhreads.h>
40 #include <asm/cpuidle.h>
41 #include <asm/code-patching.h>
45 static void __init pnv_setup_arch(void)
47 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
55 /* Setup RTC and NVRAM callbacks */
56 if (firmware_has_feature(FW_FEATURE_OPAL))
65 static void __init pnv_init_early(void)
68 * Initialize the LPC bus now so that legacy serial
69 * ports can be found on it
73 #ifdef CONFIG_HVC_OPAL
74 if (firmware_has_feature(FW_FEATURE_OPAL))
75 hvc_opal_init_early();
78 add_preferred_console("hvc", 0, NULL);
81 static void __init pnv_init_IRQ(void)
85 WARN_ON(!ppc_md.get_irq);
88 static void pnv_show_cpuinfo(struct seq_file *m)
90 struct device_node *root;
91 const char *model = "";
93 root = of_find_node_by_path("/");
95 model = of_get_property(root, "model", NULL);
96 seq_printf(m, "machine\t\t: PowerNV %s\n", model);
97 if (firmware_has_feature(FW_FEATURE_OPALv3))
98 seq_printf(m, "firmware\t: OPAL v3\n");
99 else if (firmware_has_feature(FW_FEATURE_OPALv2))
100 seq_printf(m, "firmware\t: OPAL v2\n");
101 else if (firmware_has_feature(FW_FEATURE_OPAL))
102 seq_printf(m, "firmware\t: OPAL v1\n");
104 seq_printf(m, "firmware\t: BML\n");
108 static void pnv_prepare_going_down(void)
111 * Disable all notifiers from OPAL, we can't
112 * service interrupts anymore anyway
114 opal_notifier_disable();
116 /* Soft disable interrupts */
120 * Return secondary CPUs to firwmare if a flash update
121 * is pending otherwise we will get all sort of error
122 * messages about CPU being stuck etc.. This will also
123 * have the side effect of hard disabling interrupts so
124 * past this point, the kernel is effectively dead.
126 opal_flash_term_callback();
129 static void __noreturn pnv_restart(char *cmd)
133 pnv_prepare_going_down();
135 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
136 rc = opal_cec_reboot();
137 if (rc == OPAL_BUSY_EVENT)
138 opal_poll_events(NULL);
143 opal_poll_events(NULL);
146 static void __noreturn pnv_power_off(void)
150 pnv_prepare_going_down();
152 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
153 rc = opal_cec_power_down(0);
154 if (rc == OPAL_BUSY_EVENT)
155 opal_poll_events(NULL);
160 opal_poll_events(NULL);
163 static void __noreturn pnv_halt(void)
168 static void pnv_progress(char *s, unsigned short hex)
172 static int pnv_dma_set_mask(struct device *dev, u64 dma_mask)
175 return pnv_pci_dma_set_mask(to_pci_dev(dev), dma_mask);
176 return __dma_set_mask(dev, dma_mask);
179 static u64 pnv_dma_get_required_mask(struct device *dev)
182 return pnv_pci_dma_get_required_mask(to_pci_dev(dev));
184 return __dma_get_required_mask(dev);
187 static void pnv_shutdown(void)
189 /* Let the PCI code clear up IODA tables */
193 * Stop OPAL activity: Unregister all OPAL interrupts so they
194 * don't fire up while we kexec and make sure all potentially
195 * DMA'ing ops are complete (such as dump retrieval).
201 static void pnv_kexec_wait_secondaries_down(void)
203 int my_cpu, i, notified = -1;
207 for_each_online_cpu(i) {
215 rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
217 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
221 printk(KERN_INFO "kexec: waiting for cpu %d "
222 "(physical %d) to enter OPAL\n",
223 i, paca[i].hw_cpu_id);
230 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
232 xics_kexec_teardown_cpu(secondary);
234 /* On OPAL v3, we return all CPUs to firmware */
236 if (!firmware_has_feature(FW_FEATURE_OPALv3))
240 /* Return secondary CPUs to firmware on OPAL v3 */
242 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
245 /* Return the CPU to OPAL */
247 } else if (crash_shutdown) {
249 * On crash, we don't wait for secondaries to go
250 * down as they might be unreachable or hung, so
251 * instead we just wait a bit and move on.
255 /* Primary waits for the secondaries to have reached OPAL */
256 pnv_kexec_wait_secondaries_down();
259 #endif /* CONFIG_KEXEC */
261 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
262 static unsigned long pnv_memory_block_size(void)
264 return 256UL * 1024 * 1024;
268 static void __init pnv_setup_machdep_opal(void)
270 ppc_md.get_boot_time = opal_get_boot_time;
271 ppc_md.restart = pnv_restart;
272 pm_power_off = pnv_power_off;
273 ppc_md.halt = pnv_halt;
274 ppc_md.machine_check_exception = opal_machine_check;
275 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
276 ppc_md.hmi_exception_early = opal_hmi_exception_early;
277 ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
280 #ifdef CONFIG_PPC_POWERNV_RTAS
281 static void __init pnv_setup_machdep_rtas(void)
283 if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
284 ppc_md.get_boot_time = rtas_get_boot_time;
285 ppc_md.get_rtc_time = rtas_get_rtc_time;
286 ppc_md.set_rtc_time = rtas_set_rtc_time;
288 ppc_md.restart = rtas_restart;
289 pm_power_off = rtas_power_off;
290 ppc_md.halt = rtas_halt;
292 #endif /* CONFIG_PPC_POWERNV_RTAS */
294 static u32 supported_cpuidle_states;
296 static void pnv_alloc_idle_core_states(void)
299 int nr_cores = cpu_nr_cores();
300 u32 *core_idle_state;
303 * core_idle_state - First 8 bits track the idle state of each thread
304 * of the core. The 8th bit is the lock bit. Initially all thread bits
305 * are set. They are cleared when the thread enters deep idle state
306 * like sleep and winkle. Initially the lock bit is cleared.
307 * The lock bit has 2 purposes
308 * a. While the first thread is restoring core state, it prevents
309 * other threads in the core from switching to process context.
310 * b. While the last thread in the core is saving the core state, it
311 * prevents a different thread from waking up.
313 for (i = 0; i < nr_cores; i++) {
314 int first_cpu = i * threads_per_core;
315 int node = cpu_to_node(first_cpu);
317 core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);
318 *core_idle_state = PNV_CORE_IDLE_THREAD_BITS;
320 for (j = 0; j < threads_per_core; j++) {
321 int cpu = first_cpu + j;
323 paca[cpu].core_idle_state_ptr = core_idle_state;
324 paca[cpu].thread_idle_state = PNV_THREAD_RUNNING;
325 paca[cpu].thread_mask = 1 << j;
330 u32 pnv_get_supported_cpuidle_states(void)
332 return supported_cpuidle_states;
334 EXPORT_SYMBOL_GPL(pnv_get_supported_cpuidle_states);
336 static int __init pnv_init_idle_states(void)
338 struct device_node *power_mgt;
340 const __be32 *idle_state_flags;
341 u32 len_flags, flags;
344 supported_cpuidle_states = 0;
346 if (cpuidle_disable != IDLE_NO_OVERRIDE)
349 if (!firmware_has_feature(FW_FEATURE_OPALv3))
352 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
354 pr_warn("opal: PowerMgmt Node not found\n");
358 idle_state_flags = of_get_property(power_mgt,
359 "ibm,cpu-idle-state-flags", &len_flags);
360 if (!idle_state_flags) {
361 pr_warn("DT-PowerMgmt: missing ibm,cpu-idle-state-flags\n");
365 dt_idle_states = len_flags / sizeof(u32);
367 for (i = 0; i < dt_idle_states; i++) {
368 flags = be32_to_cpu(idle_state_flags[i]);
369 supported_cpuidle_states |= flags;
371 if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) {
373 (unsigned int *)pnv_fastsleep_workaround_at_entry,
376 (unsigned int *)pnv_fastsleep_workaround_at_exit,
379 pnv_alloc_idle_core_states();
383 subsys_initcall(pnv_init_idle_states);
385 static int __init pnv_probe(void)
387 unsigned long root = of_get_flat_dt_root();
389 if (!of_flat_dt_is_compatible(root, "ibm,powernv"))
394 if (firmware_has_feature(FW_FEATURE_OPAL))
395 pnv_setup_machdep_opal();
396 #ifdef CONFIG_PPC_POWERNV_RTAS
398 pnv_setup_machdep_rtas();
399 #endif /* CONFIG_PPC_POWERNV_RTAS */
401 pr_debug("PowerNV detected !\n");
407 * Returns the cpu frequency for 'cpu' in Hz. This is used by
410 static unsigned long pnv_get_proc_freq(unsigned int cpu)
412 unsigned long ret_freq;
414 ret_freq = cpufreq_quick_get(cpu) * 1000ul;
417 * If the backend cpufreq driver does not exist,
418 * then fallback to old way of reporting the clockrate.
421 ret_freq = ppc_proc_freq;
425 define_machine(powernv) {
428 .init_early = pnv_init_early,
429 .setup_arch = pnv_setup_arch,
430 .init_IRQ = pnv_init_IRQ,
431 .show_cpuinfo = pnv_show_cpuinfo,
432 .get_proc_freq = pnv_get_proc_freq,
433 .progress = pnv_progress,
434 .machine_shutdown = pnv_shutdown,
435 .power_save = power7_idle,
436 .calibrate_decr = generic_calibrate_decr,
437 .dma_set_mask = pnv_dma_set_mask,
438 .dma_get_required_mask = pnv_dma_get_required_mask,
440 .kexec_cpu_down = pnv_kexec_cpu_down,
442 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
443 .memory_block_size = pnv_memory_block_size,