3 * (Compatible with Algo System ., LTD. - AP-320A)
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/sh_mobile_sdhi.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/mtd/sh_flctl.h>
21 #include <linux/delay.h>
22 #include <linux/i2c.h>
23 #include <linux/smsc911x.h>
24 #include <linux/gpio.h>
25 #include <media/ov772x.h>
26 #include <media/soc_camera.h>
27 #include <media/soc_camera_platform.h>
28 #include <media/sh_mobile_ceu.h>
29 #include <video/sh_mobile_lcdc.h>
31 #include <asm/clock.h>
32 #include <asm/suspend.h>
33 #include <cpu/sh7723.h>
35 static struct smsc911x_platform_config smsc911x_config = {
36 .phy_interface = PHY_INTERFACE_MODE_MII,
37 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
38 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
39 .flags = SMSC911X_USE_32BIT,
42 static struct resource smsc9118_resources[] = {
46 .flags = IORESOURCE_MEM,
51 .flags = IORESOURCE_IRQ,
55 static struct platform_device smsc9118_device = {
58 .num_resources = ARRAY_SIZE(smsc9118_resources),
59 .resource = smsc9118_resources,
61 .platform_data = &smsc911x_config,
66 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
67 * If this area erased, this board can not boot.
69 static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
73 .size = (1 * 1024 * 1024),
74 .mask_flags = MTD_WRITEABLE, /* Read-only */
77 .offset = MTDPART_OFS_APPEND,
78 .size = (2 * 1024 * 1024),
81 .offset = MTDPART_OFS_APPEND,
82 .size = ((7 * 1024 * 1024) + (512 * 1024)),
85 .offset = MTDPART_OFS_APPEND,
86 .mask_flags = MTD_WRITEABLE, /* Read-only */
87 .size = (1024 * 128 * 2),
90 .offset = MTDPART_OFS_APPEND,
91 .size = MTDPART_SIZ_FULL,
95 static struct physmap_flash_data ap325rxa_nor_flash_data = {
97 .parts = ap325rxa_nor_flash_partitions,
98 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
101 static struct resource ap325rxa_nor_flash_resources[] = {
106 .flags = IORESOURCE_MEM,
110 static struct platform_device ap325rxa_nor_flash_device = {
111 .name = "physmap-flash",
112 .resource = ap325rxa_nor_flash_resources,
113 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
115 .platform_data = &ap325rxa_nor_flash_data,
119 static struct mtd_partition nand_partition_info[] = {
123 .size = MTDPART_SIZ_FULL,
127 static struct resource nand_flash_resources[] = {
131 .flags = IORESOURCE_MEM,
135 static struct sh_flctl_platform_data nand_flash_data = {
136 .parts = nand_partition_info,
137 .nr_parts = ARRAY_SIZE(nand_partition_info),
138 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
142 static struct platform_device nand_flash_device = {
144 .resource = nand_flash_resources,
145 .num_resources = ARRAY_SIZE(nand_flash_resources),
147 .platform_data = &nand_flash_data,
151 #define FPGA_LCDREG 0xB4100180
152 #define FPGA_BKLREG 0xB4100212
153 #define FPGA_LCDREG_VAL 0x0018
154 #define PORT_MSELCRB 0xA4050182
155 #define PORT_HIZCRC 0xA405015C
156 #define PORT_DRVCRA 0xA405018A
157 #define PORT_DRVCRB 0xA405018C
159 static int ap320_wvga_set_brightness(void *board_data, int brightness)
162 gpio_set_value(GPIO_PTS3, 0);
163 __raw_writew(0x100, FPGA_BKLREG);
165 __raw_writew(0, FPGA_BKLREG);
166 gpio_set_value(GPIO_PTS3, 1);
172 static int ap320_wvga_get_brightness(void *board_data)
174 return gpio_get_value(GPIO_PTS3);
177 static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
181 /* ASD AP-320/325 LCD ON */
182 __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
185 static void ap320_wvga_power_off(void *board_data)
187 /* ASD AP-320/325 LCD OFF */
188 __raw_writew(0, FPGA_LCDREG);
191 static const struct fb_videomode ap325rxa_lcdc_modes[] = {
202 .sync = 0, /* hsync and vsync are active low */
206 static struct sh_mobile_lcdc_info lcdc_info = {
207 .clock_source = LCDC_CLK_EXTERNAL,
209 .chan = LCDC_CHAN_MAINLCD,
211 .interface_type = RGB18,
213 .lcd_cfg = ap325rxa_lcdc_modes,
214 .num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
215 .lcd_size_cfg = { /* 7.0 inch */
220 .display_on = ap320_wvga_power_on,
221 .display_off = ap320_wvga_power_off,
222 .set_brightness = ap320_wvga_set_brightness,
223 .get_brightness = ap320_wvga_get_brightness,
226 .name = "sh_mobile_lcdc_bl",
232 static struct resource lcdc_resources[] = {
235 .start = 0xfe940000, /* P4-only space */
237 .flags = IORESOURCE_MEM,
241 .flags = IORESOURCE_IRQ,
245 static struct platform_device lcdc_device = {
246 .name = "sh_mobile_lcdc_fb",
247 .num_resources = ARRAY_SIZE(lcdc_resources),
248 .resource = lcdc_resources,
250 .platform_data = &lcdc_info,
253 .hwblk_id = HWBLK_LCDC,
257 static void camera_power(int val)
259 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
264 /* support for the old ncm03j camera */
265 static unsigned char camera_ncm03j_magic[] =
267 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
268 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
269 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
270 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
271 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
272 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
273 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
274 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
275 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
276 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
277 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
278 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
279 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
280 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
281 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
282 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
285 static int camera_probe(void)
287 struct i2c_adapter *a = i2c_get_adapter(0);
296 msg.buf = camera_ncm03j_magic;
299 ret = i2c_transfer(a, &msg, 1);
305 static int camera_set_capture(struct soc_camera_platform_info *info,
308 struct i2c_adapter *a = i2c_get_adapter(0);
315 return 0; /* no disable for now */
318 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
326 buf[0] = camera_ncm03j_magic[i];
327 buf[1] = camera_ncm03j_magic[i + 1];
329 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
335 static int ap325rxa_camera_add(struct soc_camera_device *icd);
336 static void ap325rxa_camera_del(struct soc_camera_device *icd);
338 static struct soc_camera_platform_info camera_info = {
339 .format_name = "UYVY",
342 .code = V4L2_MBUS_FMT_UYVY8_2X8,
343 .colorspace = V4L2_COLORSPACE_SMPTE170M,
344 .field = V4L2_FIELD_NONE,
348 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
349 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
350 SOCAM_DATA_ACTIVE_HIGH,
351 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
352 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
353 V4L2_MBUS_DATA_ACTIVE_HIGH,
354 .mbus_type = V4L2_MBUS_PARALLEL,
355 .set_capture = camera_set_capture,
358 static struct soc_camera_link camera_link = {
360 .add_device = ap325rxa_camera_add,
361 .del_device = ap325rxa_camera_del,
362 .module_name = "soc_camera_platform",
363 .priv = &camera_info,
366 static struct platform_device *camera_device;
368 static void ap325rxa_camera_release(struct device *dev)
370 soc_camera_platform_release(&camera_device);
373 static int ap325rxa_camera_add(struct soc_camera_device *icd)
375 int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
376 ap325rxa_camera_release, 0);
380 ret = camera_probe();
382 soc_camera_platform_del(icd, camera_device, &camera_link);
387 static void ap325rxa_camera_del(struct soc_camera_device *icd)
389 soc_camera_platform_del(icd, camera_device, &camera_link);
391 #endif /* CONFIG_I2C */
393 static int ov7725_power(struct device *dev, int mode)
402 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
403 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
406 static struct resource ceu_resources[] = {
411 .flags = IORESOURCE_MEM,
415 .flags = IORESOURCE_IRQ,
418 /* place holder for contiguous memory */
422 static struct platform_device ceu_device = {
423 .name = "sh_mobile_ceu",
424 .id = 0, /* "ceu0" clock */
425 .num_resources = ARRAY_SIZE(ceu_resources),
426 .resource = ceu_resources,
428 .platform_data = &sh_mobile_ceu_info,
431 .hwblk_id = HWBLK_CEU,
435 static struct resource sdhi0_cn3_resources[] = {
440 .flags = IORESOURCE_MEM,
444 .flags = IORESOURCE_IRQ,
448 static struct sh_mobile_sdhi_info sdhi0_cn3_data = {
449 .tmio_caps = MMC_CAP_SDIO_IRQ,
452 static struct platform_device sdhi0_cn3_device = {
453 .name = "sh_mobile_sdhi",
454 .id = 0, /* "sdhi0" clock */
455 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
456 .resource = sdhi0_cn3_resources,
458 .platform_data = &sdhi0_cn3_data,
461 .hwblk_id = HWBLK_SDHI0,
465 static struct resource sdhi1_cn7_resources[] = {
470 .flags = IORESOURCE_MEM,
474 .flags = IORESOURCE_IRQ,
478 static struct sh_mobile_sdhi_info sdhi1_cn7_data = {
479 .tmio_caps = MMC_CAP_SDIO_IRQ,
482 static struct platform_device sdhi1_cn7_device = {
483 .name = "sh_mobile_sdhi",
484 .id = 1, /* "sdhi1" clock */
485 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
486 .resource = sdhi1_cn7_resources,
488 .platform_data = &sdhi1_cn7_data,
491 .hwblk_id = HWBLK_SDHI1,
495 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
497 I2C_BOARD_INFO("pcf8563", 0x51),
501 static struct i2c_board_info ap325rxa_i2c_camera[] = {
503 I2C_BOARD_INFO("ov772x", 0x21),
507 static struct ov772x_camera_info ov7725_info = {
508 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
510 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
513 static struct soc_camera_link ov7725_link = {
515 .power = ov7725_power,
516 .board_info = &ap325rxa_i2c_camera[0],
518 .priv = &ov7725_info,
521 static struct platform_device ap325rxa_camera[] = {
523 .name = "soc-camera-pdrv",
526 .platform_data = &ov7725_link,
529 .name = "soc-camera-pdrv",
532 .platform_data = &camera_link,
537 static struct platform_device *ap325rxa_devices[] __initdata = {
539 &ap325rxa_nor_flash_device,
549 extern char ap325rxa_sdram_enter_start;
550 extern char ap325rxa_sdram_enter_end;
551 extern char ap325rxa_sdram_leave_start;
552 extern char ap325rxa_sdram_leave_end;
554 static int __init ap325rxa_devices_setup(void)
556 /* register board specific self-refresh code */
557 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
558 &ap325rxa_sdram_enter_start,
559 &ap325rxa_sdram_enter_end,
560 &ap325rxa_sdram_leave_start,
561 &ap325rxa_sdram_leave_end);
563 /* LD3 and LD4 LEDs */
564 gpio_request(GPIO_PTX5, NULL); /* RUN */
565 gpio_direction_output(GPIO_PTX5, 1);
566 gpio_export(GPIO_PTX5, 0);
568 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
569 gpio_direction_output(GPIO_PTX4, 0);
570 gpio_export(GPIO_PTX4, 0);
573 gpio_request(GPIO_PTF7, NULL); /* MODE */
574 gpio_direction_input(GPIO_PTF7);
575 gpio_export(GPIO_PTF7, 0);
578 gpio_request(GPIO_FN_LCDD15, NULL);
579 gpio_request(GPIO_FN_LCDD14, NULL);
580 gpio_request(GPIO_FN_LCDD13, NULL);
581 gpio_request(GPIO_FN_LCDD12, NULL);
582 gpio_request(GPIO_FN_LCDD11, NULL);
583 gpio_request(GPIO_FN_LCDD10, NULL);
584 gpio_request(GPIO_FN_LCDD9, NULL);
585 gpio_request(GPIO_FN_LCDD8, NULL);
586 gpio_request(GPIO_FN_LCDD7, NULL);
587 gpio_request(GPIO_FN_LCDD6, NULL);
588 gpio_request(GPIO_FN_LCDD5, NULL);
589 gpio_request(GPIO_FN_LCDD4, NULL);
590 gpio_request(GPIO_FN_LCDD3, NULL);
591 gpio_request(GPIO_FN_LCDD2, NULL);
592 gpio_request(GPIO_FN_LCDD1, NULL);
593 gpio_request(GPIO_FN_LCDD0, NULL);
594 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
595 gpio_request(GPIO_FN_LCDDCK, NULL);
596 gpio_request(GPIO_FN_LCDVEPWC, NULL);
597 gpio_request(GPIO_FN_LCDVCPWC, NULL);
598 gpio_request(GPIO_FN_LCDVSYN, NULL);
599 gpio_request(GPIO_FN_LCDHSYN, NULL);
600 gpio_request(GPIO_FN_LCDDISP, NULL);
601 gpio_request(GPIO_FN_LCDDON, NULL);
604 gpio_request(GPIO_PTS3, NULL);
605 gpio_direction_output(GPIO_PTS3, 1);
608 gpio_request(GPIO_FN_VIO_CLK2, NULL);
609 gpio_request(GPIO_FN_VIO_VD2, NULL);
610 gpio_request(GPIO_FN_VIO_HD2, NULL);
611 gpio_request(GPIO_FN_VIO_FLD, NULL);
612 gpio_request(GPIO_FN_VIO_CKO, NULL);
613 gpio_request(GPIO_FN_VIO_D15, NULL);
614 gpio_request(GPIO_FN_VIO_D14, NULL);
615 gpio_request(GPIO_FN_VIO_D13, NULL);
616 gpio_request(GPIO_FN_VIO_D12, NULL);
617 gpio_request(GPIO_FN_VIO_D11, NULL);
618 gpio_request(GPIO_FN_VIO_D10, NULL);
619 gpio_request(GPIO_FN_VIO_D9, NULL);
620 gpio_request(GPIO_FN_VIO_D8, NULL);
622 gpio_request(GPIO_PTZ7, NULL);
623 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
624 gpio_request(GPIO_PTZ6, NULL);
625 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
626 gpio_request(GPIO_PTZ5, NULL);
627 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
628 gpio_request(GPIO_PTZ4, NULL);
629 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
631 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
634 gpio_request(GPIO_FN_FCE, NULL);
635 gpio_request(GPIO_FN_NAF7, NULL);
636 gpio_request(GPIO_FN_NAF6, NULL);
637 gpio_request(GPIO_FN_NAF5, NULL);
638 gpio_request(GPIO_FN_NAF4, NULL);
639 gpio_request(GPIO_FN_NAF3, NULL);
640 gpio_request(GPIO_FN_NAF2, NULL);
641 gpio_request(GPIO_FN_NAF1, NULL);
642 gpio_request(GPIO_FN_NAF0, NULL);
643 gpio_request(GPIO_FN_FCDE, NULL);
644 gpio_request(GPIO_FN_FOE, NULL);
645 gpio_request(GPIO_FN_FSC, NULL);
646 gpio_request(GPIO_FN_FWE, NULL);
647 gpio_request(GPIO_FN_FRB, NULL);
649 __raw_writew(0, PORT_HIZCRC);
650 __raw_writew(0xFFFF, PORT_DRVCRA);
651 __raw_writew(0xFFFF, PORT_DRVCRB);
653 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
655 /* SDHI0 - CN3 - SD CARD */
656 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
657 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
658 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
659 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
660 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
661 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
662 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
663 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
665 /* SDHI1 - CN7 - MICRO SD CARD */
666 gpio_request(GPIO_FN_SDHI1CD, NULL);
667 gpio_request(GPIO_FN_SDHI1D3, NULL);
668 gpio_request(GPIO_FN_SDHI1D2, NULL);
669 gpio_request(GPIO_FN_SDHI1D1, NULL);
670 gpio_request(GPIO_FN_SDHI1D0, NULL);
671 gpio_request(GPIO_FN_SDHI1CMD, NULL);
672 gpio_request(GPIO_FN_SDHI1CLK, NULL);
674 i2c_register_board_info(0, ap325rxa_i2c_devices,
675 ARRAY_SIZE(ap325rxa_i2c_devices));
677 return platform_add_devices(ap325rxa_devices,
678 ARRAY_SIZE(ap325rxa_devices));
680 arch_initcall(ap325rxa_devices_setup);
682 /* Return the board specific boot mode pin configuration */
683 static int ap325rxa_mode_pins(void)
685 /* MD0=0, MD1=0, MD2=0: Clock Mode 0
686 * MD3=0: 16-bit Area0 Bus Width
687 * MD5=1: Little Endian
688 * TSTMD=1, MD8=1: Test Mode Disabled
690 return MODE_PIN5 | MODE_PIN8;
693 static struct sh_machine_vector mv_ap325rxa __initmv = {
694 .mv_name = "AP-325RXA",
695 .mv_mode_pins = ap325rxa_mode_pins,