1 /* cpu.c: Dinky routines to look for the kind of Sparc cpu
4 * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net)
7 #include <linux/kernel.h>
8 #include <linux/init.h>
9 #include <linux/sched.h>
10 #include <linux/smp.h>
12 #include <asm/system.h>
13 #include <asm/fpumacro.h>
14 #include <asm/cpudata.h>
15 #include <asm/spitfire.h>
18 DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
23 char* cpu_name; /* should be enough I hope... */
33 struct cpu_fp_info linux_sparc_fpu[] = {
34 { 0x17, 0x10, 0, "UltraSparc I integrated FPU"},
35 { 0x22, 0x10, 0, "UltraSparc I integrated FPU"},
36 { 0x17, 0x11, 0, "UltraSparc II integrated FPU"},
37 { 0x17, 0x12, 0, "UltraSparc IIi integrated FPU"},
38 { 0x17, 0x13, 0, "UltraSparc IIe integrated FPU"},
39 { 0x3e, 0x14, 0, "UltraSparc III integrated FPU"},
40 { 0x3e, 0x15, 0, "UltraSparc III+ integrated FPU"},
41 { 0x3e, 0x16, 0, "UltraSparc IIIi integrated FPU"},
42 { 0x3e, 0x18, 0, "UltraSparc IV integrated FPU"},
43 { 0x3e, 0x19, 0, "UltraSparc IV+ integrated FPU"},
44 { 0x3e, 0x22, 0, "UltraSparc IIIi+ integrated FPU"},
47 #define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
49 struct cpu_iu_info linux_sparc_chips[] = {
50 { 0x17, 0x10, "TI UltraSparc I (SpitFire)"},
51 { 0x22, 0x10, "TI UltraSparc I (SpitFire)"},
52 { 0x17, 0x11, "TI UltraSparc II (BlackBird)"},
53 { 0x17, 0x12, "TI UltraSparc IIi (Sabre)"},
54 { 0x17, 0x13, "TI UltraSparc IIe (Hummingbird)"},
55 { 0x3e, 0x14, "TI UltraSparc III (Cheetah)"},
56 { 0x3e, 0x15, "TI UltraSparc III+ (Cheetah+)"},
57 { 0x3e, 0x16, "TI UltraSparc IIIi (Jalapeno)"},
58 { 0x3e, 0x18, "TI UltraSparc IV (Jaguar)"},
59 { 0x3e, 0x19, "TI UltraSparc IV+ (Panther)"},
60 { 0x3e, 0x22, "TI UltraSparc IIIi+ (Serrano)"},
63 #define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips)
68 unsigned int fsr_storage;
70 static void __init sun4v_cpu_probe(void)
72 struct device_node *dp;
76 dp = of_find_node_by_name(NULL, "cpu");
80 compat = of_get_property(dp, "compatible", &len);
84 if (of_find_in_proplist(compat, "SUNW,UltraSPARC-T1", len)) {
85 sparc_cpu_type = "UltraSparc T1 (Niagara)";
86 sparc_fpu_type = "UltraSparc T1 integrated FPU";
87 } else if (of_find_in_proplist(compat, "SUNW,UltraSPARC-T2", len)) {
88 sparc_cpu_type = "UltraSparc T2 (Niagara2)";
89 sparc_fpu_type = "UltraSparc T2 integrated FPU";
96 compat = "no property";
99 printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", compat);
100 sparc_cpu_type = "Unknown SUN4V CPU";
101 sparc_fpu_type = "Unknown SUN4V FPU";
104 void __init cpu_probe(void)
106 unsigned long ver, fpu_vers, manuf, impl, fprs;
109 if (tlb_type == hypervisor)
110 return sun4v_cpu_probe();
113 fprs_write(FPRS_FEF);
114 __asm__ __volatile__ ("rdpr %%ver, %0; stx %%fsr, [%1]"
119 manuf = ((ver >> 48) & 0xffff);
120 impl = ((ver >> 32) & 0xffff);
122 fpu_vers = ((fpu_vers >> 17) & 0x7);
125 for (i = 0; i < NSPARCCHIPS; i++) {
126 if (linux_sparc_chips[i].manuf == manuf) {
127 if (linux_sparc_chips[i].impl == impl) {
129 linux_sparc_chips[i].cpu_name;
135 if (i == NSPARCCHIPS) {
136 /* Maybe it is a cheetah+ derivative, report it as cheetah+
137 * in that case until we learn the real names.
144 printk("DEBUG: manuf[%lx] impl[%lx]\n",
147 sparc_cpu_type = "Unknown CPU";
150 for (i = 0; i < NSPARCFPU; i++) {
151 if (linux_sparc_fpu[i].manuf == manuf &&
152 linux_sparc_fpu[i].impl == impl) {
153 if (linux_sparc_fpu[i].fpu_vers == fpu_vers) {
155 linux_sparc_fpu[i].fp_name;
161 if (i == NSPARCFPU) {
162 printk("DEBUG: manuf[%lx] impl[%lx] fsr.vers[%lx]\n",
163 manuf, impl, fpu_vers);
164 sparc_fpu_type = "Unknown FPU";