1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
16 #include <asm/frame.h>
18 static inline int paravirt_enabled(void)
20 return pv_info.paravirt_enabled;
23 static inline int paravirt_has_feature(unsigned int feature)
25 WARN_ON_ONCE(!pv_info.paravirt_enabled);
26 return (pv_info.features & feature);
29 static inline void load_sp0(struct tss_struct *tss,
30 struct thread_struct *thread)
32 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
35 /* The paravirtualized CPUID instruction. */
36 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
37 unsigned int *ecx, unsigned int *edx)
39 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
43 * These special macros can be used to get or set a debugging register
45 static inline unsigned long paravirt_get_debugreg(int reg)
47 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
49 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
50 static inline void set_debugreg(unsigned long val, int reg)
52 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
55 static inline void clts(void)
57 PVOP_VCALL0(pv_cpu_ops.clts);
60 static inline unsigned long read_cr0(void)
62 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
65 static inline void write_cr0(unsigned long x)
67 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
70 static inline unsigned long read_cr2(void)
72 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
75 static inline void write_cr2(unsigned long x)
77 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
80 static inline unsigned long read_cr3(void)
82 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
85 static inline void write_cr3(unsigned long x)
87 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
90 static inline unsigned long __read_cr4(void)
92 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
94 static inline unsigned long __read_cr4_safe(void)
96 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
99 static inline void __write_cr4(unsigned long x)
101 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
105 static inline unsigned long read_cr8(void)
107 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
110 static inline void write_cr8(unsigned long x)
112 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
116 static inline void arch_safe_halt(void)
118 PVOP_VCALL0(pv_irq_ops.safe_halt);
121 static inline void halt(void)
123 PVOP_VCALL0(pv_irq_ops.halt);
126 static inline void wbinvd(void)
128 PVOP_VCALL0(pv_cpu_ops.wbinvd);
131 #define get_kernel_rpl() (pv_info.kernel_rpl)
133 static inline u64 paravirt_read_msr(unsigned msr)
135 return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
138 static inline void paravirt_write_msr(unsigned msr,
139 unsigned low, unsigned high)
141 return PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
144 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
146 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
149 static inline int paravirt_write_msr_safe(unsigned msr,
150 unsigned low, unsigned high)
152 return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
155 #define rdmsr(msr, val1, val2) \
157 u64 _l = paravirt_read_msr(msr); \
162 #define wrmsr(msr, val1, val2) \
164 paravirt_write_msr(msr, val1, val2); \
167 #define rdmsrl(msr, val) \
169 val = paravirt_read_msr(msr); \
172 static inline void wrmsrl(unsigned msr, u64 val)
174 wrmsr(msr, (u32)val, (u32)(val>>32));
177 #define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b)
179 /* rdmsr with exception handling */
180 #define rdmsr_safe(msr, a, b) \
183 u64 _l = paravirt_read_msr_safe(msr, &_err); \
189 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
193 *p = paravirt_read_msr_safe(msr, &err);
197 static inline unsigned long long paravirt_sched_clock(void)
199 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
203 extern struct static_key paravirt_steal_enabled;
204 extern struct static_key paravirt_steal_rq_enabled;
206 static inline u64 paravirt_steal_clock(int cpu)
208 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
211 static inline unsigned long long paravirt_read_pmc(int counter)
213 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
216 #define rdpmc(counter, low, high) \
218 u64 _l = paravirt_read_pmc(counter); \
223 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
225 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
227 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
230 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
232 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
235 static inline void load_TR_desc(void)
237 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
239 static inline void load_gdt(const struct desc_ptr *dtr)
241 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
243 static inline void load_idt(const struct desc_ptr *dtr)
245 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
247 static inline void set_ldt(const void *addr, unsigned entries)
249 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
251 static inline void store_idt(struct desc_ptr *dtr)
253 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
255 static inline unsigned long paravirt_store_tr(void)
257 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
259 #define store_tr(tr) ((tr) = paravirt_store_tr())
260 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
262 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
266 static inline void load_gs_index(unsigned int gs)
268 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
272 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
275 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
278 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
279 void *desc, int type)
281 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
284 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
286 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
288 static inline void set_iopl_mask(unsigned mask)
290 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
293 /* The paravirtualized I/O functions */
294 static inline void slow_down_io(void)
296 pv_cpu_ops.io_delay();
297 #ifdef REALLY_SLOW_IO
298 pv_cpu_ops.io_delay();
299 pv_cpu_ops.io_delay();
300 pv_cpu_ops.io_delay();
304 static inline void paravirt_activate_mm(struct mm_struct *prev,
305 struct mm_struct *next)
307 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
310 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
311 struct mm_struct *mm)
313 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
316 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
318 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
321 static inline void __flush_tlb(void)
323 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
325 static inline void __flush_tlb_global(void)
327 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
329 static inline void __flush_tlb_single(unsigned long addr)
331 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
334 static inline void flush_tlb_others(const struct cpumask *cpumask,
335 struct mm_struct *mm,
339 PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
342 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
344 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
347 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
349 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
352 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
354 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
356 static inline void paravirt_release_pte(unsigned long pfn)
358 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
361 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
363 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
366 static inline void paravirt_release_pmd(unsigned long pfn)
368 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
371 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
373 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
375 static inline void paravirt_release_pud(unsigned long pfn)
377 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
380 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
383 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
386 static inline pte_t __pte(pteval_t val)
390 if (sizeof(pteval_t) > sizeof(long))
391 ret = PVOP_CALLEE2(pteval_t,
393 val, (u64)val >> 32);
395 ret = PVOP_CALLEE1(pteval_t,
399 return (pte_t) { .pte = ret };
402 static inline pteval_t pte_val(pte_t pte)
406 if (sizeof(pteval_t) > sizeof(long))
407 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
408 pte.pte, (u64)pte.pte >> 32);
410 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
416 static inline pgd_t __pgd(pgdval_t val)
420 if (sizeof(pgdval_t) > sizeof(long))
421 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
422 val, (u64)val >> 32);
424 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
427 return (pgd_t) { ret };
430 static inline pgdval_t pgd_val(pgd_t pgd)
434 if (sizeof(pgdval_t) > sizeof(long))
435 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
436 pgd.pgd, (u64)pgd.pgd >> 32);
438 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
444 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
445 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
450 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
453 return (pte_t) { .pte = ret };
456 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
457 pte_t *ptep, pte_t pte)
459 if (sizeof(pteval_t) > sizeof(long))
461 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
463 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
464 mm, addr, ptep, pte.pte);
467 static inline void set_pte(pte_t *ptep, pte_t pte)
469 if (sizeof(pteval_t) > sizeof(long))
470 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
471 pte.pte, (u64)pte.pte >> 32);
473 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
477 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
478 pte_t *ptep, pte_t pte)
480 if (sizeof(pteval_t) > sizeof(long))
482 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
484 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
487 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
488 pmd_t *pmdp, pmd_t pmd)
490 if (sizeof(pmdval_t) > sizeof(long))
492 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
494 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
495 native_pmd_val(pmd));
498 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
500 pmdval_t val = native_pmd_val(pmd);
502 if (sizeof(pmdval_t) > sizeof(long))
503 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
505 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
508 #if CONFIG_PGTABLE_LEVELS >= 3
509 static inline pmd_t __pmd(pmdval_t val)
513 if (sizeof(pmdval_t) > sizeof(long))
514 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
515 val, (u64)val >> 32);
517 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
520 return (pmd_t) { ret };
523 static inline pmdval_t pmd_val(pmd_t pmd)
527 if (sizeof(pmdval_t) > sizeof(long))
528 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
529 pmd.pmd, (u64)pmd.pmd >> 32);
531 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
537 static inline void set_pud(pud_t *pudp, pud_t pud)
539 pudval_t val = native_pud_val(pud);
541 if (sizeof(pudval_t) > sizeof(long))
542 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
543 val, (u64)val >> 32);
545 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
548 #if CONFIG_PGTABLE_LEVELS == 4
549 static inline pud_t __pud(pudval_t val)
553 if (sizeof(pudval_t) > sizeof(long))
554 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
555 val, (u64)val >> 32);
557 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
560 return (pud_t) { ret };
563 static inline pudval_t pud_val(pud_t pud)
567 if (sizeof(pudval_t) > sizeof(long))
568 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
569 pud.pud, (u64)pud.pud >> 32);
571 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
577 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
579 pgdval_t val = native_pgd_val(pgd);
581 if (sizeof(pgdval_t) > sizeof(long))
582 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
583 val, (u64)val >> 32);
585 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
589 static inline void pgd_clear(pgd_t *pgdp)
591 set_pgd(pgdp, __pgd(0));
594 static inline void pud_clear(pud_t *pudp)
596 set_pud(pudp, __pud(0));
599 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
601 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
603 #ifdef CONFIG_X86_PAE
604 /* Special-case pte-setting operations for PAE, which can't update a
605 64-bit pte atomically */
606 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
608 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
609 pte.pte, pte.pte >> 32);
612 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
615 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
618 static inline void pmd_clear(pmd_t *pmdp)
620 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
622 #else /* !CONFIG_X86_PAE */
623 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
628 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
631 set_pte_at(mm, addr, ptep, __pte(0));
634 static inline void pmd_clear(pmd_t *pmdp)
636 set_pmd(pmdp, __pmd(0));
638 #endif /* CONFIG_X86_PAE */
640 #define __HAVE_ARCH_START_CONTEXT_SWITCH
641 static inline void arch_start_context_switch(struct task_struct *prev)
643 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
646 static inline void arch_end_context_switch(struct task_struct *next)
648 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
651 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
652 static inline void arch_enter_lazy_mmu_mode(void)
654 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
657 static inline void arch_leave_lazy_mmu_mode(void)
659 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
662 static inline void arch_flush_lazy_mmu_mode(void)
664 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
667 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
668 phys_addr_t phys, pgprot_t flags)
670 pv_mmu_ops.set_fixmap(idx, phys, flags);
673 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
675 #ifdef CONFIG_QUEUED_SPINLOCKS
677 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
680 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
683 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
685 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
688 static __always_inline void pv_wait(u8 *ptr, u8 val)
690 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
693 static __always_inline void pv_kick(int cpu)
695 PVOP_VCALL1(pv_lock_ops.kick, cpu);
698 #else /* !CONFIG_QUEUED_SPINLOCKS */
700 static __always_inline void __ticket_lock_spinning(struct arch_spinlock *lock,
703 PVOP_VCALLEE2(pv_lock_ops.lock_spinning, lock, ticket);
706 static __always_inline void __ticket_unlock_kick(struct arch_spinlock *lock,
709 PVOP_VCALL2(pv_lock_ops.unlock_kick, lock, ticket);
712 #endif /* CONFIG_QUEUED_SPINLOCKS */
714 #endif /* SMP && PARAVIRT_SPINLOCKS */
717 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
718 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
720 /* save and restore all caller-save registers, except return value */
721 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
722 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
724 #define PV_FLAGS_ARG "0"
725 #define PV_EXTRA_CLOBBERS
726 #define PV_VEXTRA_CLOBBERS
728 /* save and restore all caller-save registers, except return value */
729 #define PV_SAVE_ALL_CALLER_REGS \
738 #define PV_RESTORE_ALL_CALLER_REGS \
748 /* We save some registers, but all of them, that's too much. We clobber all
749 * caller saved registers but the argument parameter */
750 #define PV_SAVE_REGS "pushq %%rdi;"
751 #define PV_RESTORE_REGS "popq %%rdi;"
752 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
753 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
754 #define PV_FLAGS_ARG "D"
758 * Generate a thunk around a function which saves all caller-save
759 * registers except for the return value. This allows C functions to
760 * be called from assembler code where fewer than normal registers are
761 * available. It may also help code generation around calls from C
762 * code if the common case doesn't use many registers.
764 * When a callee is wrapped in a thunk, the caller can assume that all
765 * arg regs and all scratch registers are preserved across the
766 * call. The return value in rax/eax will not be saved, even for void
769 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
770 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
771 extern typeof(func) __raw_callee_save_##func; \
773 asm(".pushsection .text;" \
774 ".globl " PV_THUNK_NAME(func) ";" \
775 ".type " PV_THUNK_NAME(func) ", @function;" \
776 PV_THUNK_NAME(func) ":" \
778 PV_SAVE_ALL_CALLER_REGS \
780 PV_RESTORE_ALL_CALLER_REGS \
785 /* Get a reference to a callee-save function */
786 #define PV_CALLEE_SAVE(func) \
787 ((struct paravirt_callee_save) { __raw_callee_save_##func })
789 /* Promise that "func" already uses the right calling convention */
790 #define __PV_IS_CALLEE_SAVE(func) \
791 ((struct paravirt_callee_save) { func })
793 static inline notrace unsigned long arch_local_save_flags(void)
795 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
798 static inline notrace void arch_local_irq_restore(unsigned long f)
800 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
803 static inline notrace void arch_local_irq_disable(void)
805 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
808 static inline notrace void arch_local_irq_enable(void)
810 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
813 static inline notrace unsigned long arch_local_irq_save(void)
817 f = arch_local_save_flags();
818 arch_local_irq_disable();
823 /* Make sure as little as possible of this mess escapes. */
838 extern void default_banner(void);
840 #else /* __ASSEMBLY__ */
842 #define _PVSITE(ptype, clobbers, ops, word, algn) \
846 .pushsection .parainstructions,"a"; \
855 #define COND_PUSH(set, mask, reg) \
856 .if ((~(set)) & mask); push %reg; .endif
857 #define COND_POP(set, mask, reg) \
858 .if ((~(set)) & mask); pop %reg; .endif
862 #define PV_SAVE_REGS(set) \
863 COND_PUSH(set, CLBR_RAX, rax); \
864 COND_PUSH(set, CLBR_RCX, rcx); \
865 COND_PUSH(set, CLBR_RDX, rdx); \
866 COND_PUSH(set, CLBR_RSI, rsi); \
867 COND_PUSH(set, CLBR_RDI, rdi); \
868 COND_PUSH(set, CLBR_R8, r8); \
869 COND_PUSH(set, CLBR_R9, r9); \
870 COND_PUSH(set, CLBR_R10, r10); \
871 COND_PUSH(set, CLBR_R11, r11)
872 #define PV_RESTORE_REGS(set) \
873 COND_POP(set, CLBR_R11, r11); \
874 COND_POP(set, CLBR_R10, r10); \
875 COND_POP(set, CLBR_R9, r9); \
876 COND_POP(set, CLBR_R8, r8); \
877 COND_POP(set, CLBR_RDI, rdi); \
878 COND_POP(set, CLBR_RSI, rsi); \
879 COND_POP(set, CLBR_RDX, rdx); \
880 COND_POP(set, CLBR_RCX, rcx); \
881 COND_POP(set, CLBR_RAX, rax)
883 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
884 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
885 #define PARA_INDIRECT(addr) *addr(%rip)
887 #define PV_SAVE_REGS(set) \
888 COND_PUSH(set, CLBR_EAX, eax); \
889 COND_PUSH(set, CLBR_EDI, edi); \
890 COND_PUSH(set, CLBR_ECX, ecx); \
891 COND_PUSH(set, CLBR_EDX, edx)
892 #define PV_RESTORE_REGS(set) \
893 COND_POP(set, CLBR_EDX, edx); \
894 COND_POP(set, CLBR_ECX, ecx); \
895 COND_POP(set, CLBR_EDI, edi); \
896 COND_POP(set, CLBR_EAX, eax)
898 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
899 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
900 #define PARA_INDIRECT(addr) *%cs:addr
903 #define INTERRUPT_RETURN \
904 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
905 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
907 #define DISABLE_INTERRUPTS(clobbers) \
908 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
909 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
910 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
911 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
913 #define ENABLE_INTERRUPTS(clobbers) \
914 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
915 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
916 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
917 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
920 #define GET_CR0_INTO_EAX \
921 push %ecx; push %edx; \
922 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
924 #else /* !CONFIG_X86_32 */
927 * If swapgs is used while the userspace stack is still current,
928 * there's no way to call a pvop. The PV replacement *must* be
929 * inlined, or the swapgs instruction must be trapped and emulated.
931 #define SWAPGS_UNSAFE_STACK \
932 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
936 * Note: swapgs is very special, and in practise is either going to be
937 * implemented with a single "swapgs" instruction or something very
938 * special. Either way, we don't need to save any registers for
942 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
943 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
946 #define GET_CR2_INTO_RAX \
947 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
949 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
950 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
952 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
954 #define USERGS_SYSRET64 \
955 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
957 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
958 #endif /* CONFIG_X86_32 */
960 #endif /* __ASSEMBLY__ */
961 #else /* CONFIG_PARAVIRT */
962 # define default_banner x86_init_noop
964 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
965 struct mm_struct *mm)
969 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
972 #endif /* __ASSEMBLY__ */
973 #endif /* !CONFIG_PARAVIRT */
974 #endif /* _ASM_X86_PARAVIRT_H */