2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <asm/fpu/internal.h>
9 #include <asm/fpu/regset.h>
10 #include <asm/fpu/signal.h>
11 #include <asm/fpu/types.h>
12 #include <asm/traps.h>
14 #include <linux/hardirq.h>
15 #include <linux/pkeys.h>
17 #define CREATE_TRACE_POINTS
18 #include <asm/trace/fpu.h>
21 * Represents the initial FPU state. It's mostly (but not completely) zeroes,
22 * depending on the FPU hardware format:
24 union fpregs_state init_fpstate __read_mostly;
27 * Track whether the kernel is using the FPU state
32 * - by IRQ context code to potentially use the FPU
35 * - to debug kernel_fpu_begin()/end() correctness
37 static DEFINE_PER_CPU(bool, in_kernel_fpu);
40 * Track which context is using the FPU on the CPU:
42 DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
44 static void kernel_fpu_disable(void)
46 WARN_ON_FPU(this_cpu_read(in_kernel_fpu));
47 this_cpu_write(in_kernel_fpu, true);
50 static void kernel_fpu_enable(void)
52 WARN_ON_FPU(!this_cpu_read(in_kernel_fpu));
53 this_cpu_write(in_kernel_fpu, false);
56 static bool kernel_fpu_disabled(void)
58 return this_cpu_read(in_kernel_fpu);
62 * Were we in an interrupt that interrupted kernel mode?
64 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
65 * pair does nothing at all: the thread must not have fpu (so
66 * that we don't try to save the FPU state), and TS must
67 * be set (so that the clts/stts pair does nothing that is
68 * visible in the interrupted kernel thread).
70 * Except for the eagerfpu case when we return true; in the likely case
71 * the thread has FPU but we are not going to set/clear TS.
73 static bool interrupted_kernel_fpu_idle(void)
75 if (kernel_fpu_disabled())
81 return !current->thread.fpu.fpregs_active && (read_cr0() & X86_CR0_TS);
85 * Were we in user mode (or vm86 mode) when we were
88 * Doing kernel_fpu_begin/end() is ok if we are running
89 * in an interrupt context from user mode - we'll just
90 * save the FPU state as required.
92 static bool interrupted_user_mode(void)
94 struct pt_regs *regs = get_irq_regs();
95 return regs && user_mode(regs);
99 * Can we use the FPU in kernel mode with the
100 * whole "kernel_fpu_begin/end()" sequence?
102 * It's always ok in process context (ie "not interrupt")
103 * but it is sometimes ok even from an irq.
105 bool irq_fpu_usable(void)
107 return !in_interrupt() ||
108 interrupted_user_mode() ||
109 interrupted_kernel_fpu_idle();
111 EXPORT_SYMBOL(irq_fpu_usable);
113 void __kernel_fpu_begin(void)
115 struct fpu *fpu = ¤t->thread.fpu;
117 WARN_ON_FPU(!irq_fpu_usable());
119 kernel_fpu_disable();
121 if (fpu->fpregs_active) {
123 * Ignore return value -- we don't care if reg state
126 copy_fpregs_to_fpstate(fpu);
128 this_cpu_write(fpu_fpregs_owner_ctx, NULL);
129 __fpregs_activate_hw();
132 EXPORT_SYMBOL(__kernel_fpu_begin);
134 void __kernel_fpu_end(void)
136 struct fpu *fpu = ¤t->thread.fpu;
138 if (fpu->fpregs_active)
139 copy_kernel_to_fpregs(&fpu->state);
141 __fpregs_deactivate_hw();
145 EXPORT_SYMBOL(__kernel_fpu_end);
147 void kernel_fpu_begin(void)
150 __kernel_fpu_begin();
152 EXPORT_SYMBOL_GPL(kernel_fpu_begin);
154 void kernel_fpu_end(void)
159 EXPORT_SYMBOL_GPL(kernel_fpu_end);
162 * CR0::TS save/restore functions:
164 int irq_ts_save(void)
167 * If in process context and not atomic, we can take a spurious DNA fault.
168 * Otherwise, doing clts() in process context requires disabling preemption
169 * or some heavy lifting like kernel_fpu_begin()
174 if (read_cr0() & X86_CR0_TS) {
181 EXPORT_SYMBOL_GPL(irq_ts_save);
183 void irq_ts_restore(int TS_state)
188 EXPORT_SYMBOL_GPL(irq_ts_restore);
191 * Save the FPU state (mark it for reload if necessary):
193 * This only ever gets called for the current task.
195 void fpu__save(struct fpu *fpu)
197 WARN_ON_FPU(fpu != ¤t->thread.fpu);
200 trace_x86_fpu_before_save(fpu);
201 if (fpu->fpregs_active) {
202 if (!copy_fpregs_to_fpstate(fpu)) {
204 copy_kernel_to_fpregs(&fpu->state);
206 fpregs_deactivate(fpu);
209 trace_x86_fpu_after_save(fpu);
212 EXPORT_SYMBOL_GPL(fpu__save);
215 * Legacy x87 fpstate state init:
217 static inline void fpstate_init_fstate(struct fregs_state *fp)
219 fp->cwd = 0xffff037fu;
220 fp->swd = 0xffff0000u;
221 fp->twd = 0xffffffffu;
222 fp->fos = 0xffff0000u;
225 void fpstate_init(union fpregs_state *state)
227 if (!static_cpu_has(X86_FEATURE_FPU)) {
228 fpstate_init_soft(&state->soft);
232 memset(state, 0, fpu_kernel_xstate_size);
235 * XRSTORS requires that this bit is set in xcomp_bv, or
236 * it will #GP. Make sure it is replaced after the memset().
238 if (static_cpu_has(X86_FEATURE_XSAVES))
239 state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT;
241 if (static_cpu_has(X86_FEATURE_FXSR))
242 fpstate_init_fxstate(&state->fxsave);
244 fpstate_init_fstate(&state->fsave);
246 EXPORT_SYMBOL_GPL(fpstate_init);
248 int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)
250 dst_fpu->counter = 0;
251 dst_fpu->fpregs_active = 0;
252 dst_fpu->last_cpu = -1;
254 if (!src_fpu->fpstate_active || !static_cpu_has(X86_FEATURE_FPU))
257 WARN_ON_FPU(src_fpu != ¤t->thread.fpu);
260 * Don't let 'init optimized' areas of the XSAVE area
261 * leak into the child task:
264 memset(&dst_fpu->state.xsave, 0, fpu_kernel_xstate_size);
267 * Save current FPU registers directly into the child
268 * FPU context, without any memory-to-memory copying.
269 * In lazy mode, if the FPU context isn't loaded into
270 * fpregs, CR0.TS will be set and do_device_not_available
271 * will load the FPU context.
273 * We have to do all this with preemption disabled,
274 * mostly because of the FNSAVE case, because in that
275 * case we must not allow preemption in the window
276 * between the FNSAVE and us marking the context lazy.
278 * It shouldn't be an issue as even FNSAVE is plenty
279 * fast in terms of critical section length.
282 if (!copy_fpregs_to_fpstate(dst_fpu)) {
283 memcpy(&src_fpu->state, &dst_fpu->state,
284 fpu_kernel_xstate_size);
287 copy_kernel_to_fpregs(&src_fpu->state);
289 fpregs_deactivate(src_fpu);
293 trace_x86_fpu_copy_src(src_fpu);
294 trace_x86_fpu_copy_dst(dst_fpu);
300 * Activate the current task's in-memory FPU context,
301 * if it has not been used before:
303 void fpu__activate_curr(struct fpu *fpu)
305 WARN_ON_FPU(fpu != ¤t->thread.fpu);
307 if (!fpu->fpstate_active) {
308 fpstate_init(&fpu->state);
309 trace_x86_fpu_init_state(fpu);
311 trace_x86_fpu_activate_state(fpu);
312 /* Safe to do for the current task: */
313 fpu->fpstate_active = 1;
316 EXPORT_SYMBOL_GPL(fpu__activate_curr);
319 * This function must be called before we read a task's fpstate.
321 * If the task has not used the FPU before then initialize its
324 * If the task has used the FPU before then save it.
326 void fpu__activate_fpstate_read(struct fpu *fpu)
329 * If fpregs are active (in the current CPU), then
330 * copy them to the fpstate:
332 if (fpu->fpregs_active) {
335 if (!fpu->fpstate_active) {
336 fpstate_init(&fpu->state);
337 trace_x86_fpu_init_state(fpu);
339 trace_x86_fpu_activate_state(fpu);
340 /* Safe to do for current and for stopped child tasks: */
341 fpu->fpstate_active = 1;
347 * This function must be called before we write a task's fpstate.
349 * If the task has used the FPU before then unlazy it.
350 * If the task has not used the FPU before then initialize its fpstate.
352 * After this function call, after registers in the fpstate are
353 * modified and the child task has woken up, the child task will
354 * restore the modified FPU state from the modified context. If we
355 * didn't clear its lazy status here then the lazy in-registers
356 * state pending on its former CPU could be restored, corrupting
359 void fpu__activate_fpstate_write(struct fpu *fpu)
362 * Only stopped child tasks can be used to modify the FPU
363 * state in the fpstate buffer:
365 WARN_ON_FPU(fpu == ¤t->thread.fpu);
367 if (fpu->fpstate_active) {
368 /* Invalidate any lazy state: */
371 fpstate_init(&fpu->state);
372 trace_x86_fpu_init_state(fpu);
374 trace_x86_fpu_activate_state(fpu);
375 /* Safe to do for stopped child tasks: */
376 fpu->fpstate_active = 1;
381 * This function must be called before we write the current
384 * This call gets the current FPU register state and moves
385 * it in to the 'fpstate'. Preemption is disabled so that
386 * no writes to the 'fpstate' can occur from context
389 * Must be followed by a fpu__current_fpstate_write_end().
391 void fpu__current_fpstate_write_begin(void)
393 struct fpu *fpu = ¤t->thread.fpu;
396 * Ensure that the context-switching code does not write
397 * over the fpstate while we are doing our update.
402 * Move the fpregs in to the fpu's 'fpstate'.
404 fpu__activate_fpstate_read(fpu);
407 * The caller is about to write to 'fpu'. Ensure that no
408 * CPU thinks that its fpregs match the fpstate. This
409 * ensures we will not be lazy and skip a XRSTOR in the
416 * This function must be paired with fpu__current_fpstate_write_begin()
418 * This will ensure that the modified fpstate gets placed back in
419 * the fpregs if necessary.
421 * Note: This function may be called whether or not an _actual_
422 * write to the fpstate occurred.
424 void fpu__current_fpstate_write_end(void)
426 struct fpu *fpu = ¤t->thread.fpu;
429 * 'fpu' now has an updated copy of the state, but the
430 * registers may still be out of date. Update them with
431 * an XRSTOR if they are active.
434 copy_kernel_to_fpregs(&fpu->state);
437 * Our update is done and the fpregs/fpstate are in sync
438 * if necessary. Context switches can happen again.
444 * 'fpu__restore()' is called to copy FPU registers from
445 * the FPU fpstate to the live hw registers and to activate
446 * access to the hardware registers, so that FPU instructions
447 * can be used afterwards.
449 * Must be called with kernel preemption disabled (for example
450 * with local interrupts disabled, as it is in the case of
451 * do_device_not_available()).
453 void fpu__restore(struct fpu *fpu)
455 fpu__activate_curr(fpu);
457 /* Avoid __kernel_fpu_begin() right after fpregs_activate() */
458 kernel_fpu_disable();
459 trace_x86_fpu_before_restore(fpu);
460 fpregs_activate(fpu);
461 copy_kernel_to_fpregs(&fpu->state);
463 trace_x86_fpu_after_restore(fpu);
466 EXPORT_SYMBOL_GPL(fpu__restore);
469 * Drops current FPU state: deactivates the fpregs and
470 * the fpstate. NOTE: it still leaves previous contents
471 * in the fpregs in the eager-FPU case.
473 * This function can be used in cases where we know that
474 * a state-restore is coming: either an explicit one,
477 void fpu__drop(struct fpu *fpu)
482 if (fpu->fpregs_active) {
483 /* Ignore delayed exceptions from user space */
484 asm volatile("1: fwait\n"
486 _ASM_EXTABLE(1b, 2b));
487 fpregs_deactivate(fpu);
490 fpu->fpstate_active = 0;
492 trace_x86_fpu_dropped(fpu);
498 * Clear FPU registers by setting them up from
501 static inline void copy_init_fpstate_to_fpregs(void)
504 copy_kernel_to_xregs(&init_fpstate.xsave, -1);
505 else if (static_cpu_has(X86_FEATURE_FXSR))
506 copy_kernel_to_fxregs(&init_fpstate.fxsave);
508 copy_kernel_to_fregs(&init_fpstate.fsave);
510 if (boot_cpu_has(X86_FEATURE_OSPKE))
511 copy_init_pkru_to_fpregs();
515 * Clear the FPU state back to init state.
517 * Called by sys_execve(), by the signal handler code and by various
520 void fpu__clear(struct fpu *fpu)
522 WARN_ON_FPU(fpu != ¤t->thread.fpu); /* Almost certainly an anomaly */
524 if (!use_eager_fpu() || !static_cpu_has(X86_FEATURE_FPU)) {
525 /* FPU state will be reallocated lazily at the first use. */
528 if (!fpu->fpstate_active) {
529 fpu__activate_curr(fpu);
532 copy_init_fpstate_to_fpregs();
537 * x87 math exception handling:
540 int fpu__exception_code(struct fpu *fpu, int trap_nr)
544 if (trap_nr == X86_TRAP_MF) {
545 unsigned short cwd, swd;
547 * (~cwd & swd) will mask out exceptions that are not set to unmasked
548 * status. 0x3f is the exception bits in these regs, 0x200 is the
549 * C1 reg you need in case of a stack fault, 0x040 is the stack
550 * fault bit. We should only be taking one exception at a time,
551 * so if this combination doesn't produce any single exception,
552 * then we have a bad program that isn't synchronizing its FPU usage
553 * and it will suffer the consequences since we won't be able to
554 * fully reproduce the context of the exception.
556 if (boot_cpu_has(X86_FEATURE_FXSR)) {
557 cwd = fpu->state.fxsave.cwd;
558 swd = fpu->state.fxsave.swd;
560 cwd = (unsigned short)fpu->state.fsave.cwd;
561 swd = (unsigned short)fpu->state.fsave.swd;
567 * The SIMD FPU exceptions are handled a little differently, as there
568 * is only a single status/control register. Thus, to determine which
569 * unmasked exception was caught we must mask the exception mask bits
570 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
572 unsigned short mxcsr = MXCSR_DEFAULT;
574 if (boot_cpu_has(X86_FEATURE_XMM))
575 mxcsr = fpu->state.fxsave.mxcsr;
577 err = ~(mxcsr >> 7) & mxcsr;
580 if (err & 0x001) { /* Invalid op */
582 * swd & 0x240 == 0x040: Stack Underflow
583 * swd & 0x240 == 0x240: Stack Overflow
584 * User must clear the SF bit (0x40) if set
587 } else if (err & 0x004) { /* Divide by Zero */
589 } else if (err & 0x008) { /* Overflow */
591 } else if (err & 0x012) { /* Denormal, Underflow */
593 } else if (err & 0x020) { /* Precision */
598 * If we're using IRQ 13, or supposedly even some trap
599 * X86_TRAP_MF implementations, it's possible
600 * we get a spurious trap, which is not an error.