arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/tlbflush.h>
  17 #include <asm/uaccess.h>
  18 #include <asm/ptrace.h>
  19 #include <asm/i387.h>
  20 #include <asm/fpu-internal.h>
  21 #include <asm/user.h>
  22
  23 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  24
  25 void kernel_fpu_disable(void)
  26 {
  27         WARN_ON(this_cpu_read(in_kernel_fpu));
  28         this_cpu_write(in_kernel_fpu, true);
  29 }
  30
  31 void kernel_fpu_enable(void)
  32 {
  33         this_cpu_write(in_kernel_fpu, false);
  34 }
  35
  36 /*
  37  * Were we in an interrupt that interrupted kernel mode?
  38  *
  39  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  40  * pair does nothing at all: the thread must not have fpu (so
  41  * that we don't try to save the FPU state), and TS must
  42  * be set (so that the clts/stts pair does nothing that is
  43  * visible in the interrupted kernel thread).
  44  *
  45  * Except for the eagerfpu case when we return true; in the likely case
  46  * the thread has FPU but we are not going to set/clear TS.
  47  */
  48 static inline bool interrupted_kernel_fpu_idle(void)
  49 {
  50         if (this_cpu_read(in_kernel_fpu))
  51                 return false;
  52
  53         if (use_eager_fpu())
  54                 return true;
  55
  56         return !__thread_has_fpu(current) &&
  57                 (read_cr0() & X86_CR0_TS);
  58 }
  59
  60 /*
  61  * Were we in user mode (or vm86 mode) when we were
  62  * interrupted?
  63  *
  64  * Doing kernel_fpu_begin/end() is ok if we are running
  65  * in an interrupt context from user mode - we'll just
  66  * save the FPU state as required.
  67  */
  68 static inline bool interrupted_user_mode(void)
  69 {
  70         struct pt_regs *regs = get_irq_regs();
  71         return regs && user_mode(regs);
  72 }
  73
  74 /*
  75  * Can we use the FPU in kernel mode with the
  76  * whole "kernel_fpu_begin/end()" sequence?
  77  *
  78  * It's always ok in process context (ie "not interrupt")
  79  * but it is sometimes ok even from an irq.
  80  */
  81 bool irq_fpu_usable(void)
  82 {
  83         return !in_interrupt() ||
  84                 interrupted_user_mode() ||
  85                 interrupted_kernel_fpu_idle();
  86 }
  87 EXPORT_SYMBOL(irq_fpu_usable);
  88
  89 void __kernel_fpu_begin(void)
  90 {
  91         struct task_struct *me = current;
  92
  93         this_cpu_write(in_kernel_fpu, true);
  94
  95         if (__thread_has_fpu(me)) {
  96                 __save_init_fpu(me);
  97         } else {
  98                 this_cpu_write(fpu_owner_task, NULL);
  99                 if (!use_eager_fpu())
 100                         clts();
 101         }
 102 }
 103 EXPORT_SYMBOL(__kernel_fpu_begin);
 104
 105 void __kernel_fpu_end(void)
 106 {
 107         struct task_struct *me = current;
 108
 109         if (__thread_has_fpu(me)) {
 110                 if (WARN_ON(restore_fpu_checking(me)))
 111                         fpu_reset_state(me);
 112         } else if (!use_eager_fpu()) {
 113                 stts();
 114         }
 115
 116         this_cpu_write(in_kernel_fpu, false);
 117 }
 118 EXPORT_SYMBOL(__kernel_fpu_end);
 119
 120 void unlazy_fpu(struct task_struct *tsk)
 121 {
 122         preempt_disable();
 123         if (__thread_has_fpu(tsk)) {
 124                 if (use_eager_fpu()) {
 125                         __save_fpu(tsk);
 126                 } else {
 127                         __save_init_fpu(tsk);
 128                         __thread_fpu_end(tsk);
 129                 }
 130         }
 131         preempt_enable();
 132 }
 133 EXPORT_SYMBOL(unlazy_fpu);
 134
 135 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
 136 unsigned int xstate_size;
 137 EXPORT_SYMBOL_GPL(xstate_size);
 138 static struct i387_fxsave_struct fx_scratch;
 139
 140 static void mxcsr_feature_mask_init(void)
 141 {
 142         unsigned long mask = 0;
 143
 144         if (cpu_has_fxsr) {
 145                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
 146                 asm volatile("fxsave %0" : "+m" (fx_scratch));
 147                 mask = fx_scratch.mxcsr_mask;
 148                 if (mask == 0)
 149                         mask = 0x0000ffbf;
 150         }
 151         mxcsr_feature_mask &= mask;
 152 }
 153
 154 static void init_thread_xstate(void)
 155 {
 156         /*
 157          * Note that xstate_size might be overwriten later during
 158          * xsave_init().
 159          */
 160
 161         if (!cpu_has_fpu) {
 162                 /*
 163                  * Disable xsave as we do not support it if i387
 164                  * emulation is enabled.
 165                  */
 166                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
 167                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
 168                 xstate_size = sizeof(struct i387_soft_struct);
 169                 return;
 170         }
 171
 172         if (cpu_has_fxsr)
 173                 xstate_size = sizeof(struct i387_fxsave_struct);
 174         else
 175                 xstate_size = sizeof(struct i387_fsave_struct);
 176 }
 177
 178 /*
 179  * Called at bootup to set up the initial FPU state that is later cloned
 180  * into all processes.
 181  */
 182
 183 void fpu_init(void)
 184 {
 185         unsigned long cr0;
 186         unsigned long cr4_mask = 0;
 187
 188 #ifndef CONFIG_MATH_EMULATION
 189         if (!cpu_has_fpu) {
 190                 pr_emerg("No FPU found and no math emulation present\n");
 191                 pr_emerg("Giving up\n");
 192                 for (;;)
 193                         asm volatile("hlt");
 194         }
 195 #endif
 196         if (cpu_has_fxsr)
 197                 cr4_mask |= X86_CR4_OSFXSR;
 198         if (cpu_has_xmm)
 199                 cr4_mask |= X86_CR4_OSXMMEXCPT;
 200         if (cr4_mask)
 201                 cr4_set_bits(cr4_mask);
 202
 203         cr0 = read_cr0();
 204         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
 205         if (!cpu_has_fpu)
 206                 cr0 |= X86_CR0_EM;
 207         write_cr0(cr0);
 208
 209         /*
 210          * init_thread_xstate is only called once to avoid overriding
 211          * xstate_size during boot time or during CPU hotplug.
 212          */
 213         if (xstate_size == 0)
 214                 init_thread_xstate();
 215
 216         mxcsr_feature_mask_init();
 217         xsave_init();
 218         eager_fpu_init();
 219 }
 220
 221 void fpu_finit(struct fpu *fpu)
 222 {
 223         if (!cpu_has_fpu) {
 224                 finit_soft_fpu(&fpu->state->soft);
 225                 return;
 226         }
 227
 228         memset(fpu->state, 0, xstate_size);
 229
 230         if (cpu_has_fxsr) {
 231                 fx_finit(&fpu->state->fxsave);
 232         } else {
 233                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 234                 fp->cwd = 0xffff037fu;
 235                 fp->swd = 0xffff0000u;
 236                 fp->twd = 0xffffffffu;
 237                 fp->fos = 0xffff0000u;
 238         }
 239 }
 240 EXPORT_SYMBOL_GPL(fpu_finit);
 241
 242 /*
 243  * The _current_ task is using the FPU for the first time
 244  * so initialize it and set the mxcsr to its default
 245  * value at reset if we support XMM instructions and then
 246  * remember the current task has used the FPU.
 247  */
 248 int init_fpu(struct task_struct *tsk)
 249 {
 250         int ret;
 251
 252         if (tsk_used_math(tsk)) {
 253                 if (cpu_has_fpu && tsk == current)
 254                         unlazy_fpu(tsk);
 255                 task_disable_lazy_fpu_restore(tsk);
 256                 return 0;
 257         }
 258
 259         /*
 260          * Memory allocation at the first usage of the FPU and other state.
 261          */
 262         ret = fpu_alloc(&tsk->thread.fpu);
 263         if (ret)
 264                 return ret;
 265
 266         fpu_finit(&tsk->thread.fpu);
 267
 268         set_stopped_child_used_math(tsk);
 269         return 0;
 270 }
 271 EXPORT_SYMBOL_GPL(init_fpu);
 272
 273 /*
 274  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 275  * as the "regset->n" for the xstate regset will be updated based on the feature
 276  * capabilites supported by the xsave.
 277  */
 278 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 279 {
 280         return tsk_used_math(target) ? regset->n : 0;
 281 }
 282
 283 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 284 {
 285         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 286 }
 287
 288 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 289                 unsigned int pos, unsigned int count,
 290                 void *kbuf, void __user *ubuf)
 291 {
 292         int ret;
 293
 294         if (!cpu_has_fxsr)
 295                 return -ENODEV;
 296
 297         ret = init_fpu(target);
 298         if (ret)
 299                 return ret;
 300
 301         sanitize_i387_state(target);
 302
 303         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 304                                    &target->thread.fpu.state->fxsave, 0, -1);
 305 }
 306
 307 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 308                 unsigned int pos, unsigned int count,
 309                 const void *kbuf, const void __user *ubuf)
 310 {
 311         int ret;
 312
 313         if (!cpu_has_fxsr)
 314                 return -ENODEV;
 315
 316         ret = init_fpu(target);
 317         if (ret)
 318                 return ret;
 319
 320         sanitize_i387_state(target);
 321
 322         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 323                                  &target->thread.fpu.state->fxsave, 0, -1);
 324
 325         /*
 326          * mxcsr reserved bits must be masked to zero for security reasons.
 327          */
 328         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 329
 330         /*
 331          * update the header bits in the xsave header, indicating the
 332          * presence of FP and SSE state.
 333          */
 334         if (cpu_has_xsave)
 335                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 336
 337         return ret;
 338 }
 339
 340 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 341                 unsigned int pos, unsigned int count,
 342                 void *kbuf, void __user *ubuf)
 343 {
 344         struct xsave_struct *xsave;
 345         int ret;
 346
 347         if (!cpu_has_xsave)
 348                 return -ENODEV;
 349
 350         ret = init_fpu(target);
 351         if (ret)
 352                 return ret;
 353
 354         xsave = &target->thread.fpu.state->xsave;
 355
 356         /*
 357          * Copy the 48bytes defined by the software first into the xstate
 358          * memory layout in the thread struct, so that we can copy the entire
 359          * xstateregs to the user using one user_regset_copyout().
 360          */
 361         memcpy(&xsave->i387.sw_reserved,
 362                 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 363         /*
 364          * Copy the xstate memory layout.
 365          */
 366         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 367         return ret;
 368 }
 369
 370 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 371                   unsigned int pos, unsigned int count,
 372                   const void *kbuf, const void __user *ubuf)
 373 {
 374         struct xsave_struct *xsave;
 375         int ret;
 376
 377         if (!cpu_has_xsave)
 378                 return -ENODEV;
 379
 380         ret = init_fpu(target);
 381         if (ret)
 382                 return ret;
 383
 384         xsave = &target->thread.fpu.state->xsave;
 385
 386         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 387         /*
 388          * mxcsr reserved bits must be masked to zero for security reasons.
 389          */
 390         xsave->i387.mxcsr &= mxcsr_feature_mask;
 391         xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
 392         /*
 393          * These bits must be zero.
 394          */
 395         memset(&xsave->xsave_hdr.reserved, 0, 48);
 396         return ret;
 397 }
 398
 399 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 400
 401 /*
 402  * FPU tag word conversions.
 403  */
 404
 405 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 406 {
 407         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 408
 409         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 410         tmp = ~twd;
 411         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 412         /* and move the valid bits to the lower byte. */
 413         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 414         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 415         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 416
 417         return tmp;
 418 }
 419
 420 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 421 #define FP_EXP_TAG_VALID        0
 422 #define FP_EXP_TAG_ZERO         1
 423 #define FP_EXP_TAG_SPECIAL      2
 424 #define FP_EXP_TAG_EMPTY        3
 425
 426 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 427 {
 428         struct _fpxreg *st;
 429         u32 tos = (fxsave->swd >> 11) & 7;
 430         u32 twd = (unsigned long) fxsave->twd;
 431         u32 tag;
 432         u32 ret = 0xffff0000u;
 433         int i;
 434
 435         for (i = 0; i < 8; i++, twd >>= 1) {
 436                 if (twd & 0x1) {
 437                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 438
 439                         switch (st->exponent & 0x7fff) {
 440                         case 0x7fff:
 441                                 tag = FP_EXP_TAG_SPECIAL;
 442                                 break;
 443                         case 0x0000:
 444                                 if (!st->significand[0] &&
 445                                     !st->significand[1] &&
 446                                     !st->significand[2] &&
 447                                     !st->significand[3])
 448                                         tag = FP_EXP_TAG_ZERO;
 449                                 else
 450                                         tag = FP_EXP_TAG_SPECIAL;
 451                                 break;
 452                         default:
 453                                 if (st->significand[3] & 0x8000)
 454                                         tag = FP_EXP_TAG_VALID;
 455                                 else
 456                                         tag = FP_EXP_TAG_SPECIAL;
 457                                 break;
 458                         }
 459                 } else {
 460                         tag = FP_EXP_TAG_EMPTY;
 461                 }
 462                 ret |= tag << (2 * i);
 463         }
 464         return ret;
 465 }
 466
 467 /*
 468  * FXSR floating point environment conversions.
 469  */
 470
 471 void
 472 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 473 {
 474         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 475         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 476         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 477         int i;
 478
 479         env->cwd = fxsave->cwd | 0xffff0000u;
 480         env->swd = fxsave->swd | 0xffff0000u;
 481         env->twd = twd_fxsr_to_i387(fxsave);
 482
 483 #ifdef CONFIG_X86_64
 484         env->fip = fxsave->rip;
 485         env->foo = fxsave->rdp;
 486         /*
 487          * should be actually ds/cs at fpu exception time, but
 488          * that information is not available in 64bit mode.
 489          */
 490         env->fcs = task_pt_regs(tsk)->cs;
 491         if (tsk == current) {
 492                 savesegment(ds, env->fos);
 493         } else {
 494                 env->fos = tsk->thread.ds;
 495         }
 496         env->fos |= 0xffff0000;
 497 #else
 498         env->fip = fxsave->fip;
 499         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 500         env->foo = fxsave->foo;
 501         env->fos = fxsave->fos;
 502 #endif
 503
 504         for (i = 0; i < 8; ++i)
 505                 memcpy(&to[i], &from[i], sizeof(to[0]));
 506 }
 507
 508 void convert_to_fxsr(struct task_struct *tsk,
 509                      const struct user_i387_ia32_struct *env)
 510
 511 {
 512         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 513         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 514         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 515         int i;
 516
 517         fxsave->cwd = env->cwd;
 518         fxsave->swd = env->swd;
 519         fxsave->twd = twd_i387_to_fxsr(env->twd);
 520         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 521 #ifdef CONFIG_X86_64
 522         fxsave->rip = env->fip;
 523         fxsave->rdp = env->foo;
 524         /* cs and ds ignored */
 525 #else
 526         fxsave->fip = env->fip;
 527         fxsave->fcs = (env->fcs & 0xffff);
 528         fxsave->foo = env->foo;
 529         fxsave->fos = env->fos;
 530 #endif
 531
 532         for (i = 0; i < 8; ++i)
 533                 memcpy(&to[i], &from[i], sizeof(from[0]));
 534 }
 535
 536 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 537                unsigned int pos, unsigned int count,
 538                void *kbuf, void __user *ubuf)
 539 {
 540         struct user_i387_ia32_struct env;
 541         int ret;
 542
 543         ret = init_fpu(target);
 544         if (ret)
 545                 return ret;
 546
 547         if (!static_cpu_has(X86_FEATURE_FPU))
 548                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 549
 550         if (!cpu_has_fxsr)
 551                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 552                                            &target->thread.fpu.state->fsave, 0,
 553                                            -1);
 554
 555         sanitize_i387_state(target);
 556
 557         if (kbuf && pos == 0 && count == sizeof(env)) {
 558                 convert_from_fxsr(kbuf, target);
 559                 return 0;
 560         }
 561
 562         convert_from_fxsr(&env, target);
 563
 564         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 565 }
 566
 567 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 568                unsigned int pos, unsigned int count,
 569                const void *kbuf, const void __user *ubuf)
 570 {
 571         struct user_i387_ia32_struct env;
 572         int ret;
 573
 574         ret = init_fpu(target);
 575         if (ret)
 576                 return ret;
 577
 578         sanitize_i387_state(target);
 579
 580         if (!static_cpu_has(X86_FEATURE_FPU))
 581                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 582
 583         if (!cpu_has_fxsr)
 584                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 585                                           &target->thread.fpu.state->fsave, 0,
 586                                           -1);
 587
 588         if (pos > 0 || count < sizeof(env))
 589                 convert_from_fxsr(&env, target);
 590
 591         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 592         if (!ret)
 593                 convert_to_fxsr(target, &env);
 594
 595         /*
 596          * update the header bit in the xsave header, indicating the
 597          * presence of FP.
 598          */
 599         if (cpu_has_xsave)
 600                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 601         return ret;
 602 }
 603
 604 /*
 605  * FPU state for core dumps.
 606  * This is only used for a.out dumps now.
 607  * It is declared generically using elf_fpregset_t (which is
 608  * struct user_i387_struct) but is in fact only used for 32-bit
 609  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 610  */
 611 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 612 {
 613         struct task_struct *tsk = current;
 614         int fpvalid;
 615
 616         fpvalid = !!used_math();
 617         if (fpvalid)
 618                 fpvalid = !fpregs_get(tsk, NULL,
 619                                       0, sizeof(struct user_i387_ia32_struct),
 620                                       fpu, NULL);
 621
 622         return fpvalid;
 623 }
 624 EXPORT_SYMBOL(dump_fpu);
 625
 626 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
 627
 628 static int __init no_387(char *s)
 629 {
 630         setup_clear_cpu_cap(X86_FEATURE_FPU);
 631         return 1;
 632 }
 633
 634 __setup("no387", no_387);
 635
 636 void fpu_detect(struct cpuinfo_x86 *c)
 637 {
 638         unsigned long cr0;
 639         u16 fsw, fcw;
 640
 641         fsw = fcw = 0xffff;
 642
 643         cr0 = read_cr0();
 644         cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
 645         write_cr0(cr0);
 646
 647         asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
 648                      : "+m" (fsw), "+m" (fcw));
 649
 650         if (fsw == 0 && (fcw & 0x103f) == 0x003f)
 651                 set_cpu_cap(c, X86_FEATURE_FPU);
 652         else
 653                 clear_cpu_cap(c, X86_FEATURE_FPU);
 654
 655         /* The final cr0 value is set in fpu_init() */
 656 }