arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly vector_hashing = true;
 127 module_param(vector_hashing, bool, S_IRUGO);
 128
 129 static bool __read_mostly backwards_tsc_observed = false;
 130
 131 #define KVM_NR_SHARED_MSRS 16
 132
 133 struct kvm_shared_msrs_global {
 134         int nr;
 135         u32 msrs[KVM_NR_SHARED_MSRS];
 136 };
 137
 138 struct kvm_shared_msrs {
 139         struct user_return_notifier urn;
 140         bool registered;
 141         struct kvm_shared_msr_values {
 142                 u64 host;
 143                 u64 curr;
 144         } values[KVM_NR_SHARED_MSRS];
 145 };
 146
 147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 148 static struct kvm_shared_msrs __percpu *shared_msrs;
 149
 150 struct kvm_stats_debugfs_item debugfs_entries[] = {
 151         { "pf_fixed", VCPU_STAT(pf_fixed) },
 152         { "pf_guest", VCPU_STAT(pf_guest) },
 153         { "tlb_flush", VCPU_STAT(tlb_flush) },
 154         { "invlpg", VCPU_STAT(invlpg) },
 155         { "exits", VCPU_STAT(exits) },
 156         { "io_exits", VCPU_STAT(io_exits) },
 157         { "mmio_exits", VCPU_STAT(mmio_exits) },
 158         { "signal_exits", VCPU_STAT(signal_exits) },
 159         { "irq_window", VCPU_STAT(irq_window_exits) },
 160         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 161         { "halt_exits", VCPU_STAT(halt_exits) },
 162         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 163         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 164         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 165         { "hypercalls", VCPU_STAT(hypercalls) },
 166         { "request_irq", VCPU_STAT(request_irq_exits) },
 167         { "irq_exits", VCPU_STAT(irq_exits) },
 168         { "host_state_reload", VCPU_STAT(host_state_reload) },
 169         { "efer_reload", VCPU_STAT(efer_reload) },
 170         { "fpu_reload", VCPU_STAT(fpu_reload) },
 171         { "insn_emulation", VCPU_STAT(insn_emulation) },
 172         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 173         { "irq_injections", VCPU_STAT(irq_injections) },
 174         { "nmi_injections", VCPU_STAT(nmi_injections) },
 175         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 176         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 177         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 178         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 179         { "mmu_flooded", VM_STAT(mmu_flooded) },
 180         { "mmu_recycled", VM_STAT(mmu_recycled) },
 181         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 182         { "mmu_unsync", VM_STAT(mmu_unsync) },
 183         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 184         { "largepages", VM_STAT(lpages) },
 185         { NULL }
 186 };
 187
 188 u64 __read_mostly host_xcr0;
 189
 190 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 191
 192 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 193 {
 194         int i;
 195         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 196                 vcpu->arch.apf.gfns[i] = ~0;
 197 }
 198
 199 static void kvm_on_user_return(struct user_return_notifier *urn)
 200 {
 201         unsigned slot;
 202         struct kvm_shared_msrs *locals
 203                 = container_of(urn, struct kvm_shared_msrs, urn);
 204         struct kvm_shared_msr_values *values;
 205
 206         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 207                 values = &locals->values[slot];
 208                 if (values->host != values->curr) {
 209                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 210                         values->curr = values->host;
 211                 }
 212         }
 213         locals->registered = false;
 214         user_return_notifier_unregister(urn);
 215 }
 216
 217 static void shared_msr_update(unsigned slot, u32 msr)
 218 {
 219         u64 value;
 220         unsigned int cpu = smp_processor_id();
 221         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 222
 223         /* only read, and nobody should modify it at this time,
 224          * so don't need lock */
 225         if (slot >= shared_msrs_global.nr) {
 226                 printk(KERN_ERR "kvm: invalid MSR slot!");
 227                 return;
 228         }
 229         rdmsrl_safe(msr, &value);
 230         smsr->values[slot].host = value;
 231         smsr->values[slot].curr = value;
 232 }
 233
 234 void kvm_define_shared_msr(unsigned slot, u32 msr)
 235 {
 236         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 237         shared_msrs_global.msrs[slot] = msr;
 238         if (slot >= shared_msrs_global.nr)
 239                 shared_msrs_global.nr = slot + 1;
 240 }
 241 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 242
 243 static void kvm_shared_msr_cpu_online(void)
 244 {
 245         unsigned i;
 246
 247         for (i = 0; i < shared_msrs_global.nr; ++i)
 248                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 249 }
 250
 251 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 252 {
 253         unsigned int cpu = smp_processor_id();
 254         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 255         int err;
 256
 257         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 258                 return 0;
 259         smsr->values[slot].curr = value;
 260         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 261         if (err)
 262                 return 1;
 263
 264         if (!smsr->registered) {
 265                 smsr->urn.on_user_return = kvm_on_user_return;
 266                 user_return_notifier_register(&smsr->urn);
 267                 smsr->registered = true;
 268         }
 269         return 0;
 270 }
 271 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 272
 273 static void drop_user_return_notifiers(void)
 274 {
 275         unsigned int cpu = smp_processor_id();
 276         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 277
 278         if (smsr->registered)
 279                 kvm_on_user_return(&smsr->urn);
 280 }
 281
 282 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 283 {
 284         return vcpu->arch.apic_base;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 287
 288 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 289 {
 290         u64 old_state = vcpu->arch.apic_base &
 291                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 292         u64 new_state = msr_info->data &
 293                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 294         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 295                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 296
 297         if (!msr_info->host_initiated &&
 298             ((msr_info->data & reserved_bits) != 0 ||
 299              new_state == X2APIC_ENABLE ||
 300              (new_state == MSR_IA32_APICBASE_ENABLE &&
 301               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 302              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 303               old_state == 0)))
 304                 return 1;
 305
 306         kvm_lapic_set_base(vcpu, msr_info->data);
 307         return 0;
 308 }
 309 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 310
 311 asmlinkage __visible void kvm_spurious_fault(void)
 312 {
 313         /* Fault while not rebooting.  We want the trace. */
 314         BUG();
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 317
 318 #define EXCPT_BENIGN            0
 319 #define EXCPT_CONTRIBUTORY      1
 320 #define EXCPT_PF                2
 321
 322 static int exception_class(int vector)
 323 {
 324         switch (vector) {
 325         case PF_VECTOR:
 326                 return EXCPT_PF;
 327         case DE_VECTOR:
 328         case TS_VECTOR:
 329         case NP_VECTOR:
 330         case SS_VECTOR:
 331         case GP_VECTOR:
 332                 return EXCPT_CONTRIBUTORY;
 333         default:
 334                 break;
 335         }
 336         return EXCPT_BENIGN;
 337 }
 338
 339 #define EXCPT_FAULT             0
 340 #define EXCPT_TRAP              1
 341 #define EXCPT_ABORT             2
 342 #define EXCPT_INTERRUPT         3
 343
 344 static int exception_type(int vector)
 345 {
 346         unsigned int mask;
 347
 348         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 349                 return EXCPT_INTERRUPT;
 350
 351         mask = 1 << vector;
 352
 353         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 354         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 355                 return EXCPT_TRAP;
 356
 357         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 358                 return EXCPT_ABORT;
 359
 360         /* Reserved exceptions will result in fault */
 361         return EXCPT_FAULT;
 362 }
 363
 364 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 365                 unsigned nr, bool has_error, u32 error_code,
 366                 bool reinject)
 367 {
 368         u32 prev_nr;
 369         int class1, class2;
 370
 371         kvm_make_request(KVM_REQ_EVENT, vcpu);
 372
 373         if (!vcpu->arch.exception.pending) {
 374         queue:
 375                 if (has_error && !is_protmode(vcpu))
 376                         has_error = false;
 377                 vcpu->arch.exception.pending = true;
 378                 vcpu->arch.exception.has_error_code = has_error;
 379                 vcpu->arch.exception.nr = nr;
 380                 vcpu->arch.exception.error_code = error_code;
 381                 vcpu->arch.exception.reinject = reinject;
 382                 return;
 383         }
 384
 385         /* to check exception */
 386         prev_nr = vcpu->arch.exception.nr;
 387         if (prev_nr == DF_VECTOR) {
 388                 /* triple fault -> shutdown */
 389                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 390                 return;
 391         }
 392         class1 = exception_class(prev_nr);
 393         class2 = exception_class(nr);
 394         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 395                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 396                 /* generate double fault per SDM Table 5-5 */
 397                 vcpu->arch.exception.pending = true;
 398                 vcpu->arch.exception.has_error_code = true;
 399                 vcpu->arch.exception.nr = DF_VECTOR;
 400                 vcpu->arch.exception.error_code = 0;
 401         } else
 402                 /* replace previous exception with a new one in a hope
 403                    that instruction re-execution will regenerate lost
 404                    exception */
 405                 goto queue;
 406 }
 407
 408 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 409 {
 410         kvm_multiple_exception(vcpu, nr, false, 0, false);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 413
 414 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 415 {
 416         kvm_multiple_exception(vcpu, nr, false, 0, true);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 419
 420 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 421 {
 422         if (err)
 423                 kvm_inject_gp(vcpu, 0);
 424         else
 425                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 428
 429 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 430 {
 431         ++vcpu->stat.pf_guest;
 432         vcpu->arch.cr2 = fault->address;
 433         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 436
 437 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 438 {
 439         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 440                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 441         else
 442                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 443
 444         return fault->nested_page_fault;
 445 }
 446
 447 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 448 {
 449         atomic_inc(&vcpu->arch.nmi_queued);
 450         kvm_make_request(KVM_REQ_NMI, vcpu);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 453
 454 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 455 {
 456         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 459
 460 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 461 {
 462         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 465
 466 /*
 467  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 468  * a #GP and return false.
 469  */
 470 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 471 {
 472         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 473                 return true;
 474         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 478
 479 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 480 {
 481         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 482                 return true;
 483
 484         kvm_queue_exception(vcpu, UD_VECTOR);
 485         return false;
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_require_dr);
 488
 489 /*
 490  * This function will be used to read from the physical memory of the currently
 491  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 492  * can read from guest physical or from the guest's guest physical memory.
 493  */
 494 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 495                             gfn_t ngfn, void *data, int offset, int len,
 496                             u32 access)
 497 {
 498         struct x86_exception exception;
 499         gfn_t real_gfn;
 500         gpa_t ngpa;
 501
 502         ngpa     = gfn_to_gpa(ngfn);
 503         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 504         if (real_gfn == UNMAPPED_GVA)
 505                 return -EFAULT;
 506
 507         real_gfn = gpa_to_gfn(real_gfn);
 508
 509         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 512
 513 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 514                                void *data, int offset, int len, u32 access)
 515 {
 516         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 517                                        data, offset, len, access);
 518 }
 519
 520 /*
 521  * Load the pae pdptrs.  Return true is they are all valid.
 522  */
 523 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 524 {
 525         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 526         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 527         int i;
 528         int ret;
 529         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 530
 531         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 532                                       offset * sizeof(u64), sizeof(pdpte),
 533                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 534         if (ret < 0) {
 535                 ret = 0;
 536                 goto out;
 537         }
 538         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 539                 if (is_present_gpte(pdpte[i]) &&
 540                     (pdpte[i] &
 541                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 542                         ret = 0;
 543                         goto out;
 544                 }
 545         }
 546         ret = 1;
 547
 548         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 549         __set_bit(VCPU_EXREG_PDPTR,
 550                   (unsigned long *)&vcpu->arch.regs_avail);
 551         __set_bit(VCPU_EXREG_PDPTR,
 552                   (unsigned long *)&vcpu->arch.regs_dirty);
 553 out:
 554
 555         return ret;
 556 }
 557 EXPORT_SYMBOL_GPL(load_pdptrs);
 558
 559 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 560 {
 561         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 562         bool changed = true;
 563         int offset;
 564         gfn_t gfn;
 565         int r;
 566
 567         if (is_long_mode(vcpu) || !is_pae(vcpu))
 568                 return false;
 569
 570         if (!test_bit(VCPU_EXREG_PDPTR,
 571                       (unsigned long *)&vcpu->arch.regs_avail))
 572                 return true;
 573
 574         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 575         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 576         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 577                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 578         if (r < 0)
 579                 goto out;
 580         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 581 out:
 582
 583         return changed;
 584 }
 585
 586 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 587 {
 588         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 589         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 590
 591         cr0 |= X86_CR0_ET;
 592
 593 #ifdef CONFIG_X86_64
 594         if (cr0 & 0xffffffff00000000UL)
 595                 return 1;
 596 #endif
 597
 598         cr0 &= ~CR0_RESERVED_BITS;
 599
 600         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 601                 return 1;
 602
 603         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 604                 return 1;
 605
 606         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 607 #ifdef CONFIG_X86_64
 608                 if ((vcpu->arch.efer & EFER_LME)) {
 609                         int cs_db, cs_l;
 610
 611                         if (!is_pae(vcpu))
 612                                 return 1;
 613                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 614                         if (cs_l)
 615                                 return 1;
 616                 } else
 617 #endif
 618                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 619                                                  kvm_read_cr3(vcpu)))
 620                         return 1;
 621         }
 622
 623         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 624                 return 1;
 625
 626         kvm_x86_ops->set_cr0(vcpu, cr0);
 627
 628         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 629                 kvm_clear_async_pf_completion_queue(vcpu);
 630                 kvm_async_pf_hash_reset(vcpu);
 631         }
 632
 633         if ((cr0 ^ old_cr0) & update_bits)
 634                 kvm_mmu_reset_context(vcpu);
 635
 636         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 637             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 638             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 639                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 640
 641         return 0;
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 644
 645 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 646 {
 647         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_lmsw);
 650
 651 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 652 {
 653         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 654                         !vcpu->guest_xcr0_loaded) {
 655                 /* kvm_set_xcr() also depends on this */
 656                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 657                 vcpu->guest_xcr0_loaded = 1;
 658         }
 659 }
 660
 661 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 662 {
 663         if (vcpu->guest_xcr0_loaded) {
 664                 if (vcpu->arch.xcr0 != host_xcr0)
 665                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 666                 vcpu->guest_xcr0_loaded = 0;
 667         }
 668 }
 669
 670 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 671 {
 672         u64 xcr0 = xcr;
 673         u64 old_xcr0 = vcpu->arch.xcr0;
 674         u64 valid_bits;
 675
 676         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 677         if (index != XCR_XFEATURE_ENABLED_MASK)
 678                 return 1;
 679         if (!(xcr0 & XFEATURE_MASK_FP))
 680                 return 1;
 681         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 682                 return 1;
 683
 684         /*
 685          * Do not allow the guest to set bits that we do not support
 686          * saving.  However, xcr0 bit 0 is always set, even if the
 687          * emulated CPU does not support XSAVE (see fx_init).
 688          */
 689         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 690         if (xcr0 & ~valid_bits)
 691                 return 1;
 692
 693         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 694             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 695                 return 1;
 696
 697         if (xcr0 & XFEATURE_MASK_AVX512) {
 698                 if (!(xcr0 & XFEATURE_MASK_YMM))
 699                         return 1;
 700                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 701                         return 1;
 702         }
 703         kvm_put_guest_xcr0(vcpu);
 704         vcpu->arch.xcr0 = xcr0;
 705
 706         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 707                 kvm_update_cpuid(vcpu);
 708         return 0;
 709 }
 710
 711 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 712 {
 713         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 714             __kvm_set_xcr(vcpu, index, xcr)) {
 715                 kvm_inject_gp(vcpu, 0);
 716                 return 1;
 717         }
 718         return 0;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 721
 722 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 723 {
 724         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 725         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 726                                    X86_CR4_SMEP | X86_CR4_SMAP;
 727
 728         if (cr4 & CR4_RESERVED_BITS)
 729                 return 1;
 730
 731         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 732                 return 1;
 733
 734         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 735                 return 1;
 736
 737         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 738                 return 1;
 739
 740         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 741                 return 1;
 742
 743         if (is_long_mode(vcpu)) {
 744                 if (!(cr4 & X86_CR4_PAE))
 745                         return 1;
 746         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 747                    && ((cr4 ^ old_cr4) & pdptr_bits)
 748                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 749                                    kvm_read_cr3(vcpu)))
 750                 return 1;
 751
 752         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 753                 if (!guest_cpuid_has_pcid(vcpu))
 754                         return 1;
 755
 756                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 757                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 758                         return 1;
 759         }
 760
 761         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 762                 return 1;
 763
 764         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 765             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 766                 kvm_mmu_reset_context(vcpu);
 767
 768         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 769                 kvm_update_cpuid(vcpu);
 770
 771         return 0;
 772 }
 773 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 774
 775 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 776 {
 777 #ifdef CONFIG_X86_64
 778         cr3 &= ~CR3_PCID_INVD;
 779 #endif
 780
 781         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 782                 kvm_mmu_sync_roots(vcpu);
 783                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 784                 return 0;
 785         }
 786
 787         if (is_long_mode(vcpu)) {
 788                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 789                         return 1;
 790         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 791                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 792                 return 1;
 793
 794         vcpu->arch.cr3 = cr3;
 795         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 796         kvm_mmu_new_cr3(vcpu);
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 800
 801 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 802 {
 803         if (cr8 & CR8_RESERVED_BITS)
 804                 return 1;
 805         if (lapic_in_kernel(vcpu))
 806                 kvm_lapic_set_tpr(vcpu, cr8);
 807         else
 808                 vcpu->arch.cr8 = cr8;
 809         return 0;
 810 }
 811 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 812
 813 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 814 {
 815         if (lapic_in_kernel(vcpu))
 816                 return kvm_lapic_get_cr8(vcpu);
 817         else
 818                 return vcpu->arch.cr8;
 819 }
 820 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 821
 822 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 823 {
 824         int i;
 825
 826         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 827                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 828                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 829                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 830         }
 831 }
 832
 833 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 834 {
 835         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 836                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 837 }
 838
 839 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 840 {
 841         unsigned long dr7;
 842
 843         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 844                 dr7 = vcpu->arch.guest_debug_dr7;
 845         else
 846                 dr7 = vcpu->arch.dr7;
 847         kvm_x86_ops->set_dr7(vcpu, dr7);
 848         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 849         if (dr7 & DR7_BP_EN_MASK)
 850                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 851 }
 852
 853 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 854 {
 855         u64 fixed = DR6_FIXED_1;
 856
 857         if (!guest_cpuid_has_rtm(vcpu))
 858                 fixed |= DR6_RTM;
 859         return fixed;
 860 }
 861
 862 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 863 {
 864         switch (dr) {
 865         case 0 ... 3:
 866                 vcpu->arch.db[dr] = val;
 867                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 868                         vcpu->arch.eff_db[dr] = val;
 869                 break;
 870         case 4:
 871                 /* fall through */
 872         case 6:
 873                 if (val & 0xffffffff00000000ULL)
 874                         return -1; /* #GP */
 875                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 876                 kvm_update_dr6(vcpu);
 877                 break;
 878         case 5:
 879                 /* fall through */
 880         default: /* 7 */
 881                 if (val & 0xffffffff00000000ULL)
 882                         return -1; /* #GP */
 883                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 884                 kvm_update_dr7(vcpu);
 885                 break;
 886         }
 887
 888         return 0;
 889 }
 890
 891 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 892 {
 893         if (__kvm_set_dr(vcpu, dr, val)) {
 894                 kvm_inject_gp(vcpu, 0);
 895                 return 1;
 896         }
 897         return 0;
 898 }
 899 EXPORT_SYMBOL_GPL(kvm_set_dr);
 900
 901 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 902 {
 903         switch (dr) {
 904         case 0 ... 3:
 905                 *val = vcpu->arch.db[dr];
 906                 break;
 907         case 4:
 908                 /* fall through */
 909         case 6:
 910                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 911                         *val = vcpu->arch.dr6;
 912                 else
 913                         *val = kvm_x86_ops->get_dr6(vcpu);
 914                 break;
 915         case 5:
 916                 /* fall through */
 917         default: /* 7 */
 918                 *val = vcpu->arch.dr7;
 919                 break;
 920         }
 921         return 0;
 922 }
 923 EXPORT_SYMBOL_GPL(kvm_get_dr);
 924
 925 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 926 {
 927         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 928         u64 data;
 929         int err;
 930
 931         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 932         if (err)
 933                 return err;
 934         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 935         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 936         return err;
 937 }
 938 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 939
 940 /*
 941  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 942  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 943  *
 944  * This list is modified at module load time to reflect the
 945  * capabilities of the host cpu. This capabilities test skips MSRs that are
 946  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 947  * may depend on host virtualization features rather than host cpu features.
 948  */
 949
 950 static u32 msrs_to_save[] = {
 951         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 952         MSR_STAR,
 953 #ifdef CONFIG_X86_64
 954         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 955 #endif
 956         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 957         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 958 };
 959
 960 static unsigned num_msrs_to_save;
 961
 962 static u32 emulated_msrs[] = {
 963         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 964         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 965         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 966         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 967         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 968         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 969         HV_X64_MSR_RESET,
 970         HV_X64_MSR_VP_INDEX,
 971         HV_X64_MSR_VP_RUNTIME,
 972         HV_X64_MSR_SCONTROL,
 973         HV_X64_MSR_STIMER0_CONFIG,
 974         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 975         MSR_KVM_PV_EOI_EN,
 976
 977         MSR_IA32_TSC_ADJUST,
 978         MSR_IA32_TSCDEADLINE,
 979         MSR_IA32_MISC_ENABLE,
 980         MSR_IA32_MCG_STATUS,
 981         MSR_IA32_MCG_CTL,
 982         MSR_IA32_SMBASE,
 983 };
 984
 985 static unsigned num_emulated_msrs;
 986
 987 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 988 {
 989         if (efer & efer_reserved_bits)
 990                 return false;
 991
 992         if (efer & EFER_FFXSR) {
 993                 struct kvm_cpuid_entry2 *feat;
 994
 995                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 996                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 997                         return false;
 998         }
 999
1000         if (efer & EFER_SVME) {
1001                 struct kvm_cpuid_entry2 *feat;
1002
1003                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1004                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1005                         return false;
1006         }
1007
1008         return true;
1009 }
1010 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1011
1012 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1013 {
1014         u64 old_efer = vcpu->arch.efer;
1015
1016         if (!kvm_valid_efer(vcpu, efer))
1017                 return 1;
1018
1019         if (is_paging(vcpu)
1020             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1021                 return 1;
1022
1023         efer &= ~EFER_LMA;
1024         efer |= vcpu->arch.efer & EFER_LMA;
1025
1026         kvm_x86_ops->set_efer(vcpu, efer);
1027
1028         /* Update reserved bits */
1029         if ((efer ^ old_efer) & EFER_NX)
1030                 kvm_mmu_reset_context(vcpu);
1031
1032         return 0;
1033 }
1034
1035 void kvm_enable_efer_bits(u64 mask)
1036 {
1037        efer_reserved_bits &= ~mask;
1038 }
1039 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1040
1041 /*
1042  * Writes msr value into into the appropriate "register".
1043  * Returns 0 on success, non-0 otherwise.
1044  * Assumes vcpu_load() was already called.
1045  */
1046 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1047 {
1048         switch (msr->index) {
1049         case MSR_FS_BASE:
1050         case MSR_GS_BASE:
1051         case MSR_KERNEL_GS_BASE:
1052         case MSR_CSTAR:
1053         case MSR_LSTAR:
1054                 if (is_noncanonical_address(msr->data))
1055                         return 1;
1056                 break;
1057         case MSR_IA32_SYSENTER_EIP:
1058         case MSR_IA32_SYSENTER_ESP:
1059                 /*
1060                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1061                  * non-canonical address is written on Intel but not on
1062                  * AMD (which ignores the top 32-bits, because it does
1063                  * not implement 64-bit SYSENTER).
1064                  *
1065                  * 64-bit code should hence be able to write a non-canonical
1066                  * value on AMD.  Making the address canonical ensures that
1067                  * vmentry does not fail on Intel after writing a non-canonical
1068                  * value, and that something deterministic happens if the guest
1069                  * invokes 64-bit SYSENTER.
1070                  */
1071                 msr->data = get_canonical(msr->data);
1072         }
1073         return kvm_x86_ops->set_msr(vcpu, msr);
1074 }
1075 EXPORT_SYMBOL_GPL(kvm_set_msr);
1076
1077 /*
1078  * Adapt set_msr() to msr_io()'s calling convention
1079  */
1080 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1081 {
1082         struct msr_data msr;
1083         int r;
1084
1085         msr.index = index;
1086         msr.host_initiated = true;
1087         r = kvm_get_msr(vcpu, &msr);
1088         if (r)
1089                 return r;
1090
1091         *data = msr.data;
1092         return 0;
1093 }
1094
1095 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1096 {
1097         struct msr_data msr;
1098
1099         msr.data = *data;
1100         msr.index = index;
1101         msr.host_initiated = true;
1102         return kvm_set_msr(vcpu, &msr);
1103 }
1104
1105 #ifdef CONFIG_X86_64
1106 struct pvclock_gtod_data {
1107         seqcount_t      seq;
1108
1109         struct { /* extract of a clocksource struct */
1110                 int vclock_mode;
1111                 cycle_t cycle_last;
1112                 cycle_t mask;
1113                 u32     mult;
1114                 u32     shift;
1115         } clock;
1116
1117         u64             boot_ns;
1118         u64             nsec_base;
1119 };
1120
1121 static struct pvclock_gtod_data pvclock_gtod_data;
1122
1123 static void update_pvclock_gtod(struct timekeeper *tk)
1124 {
1125         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1126         u64 boot_ns;
1127
1128         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1129
1130         write_seqcount_begin(&vdata->seq);
1131
1132         /* copy pvclock gtod data */
1133         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1134         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1135         vdata->clock.mask               = tk->tkr_mono.mask;
1136         vdata->clock.mult               = tk->tkr_mono.mult;
1137         vdata->clock.shift              = tk->tkr_mono.shift;
1138
1139         vdata->boot_ns                  = boot_ns;
1140         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1141
1142         write_seqcount_end(&vdata->seq);
1143 }
1144 #endif
1145
1146 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1147 {
1148         /*
1149          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1150          * vcpu_enter_guest.  This function is only called from
1151          * the physical CPU that is running vcpu.
1152          */
1153         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1154 }
1155
1156 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1157 {
1158         int version;
1159         int r;
1160         struct pvclock_wall_clock wc;
1161         struct timespec boot;
1162
1163         if (!wall_clock)
1164                 return;
1165
1166         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1167         if (r)
1168                 return;
1169
1170         if (version & 1)
1171                 ++version;  /* first time write, random junk */
1172
1173         ++version;
1174
1175         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1176                 return;
1177
1178         /*
1179          * The guest calculates current wall clock time by adding
1180          * system time (updated by kvm_guest_time_update below) to the
1181          * wall clock specified here.  guest system time equals host
1182          * system time for us, thus we must fill in host boot time here.
1183          */
1184         getboottime(&boot);
1185
1186         if (kvm->arch.kvmclock_offset) {
1187                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1188                 boot = timespec_sub(boot, ts);
1189         }
1190         wc.sec = boot.tv_sec;
1191         wc.nsec = boot.tv_nsec;
1192         wc.version = version;
1193
1194         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1195
1196         version++;
1197         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1198 }
1199
1200 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1201 {
1202         do_shl32_div32(dividend, divisor);
1203         return dividend;
1204 }
1205
1206 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1207                                s8 *pshift, u32 *pmultiplier)
1208 {
1209         uint64_t scaled64;
1210         int32_t  shift = 0;
1211         uint64_t tps64;
1212         uint32_t tps32;
1213
1214         tps64 = base_khz * 1000LL;
1215         scaled64 = scaled_khz * 1000LL;
1216         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1217                 tps64 >>= 1;
1218                 shift--;
1219         }
1220
1221         tps32 = (uint32_t)tps64;
1222         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1223                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1224                         scaled64 >>= 1;
1225                 else
1226                         tps32 <<= 1;
1227                 shift++;
1228         }
1229
1230         *pshift = shift;
1231         *pmultiplier = div_frac(scaled64, tps32);
1232
1233         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1234                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1235 }
1236
1237 #ifdef CONFIG_X86_64
1238 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1239 #endif
1240
1241 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1242 static unsigned long max_tsc_khz;
1243
1244 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1245 {
1246         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1247                                    vcpu->arch.virtual_tsc_shift);
1248 }
1249
1250 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1251 {
1252         u64 v = (u64)khz * (1000000 + ppm);
1253         do_div(v, 1000000);
1254         return v;
1255 }
1256
1257 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1258 {
1259         u64 ratio;
1260
1261         /* Guest TSC same frequency as host TSC? */
1262         if (!scale) {
1263                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1264                 return 0;
1265         }
1266
1267         /* TSC scaling supported? */
1268         if (!kvm_has_tsc_control) {
1269                 if (user_tsc_khz > tsc_khz) {
1270                         vcpu->arch.tsc_catchup = 1;
1271                         vcpu->arch.tsc_always_catchup = 1;
1272                         return 0;
1273                 } else {
1274                         WARN(1, "user requested TSC rate below hardware speed\n");
1275                         return -1;
1276                 }
1277         }
1278
1279         /* TSC scaling required  - calculate ratio */
1280         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1281                                 user_tsc_khz, tsc_khz);
1282
1283         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1284                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1285                           user_tsc_khz);
1286                 return -1;
1287         }
1288
1289         vcpu->arch.tsc_scaling_ratio = ratio;
1290         return 0;
1291 }
1292
1293 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1294 {
1295         u32 thresh_lo, thresh_hi;
1296         int use_scaling = 0;
1297
1298         /* tsc_khz can be zero if TSC calibration fails */
1299         if (user_tsc_khz == 0) {
1300                 /* set tsc_scaling_ratio to a safe value */
1301                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1302                 return -1;
1303         }
1304
1305         /* Compute a scale to convert nanoseconds in TSC cycles */
1306         kvm_get_time_scale(user_tsc_khz, NSEC_PER_SEC / 1000,
1307                            &vcpu->arch.virtual_tsc_shift,
1308                            &vcpu->arch.virtual_tsc_mult);
1309         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1310
1311         /*
1312          * Compute the variation in TSC rate which is acceptable
1313          * within the range of tolerance and decide if the
1314          * rate being applied is within that bounds of the hardware
1315          * rate.  If so, no scaling or compensation need be done.
1316          */
1317         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1318         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1319         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1320                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1321                 use_scaling = 1;
1322         }
1323         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1324 }
1325
1326 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1327 {
1328         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1329                                       vcpu->arch.virtual_tsc_mult,
1330                                       vcpu->arch.virtual_tsc_shift);
1331         tsc += vcpu->arch.this_tsc_write;
1332         return tsc;
1333 }
1334
1335 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1336 {
1337 #ifdef CONFIG_X86_64
1338         bool vcpus_matched;
1339         struct kvm_arch *ka = &vcpu->kvm->arch;
1340         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1341
1342         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1343                          atomic_read(&vcpu->kvm->online_vcpus));
1344
1345         /*
1346          * Once the masterclock is enabled, always perform request in
1347          * order to update it.
1348          *
1349          * In order to enable masterclock, the host clocksource must be TSC
1350          * and the vcpus need to have matched TSCs.  When that happens,
1351          * perform request to enable masterclock.
1352          */
1353         if (ka->use_master_clock ||
1354             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1355                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1356
1357         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1358                             atomic_read(&vcpu->kvm->online_vcpus),
1359                             ka->use_master_clock, gtod->clock.vclock_mode);
1360 #endif
1361 }
1362
1363 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1364 {
1365         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1366         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1367 }
1368
1369 /*
1370  * Multiply tsc by a fixed point number represented by ratio.
1371  *
1372  * The most significant 64-N bits (mult) of ratio represent the
1373  * integral part of the fixed point number; the remaining N bits
1374  * (frac) represent the fractional part, ie. ratio represents a fixed
1375  * point number (mult + frac * 2^(-N)).
1376  *
1377  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1378  */
1379 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1380 {
1381         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1382 }
1383
1384 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1385 {
1386         u64 _tsc = tsc;
1387         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1388
1389         if (ratio != kvm_default_tsc_scaling_ratio)
1390                 _tsc = __scale_tsc(ratio, tsc);
1391
1392         return _tsc;
1393 }
1394 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1395
1396 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1397 {
1398         u64 tsc;
1399
1400         tsc = kvm_scale_tsc(vcpu, rdtsc());
1401
1402         return target_tsc - tsc;
1403 }
1404
1405 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1406 {
1407         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1408 }
1409 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1410
1411 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1412 {
1413         struct kvm *kvm = vcpu->kvm;
1414         u64 offset, ns, elapsed;
1415         unsigned long flags;
1416         s64 usdiff;
1417         bool matched;
1418         bool already_matched;
1419         u64 data = msr->data;
1420
1421         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1422         offset = kvm_compute_tsc_offset(vcpu, data);
1423         ns = get_kernel_ns();
1424         elapsed = ns - kvm->arch.last_tsc_nsec;
1425
1426         if (vcpu->arch.virtual_tsc_khz) {
1427                 int faulted = 0;
1428
1429                 /* n.b - signed multiplication and division required */
1430                 usdiff = data - kvm->arch.last_tsc_write;
1431 #ifdef CONFIG_X86_64
1432                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1433 #else
1434                 /* do_div() only does unsigned */
1435                 asm("1: idivl %[divisor]\n"
1436                     "2: xor %%edx, %%edx\n"
1437                     "   movl $0, %[faulted]\n"
1438                     "3:\n"
1439                     ".section .fixup,\"ax\"\n"
1440                     "4: movl $1, %[faulted]\n"
1441                     "   jmp  3b\n"
1442                     ".previous\n"
1443
1444                 _ASM_EXTABLE(1b, 4b)
1445
1446                 : "=A"(usdiff), [faulted] "=r" (faulted)
1447                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1448
1449 #endif
1450                 do_div(elapsed, 1000);
1451                 usdiff -= elapsed;
1452                 if (usdiff < 0)
1453                         usdiff = -usdiff;
1454
1455                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1456                 if (faulted)
1457                         usdiff = USEC_PER_SEC;
1458         } else
1459                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1460
1461         /*
1462          * Special case: TSC write with a small delta (1 second) of virtual
1463          * cycle time against real time is interpreted as an attempt to
1464          * synchronize the CPU.
1465          *
1466          * For a reliable TSC, we can match TSC offsets, and for an unstable
1467          * TSC, we add elapsed time in this computation.  We could let the
1468          * compensation code attempt to catch up if we fall behind, but
1469          * it's better to try to match offsets from the beginning.
1470          */
1471         if (usdiff < USEC_PER_SEC &&
1472             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1473                 if (!check_tsc_unstable()) {
1474                         offset = kvm->arch.cur_tsc_offset;
1475                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1476                 } else {
1477                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1478                         data += delta;
1479                         offset = kvm_compute_tsc_offset(vcpu, data);
1480                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1481                 }
1482                 matched = true;
1483                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1484         } else {
1485                 /*
1486                  * We split periods of matched TSC writes into generations.
1487                  * For each generation, we track the original measured
1488                  * nanosecond time, offset, and write, so if TSCs are in
1489                  * sync, we can match exact offset, and if not, we can match
1490                  * exact software computation in compute_guest_tsc()
1491                  *
1492                  * These values are tracked in kvm->arch.cur_xxx variables.
1493                  */
1494                 kvm->arch.cur_tsc_generation++;
1495                 kvm->arch.cur_tsc_nsec = ns;
1496                 kvm->arch.cur_tsc_write = data;
1497                 kvm->arch.cur_tsc_offset = offset;
1498                 matched = false;
1499                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1500                          kvm->arch.cur_tsc_generation, data);
1501         }
1502
1503         /*
1504          * We also track th most recent recorded KHZ, write and time to
1505          * allow the matching interval to be extended at each write.
1506          */
1507         kvm->arch.last_tsc_nsec = ns;
1508         kvm->arch.last_tsc_write = data;
1509         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1510
1511         vcpu->arch.last_guest_tsc = data;
1512
1513         /* Keep track of which generation this VCPU has synchronized to */
1514         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1515         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1516         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1517
1518         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1519                 update_ia32_tsc_adjust_msr(vcpu, offset);
1520         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1521         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1522
1523         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1524         if (!matched) {
1525                 kvm->arch.nr_vcpus_matched_tsc = 0;
1526         } else if (!already_matched) {
1527                 kvm->arch.nr_vcpus_matched_tsc++;
1528         }
1529
1530         kvm_track_tsc_matching(vcpu);
1531         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1532 }
1533
1534 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1535
1536 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1537                                            s64 adjustment)
1538 {
1539         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1540 }
1541
1542 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1543 {
1544         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1545                 WARN_ON(adjustment < 0);
1546         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1547         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1548 }
1549
1550 #ifdef CONFIG_X86_64
1551
1552 static cycle_t read_tsc(void)
1553 {
1554         cycle_t ret = (cycle_t)rdtsc_ordered();
1555         u64 last = pvclock_gtod_data.clock.cycle_last;
1556
1557         if (likely(ret >= last))
1558                 return ret;
1559
1560         /*
1561          * GCC likes to generate cmov here, but this branch is extremely
1562          * predictable (it's just a funciton of time and the likely is
1563          * very likely) and there's a data dependence, so force GCC
1564          * to generate a branch instead.  I don't barrier() because
1565          * we don't actually need a barrier, and if this function
1566          * ever gets inlined it will generate worse code.
1567          */
1568         asm volatile ("");
1569         return last;
1570 }
1571
1572 static inline u64 vgettsc(cycle_t *cycle_now)
1573 {
1574         long v;
1575         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1576
1577         *cycle_now = read_tsc();
1578
1579         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1580         return v * gtod->clock.mult;
1581 }
1582
1583 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1584 {
1585         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1586         unsigned long seq;
1587         int mode;
1588         u64 ns;
1589
1590         do {
1591                 seq = read_seqcount_begin(&gtod->seq);
1592                 mode = gtod->clock.vclock_mode;
1593                 ns = gtod->nsec_base;
1594                 ns += vgettsc(cycle_now);
1595                 ns >>= gtod->clock.shift;
1596                 ns += gtod->boot_ns;
1597         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1598         *t = ns;
1599
1600         return mode;
1601 }
1602
1603 /* returns true if host is using tsc clocksource */
1604 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1605 {
1606         /* checked again under seqlock below */
1607         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1608                 return false;
1609
1610         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1611 }
1612 #endif
1613
1614 /*
1615  *
1616  * Assuming a stable TSC across physical CPUS, and a stable TSC
1617  * across virtual CPUs, the following condition is possible.
1618  * Each numbered line represents an event visible to both
1619  * CPUs at the next numbered event.
1620  *
1621  * "timespecX" represents host monotonic time. "tscX" represents
1622  * RDTSC value.
1623  *
1624  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1625  *
1626  * 1.  read timespec0,tsc0
1627  * 2.                                   | timespec1 = timespec0 + N
1628  *                                      | tsc1 = tsc0 + M
1629  * 3. transition to guest               | transition to guest
1630  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1631  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1632  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1633  *
1634  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1635  *
1636  *      - ret0 < ret1
1637  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1638  *              ...
1639  *      - 0 < N - M => M < N
1640  *
1641  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1642  * always the case (the difference between two distinct xtime instances
1643  * might be smaller then the difference between corresponding TSC reads,
1644  * when updating guest vcpus pvclock areas).
1645  *
1646  * To avoid that problem, do not allow visibility of distinct
1647  * system_timestamp/tsc_timestamp values simultaneously: use a master
1648  * copy of host monotonic time values. Update that master copy
1649  * in lockstep.
1650  *
1651  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1652  *
1653  */
1654
1655 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1656 {
1657 #ifdef CONFIG_X86_64
1658         struct kvm_arch *ka = &kvm->arch;
1659         int vclock_mode;
1660         bool host_tsc_clocksource, vcpus_matched;
1661
1662         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1663                         atomic_read(&kvm->online_vcpus));
1664
1665         /*
1666          * If the host uses TSC clock, then passthrough TSC as stable
1667          * to the guest.
1668          */
1669         host_tsc_clocksource = kvm_get_time_and_clockread(
1670                                         &ka->master_kernel_ns,
1671                                         &ka->master_cycle_now);
1672
1673         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1674                                 && !backwards_tsc_observed
1675                                 && !ka->boot_vcpu_runs_old_kvmclock;
1676
1677         if (ka->use_master_clock)
1678                 atomic_set(&kvm_guest_has_master_clock, 1);
1679
1680         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1681         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1682                                         vcpus_matched);
1683 #endif
1684 }
1685
1686 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1687 {
1688         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1689 }
1690
1691 static void kvm_gen_update_masterclock(struct kvm *kvm)
1692 {
1693 #ifdef CONFIG_X86_64
1694         int i;
1695         struct kvm_vcpu *vcpu;
1696         struct kvm_arch *ka = &kvm->arch;
1697
1698         spin_lock(&ka->pvclock_gtod_sync_lock);
1699         kvm_make_mclock_inprogress_request(kvm);
1700         /* no guest entries from this point */
1701         pvclock_update_vm_gtod_copy(kvm);
1702
1703         kvm_for_each_vcpu(i, vcpu, kvm)
1704                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1705
1706         /* guest entries allowed */
1707         kvm_for_each_vcpu(i, vcpu, kvm)
1708                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1709
1710         spin_unlock(&ka->pvclock_gtod_sync_lock);
1711 #endif
1712 }
1713
1714 static int kvm_guest_time_update(struct kvm_vcpu *v)
1715 {
1716         unsigned long flags, tgt_tsc_khz;
1717         struct kvm_vcpu_arch *vcpu = &v->arch;
1718         struct kvm_arch *ka = &v->kvm->arch;
1719         s64 kernel_ns;
1720         u64 tsc_timestamp, host_tsc;
1721         struct pvclock_vcpu_time_info guest_hv_clock;
1722         u8 pvclock_flags;
1723         bool use_master_clock;
1724
1725         kernel_ns = 0;
1726         host_tsc = 0;
1727
1728         /*
1729          * If the host uses TSC clock, then passthrough TSC as stable
1730          * to the guest.
1731          */
1732         spin_lock(&ka->pvclock_gtod_sync_lock);
1733         use_master_clock = ka->use_master_clock;
1734         if (use_master_clock) {
1735                 host_tsc = ka->master_cycle_now;
1736                 kernel_ns = ka->master_kernel_ns;
1737         }
1738         spin_unlock(&ka->pvclock_gtod_sync_lock);
1739
1740         /* Keep irq disabled to prevent changes to the clock */
1741         local_irq_save(flags);
1742         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1743         if (unlikely(tgt_tsc_khz == 0)) {
1744                 local_irq_restore(flags);
1745                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1746                 return 1;
1747         }
1748         if (!use_master_clock) {
1749                 host_tsc = rdtsc();
1750                 kernel_ns = get_kernel_ns();
1751         }
1752
1753         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1754
1755         /*
1756          * We may have to catch up the TSC to match elapsed wall clock
1757          * time for two reasons, even if kvmclock is used.
1758          *   1) CPU could have been running below the maximum TSC rate
1759          *   2) Broken TSC compensation resets the base at each VCPU
1760          *      entry to avoid unknown leaps of TSC even when running
1761          *      again on the same CPU.  This may cause apparent elapsed
1762          *      time to disappear, and the guest to stand still or run
1763          *      very slowly.
1764          */
1765         if (vcpu->tsc_catchup) {
1766                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1767                 if (tsc > tsc_timestamp) {
1768                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1769                         tsc_timestamp = tsc;
1770                 }
1771         }
1772
1773         local_irq_restore(flags);
1774
1775         if (!vcpu->pv_time_enabled)
1776                 return 0;
1777
1778         if (kvm_has_tsc_control)
1779                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1780
1781         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1782                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1783                                    &vcpu->hv_clock.tsc_shift,
1784                                    &vcpu->hv_clock.tsc_to_system_mul);
1785                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1786         }
1787
1788         /* With all the info we got, fill in the values */
1789         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1790         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1791         vcpu->last_guest_tsc = tsc_timestamp;
1792
1793         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1794                 &guest_hv_clock, sizeof(guest_hv_clock))))
1795                 return 0;
1796
1797         /* This VCPU is paused, but it's legal for a guest to read another
1798          * VCPU's kvmclock, so we really have to follow the specification where
1799          * it says that version is odd if data is being modified, and even after
1800          * it is consistent.
1801          *
1802          * Version field updates must be kept separate.  This is because
1803          * kvm_write_guest_cached might use a "rep movs" instruction, and
1804          * writes within a string instruction are weakly ordered.  So there
1805          * are three writes overall.
1806          *
1807          * As a small optimization, only write the version field in the first
1808          * and third write.  The vcpu->pv_time cache is still valid, because the
1809          * version field is the first in the struct.
1810          */
1811         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1812
1813         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1814         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1815                                 &vcpu->hv_clock,
1816                                 sizeof(vcpu->hv_clock.version));
1817
1818         smp_wmb();
1819
1820         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1821         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1822
1823         if (vcpu->pvclock_set_guest_stopped_request) {
1824                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1825                 vcpu->pvclock_set_guest_stopped_request = false;
1826         }
1827
1828         /* If the host uses TSC clocksource, then it is stable */
1829         if (use_master_clock)
1830                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1831
1832         vcpu->hv_clock.flags = pvclock_flags;
1833
1834         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1835
1836         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1837                                 &vcpu->hv_clock,
1838                                 sizeof(vcpu->hv_clock));
1839
1840         smp_wmb();
1841
1842         vcpu->hv_clock.version++;
1843         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1844                                 &vcpu->hv_clock,
1845                                 sizeof(vcpu->hv_clock.version));
1846         return 0;
1847 }
1848
1849 /*
1850  * kvmclock updates which are isolated to a given vcpu, such as
1851  * vcpu->cpu migration, should not allow system_timestamp from
1852  * the rest of the vcpus to remain static. Otherwise ntp frequency
1853  * correction applies to one vcpu's system_timestamp but not
1854  * the others.
1855  *
1856  * So in those cases, request a kvmclock update for all vcpus.
1857  * We need to rate-limit these requests though, as they can
1858  * considerably slow guests that have a large number of vcpus.
1859  * The time for a remote vcpu to update its kvmclock is bound
1860  * by the delay we use to rate-limit the updates.
1861  */
1862
1863 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1864
1865 static void kvmclock_update_fn(struct work_struct *work)
1866 {
1867         int i;
1868         struct delayed_work *dwork = to_delayed_work(work);
1869         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1870                                            kvmclock_update_work);
1871         struct kvm *kvm = container_of(ka, struct kvm, arch);
1872         struct kvm_vcpu *vcpu;
1873
1874         kvm_for_each_vcpu(i, vcpu, kvm) {
1875                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1876                 kvm_vcpu_kick(vcpu);
1877         }
1878 }
1879
1880 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1881 {
1882         struct kvm *kvm = v->kvm;
1883
1884         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1885         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1886                                         KVMCLOCK_UPDATE_DELAY);
1887 }
1888
1889 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1890
1891 static void kvmclock_sync_fn(struct work_struct *work)
1892 {
1893         struct delayed_work *dwork = to_delayed_work(work);
1894         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1895                                            kvmclock_sync_work);
1896         struct kvm *kvm = container_of(ka, struct kvm, arch);
1897
1898         if (!kvmclock_periodic_sync)
1899                 return;
1900
1901         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1902         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1903                                         KVMCLOCK_SYNC_PERIOD);
1904 }
1905
1906 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1907 {
1908         u64 mcg_cap = vcpu->arch.mcg_cap;
1909         unsigned bank_num = mcg_cap & 0xff;
1910
1911         switch (msr) {
1912         case MSR_IA32_MCG_STATUS:
1913                 vcpu->arch.mcg_status = data;
1914                 break;
1915         case MSR_IA32_MCG_CTL:
1916                 if (!(mcg_cap & MCG_CTL_P))
1917                         return 1;
1918                 if (data != 0 && data != ~(u64)0)
1919                         return -1;
1920                 vcpu->arch.mcg_ctl = data;
1921                 break;
1922         default:
1923                 if (msr >= MSR_IA32_MC0_CTL &&
1924                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1925                         u32 offset = msr - MSR_IA32_MC0_CTL;
1926                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1927                          * some Linux kernels though clear bit 10 in bank 4 to
1928                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1929                          * this to avoid an uncatched #GP in the guest
1930                          */
1931                         if ((offset & 0x3) == 0 &&
1932                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1933                                 return -1;
1934                         vcpu->arch.mce_banks[offset] = data;
1935                         break;
1936                 }
1937                 return 1;
1938         }
1939         return 0;
1940 }
1941
1942 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1943 {
1944         struct kvm *kvm = vcpu->kvm;
1945         int lm = is_long_mode(vcpu);
1946         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1947                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1948         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1949                 : kvm->arch.xen_hvm_config.blob_size_32;
1950         u32 page_num = data & ~PAGE_MASK;
1951         u64 page_addr = data & PAGE_MASK;
1952         u8 *page;
1953         int r;
1954
1955         r = -E2BIG;
1956         if (page_num >= blob_size)
1957                 goto out;
1958         r = -ENOMEM;
1959         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1960         if (IS_ERR(page)) {
1961                 r = PTR_ERR(page);
1962                 goto out;
1963         }
1964         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1965                 goto out_free;
1966         r = 0;
1967 out_free:
1968         kfree(page);
1969 out:
1970         return r;
1971 }
1972
1973 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1974 {
1975         gpa_t gpa = data & ~0x3f;
1976
1977         /* Bits 2:5 are reserved, Should be zero */
1978         if (data & 0x3c)
1979                 return 1;
1980
1981         vcpu->arch.apf.msr_val = data;
1982
1983         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1984                 kvm_clear_async_pf_completion_queue(vcpu);
1985                 kvm_async_pf_hash_reset(vcpu);
1986                 return 0;
1987         }
1988
1989         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1990                                         sizeof(u32)))
1991                 return 1;
1992
1993         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1994         kvm_async_pf_wakeup_all(vcpu);
1995         return 0;
1996 }
1997
1998 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1999 {
2000         vcpu->arch.pv_time_enabled = false;
2001 }
2002
2003 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2004 {
2005         u64 delta;
2006
2007         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2008                 return;
2009
2010         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2011         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2012         vcpu->arch.st.accum_steal = delta;
2013 }
2014
2015 static void record_steal_time(struct kvm_vcpu *vcpu)
2016 {
2017         accumulate_steal_time(vcpu);
2018
2019         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2020                 return;
2021
2022         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2023                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2024                 return;
2025
2026         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2027         vcpu->arch.st.steal.version += 2;
2028         vcpu->arch.st.accum_steal = 0;
2029
2030         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2031                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2032 }
2033
2034 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2035 {
2036         bool pr = false;
2037         u32 msr = msr_info->index;
2038         u64 data = msr_info->data;
2039
2040         switch (msr) {
2041         case MSR_AMD64_NB_CFG:
2042         case MSR_IA32_UCODE_REV:
2043         case MSR_IA32_UCODE_WRITE:
2044         case MSR_VM_HSAVE_PA:
2045         case MSR_AMD64_PATCH_LOADER:
2046         case MSR_AMD64_BU_CFG2:
2047                 break;
2048
2049         case MSR_EFER:
2050                 return set_efer(vcpu, data);
2051         case MSR_K7_HWCR:
2052                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2053                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2054                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2055                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2056                 if (data != 0) {
2057                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2058                                     data);
2059                         return 1;
2060                 }
2061                 break;
2062         case MSR_FAM10H_MMIO_CONF_BASE:
2063                 if (data != 0) {
2064                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2065                                     "0x%llx\n", data);
2066                         return 1;
2067                 }
2068                 break;
2069         case MSR_IA32_DEBUGCTLMSR:
2070                 if (!data) {
2071                         /* We support the non-activated case already */
2072                         break;
2073                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2074                         /* Values other than LBR and BTF are vendor-specific,
2075                            thus reserved and should throw a #GP */
2076                         return 1;
2077                 }
2078                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2079                             __func__, data);
2080                 break;
2081         case 0x200 ... 0x2ff:
2082                 return kvm_mtrr_set_msr(vcpu, msr, data);
2083         case MSR_IA32_APICBASE:
2084                 return kvm_set_apic_base(vcpu, msr_info);
2085         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2086                 return kvm_x2apic_msr_write(vcpu, msr, data);
2087         case MSR_IA32_TSCDEADLINE:
2088                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2089                 break;
2090         case MSR_IA32_TSC_ADJUST:
2091                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2092                         if (!msr_info->host_initiated) {
2093                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2094                                 adjust_tsc_offset_guest(vcpu, adj);
2095                         }
2096                         vcpu->arch.ia32_tsc_adjust_msr = data;
2097                 }
2098                 break;
2099         case MSR_IA32_MISC_ENABLE:
2100                 vcpu->arch.ia32_misc_enable_msr = data;
2101                 break;
2102         case MSR_IA32_SMBASE:
2103                 if (!msr_info->host_initiated)
2104                         return 1;
2105                 vcpu->arch.smbase = data;
2106                 break;
2107         case MSR_KVM_WALL_CLOCK_NEW:
2108         case MSR_KVM_WALL_CLOCK:
2109                 vcpu->kvm->arch.wall_clock = data;
2110                 kvm_write_wall_clock(vcpu->kvm, data);
2111                 break;
2112         case MSR_KVM_SYSTEM_TIME_NEW:
2113         case MSR_KVM_SYSTEM_TIME: {
2114                 u64 gpa_offset;
2115                 struct kvm_arch *ka = &vcpu->kvm->arch;
2116
2117                 kvmclock_reset(vcpu);
2118
2119                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2120                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2121
2122                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2123                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2124                                         &vcpu->requests);
2125
2126                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2127                 }
2128
2129                 vcpu->arch.time = data;
2130                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2131
2132                 /* we verify if the enable bit is set... */
2133                 if (!(data & 1))
2134                         break;
2135
2136                 gpa_offset = data & ~(PAGE_MASK | 1);
2137
2138                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2139                      &vcpu->arch.pv_time, data & ~1ULL,
2140                      sizeof(struct pvclock_vcpu_time_info)))
2141                         vcpu->arch.pv_time_enabled = false;
2142                 else
2143                         vcpu->arch.pv_time_enabled = true;
2144
2145                 break;
2146         }
2147         case MSR_KVM_ASYNC_PF_EN:
2148                 if (kvm_pv_enable_async_pf(vcpu, data))
2149                         return 1;
2150                 break;
2151         case MSR_KVM_STEAL_TIME:
2152
2153                 if (unlikely(!sched_info_on()))
2154                         return 1;
2155
2156                 if (data & KVM_STEAL_RESERVED_MASK)
2157                         return 1;
2158
2159                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2160                                                 data & KVM_STEAL_VALID_BITS,
2161                                                 sizeof(struct kvm_steal_time)))
2162                         return 1;
2163
2164                 vcpu->arch.st.msr_val = data;
2165
2166                 if (!(data & KVM_MSR_ENABLED))
2167                         break;
2168
2169                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2170
2171                 break;
2172         case MSR_KVM_PV_EOI_EN:
2173                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2174                         return 1;
2175                 break;
2176
2177         case MSR_IA32_MCG_CTL:
2178         case MSR_IA32_MCG_STATUS:
2179         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2180                 return set_msr_mce(vcpu, msr, data);
2181
2182         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2183         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2184                 pr = true; /* fall through */
2185         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2186         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2187                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2188                         return kvm_pmu_set_msr(vcpu, msr_info);
2189
2190                 if (pr || data != 0)
2191                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2192                                     "0x%x data 0x%llx\n", msr, data);
2193                 break;
2194         case MSR_K7_CLK_CTL:
2195                 /*
2196                  * Ignore all writes to this no longer documented MSR.
2197                  * Writes are only relevant for old K7 processors,
2198                  * all pre-dating SVM, but a recommended workaround from
2199                  * AMD for these chips. It is possible to specify the
2200                  * affected processor models on the command line, hence
2201                  * the need to ignore the workaround.
2202                  */
2203                 break;
2204         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2205         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2206         case HV_X64_MSR_CRASH_CTL:
2207         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2208                 return kvm_hv_set_msr_common(vcpu, msr, data,
2209                                              msr_info->host_initiated);
2210         case MSR_IA32_BBL_CR_CTL3:
2211                 /* Drop writes to this legacy MSR -- see rdmsr
2212                  * counterpart for further detail.
2213                  */
2214                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2215                 break;
2216         case MSR_AMD64_OSVW_ID_LENGTH:
2217                 if (!guest_cpuid_has_osvw(vcpu))
2218                         return 1;
2219                 vcpu->arch.osvw.length = data;
2220                 break;
2221         case MSR_AMD64_OSVW_STATUS:
2222                 if (!guest_cpuid_has_osvw(vcpu))
2223                         return 1;
2224                 vcpu->arch.osvw.status = data;
2225                 break;
2226         default:
2227                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2228                         return xen_hvm_config(vcpu, data);
2229                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2230                         return kvm_pmu_set_msr(vcpu, msr_info);
2231                 if (!ignore_msrs) {
2232                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2233                                     msr, data);
2234                         return 1;
2235                 } else {
2236                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2237                                     msr, data);
2238                         break;
2239                 }
2240         }
2241         return 0;
2242 }
2243 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2244
2245
2246 /*
2247  * Reads an msr value (of 'msr_index') into 'pdata'.
2248  * Returns 0 on success, non-0 otherwise.
2249  * Assumes vcpu_load() was already called.
2250  */
2251 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2252 {
2253         return kvm_x86_ops->get_msr(vcpu, msr);
2254 }
2255 EXPORT_SYMBOL_GPL(kvm_get_msr);
2256
2257 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2258 {
2259         u64 data;
2260         u64 mcg_cap = vcpu->arch.mcg_cap;
2261         unsigned bank_num = mcg_cap & 0xff;
2262
2263         switch (msr) {
2264         case MSR_IA32_P5_MC_ADDR:
2265         case MSR_IA32_P5_MC_TYPE:
2266                 data = 0;
2267                 break;
2268         case MSR_IA32_MCG_CAP:
2269                 data = vcpu->arch.mcg_cap;
2270                 break;
2271         case MSR_IA32_MCG_CTL:
2272                 if (!(mcg_cap & MCG_CTL_P))
2273                         return 1;
2274                 data = vcpu->arch.mcg_ctl;
2275                 break;
2276         case MSR_IA32_MCG_STATUS:
2277                 data = vcpu->arch.mcg_status;
2278                 break;
2279         default:
2280                 if (msr >= MSR_IA32_MC0_CTL &&
2281                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2282                         u32 offset = msr - MSR_IA32_MC0_CTL;
2283                         data = vcpu->arch.mce_banks[offset];
2284                         break;
2285                 }
2286                 return 1;
2287         }
2288         *pdata = data;
2289         return 0;
2290 }
2291
2292 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2293 {
2294         switch (msr_info->index) {
2295         case MSR_IA32_PLATFORM_ID:
2296         case MSR_IA32_EBL_CR_POWERON:
2297         case MSR_IA32_DEBUGCTLMSR:
2298         case MSR_IA32_LASTBRANCHFROMIP:
2299         case MSR_IA32_LASTBRANCHTOIP:
2300         case MSR_IA32_LASTINTFROMIP:
2301         case MSR_IA32_LASTINTTOIP:
2302         case MSR_K8_SYSCFG:
2303         case MSR_K8_TSEG_ADDR:
2304         case MSR_K8_TSEG_MASK:
2305         case MSR_K7_HWCR:
2306         case MSR_VM_HSAVE_PA:
2307         case MSR_K8_INT_PENDING_MSG:
2308         case MSR_AMD64_NB_CFG:
2309         case MSR_FAM10H_MMIO_CONF_BASE:
2310         case MSR_AMD64_BU_CFG2:
2311                 msr_info->data = 0;
2312                 break;
2313         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2314         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2315         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2316         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2317                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2318                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2319                 msr_info->data = 0;
2320                 break;
2321         case MSR_IA32_UCODE_REV:
2322                 msr_info->data = 0x100000000ULL;
2323                 break;
2324         case MSR_MTRRcap:
2325         case 0x200 ... 0x2ff:
2326                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2327         case 0xcd: /* fsb frequency */
2328                 msr_info->data = 3;
2329                 break;
2330                 /*
2331                  * MSR_EBC_FREQUENCY_ID
2332                  * Conservative value valid for even the basic CPU models.
2333                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2334                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2335                  * and 266MHz for model 3, or 4. Set Core Clock
2336                  * Frequency to System Bus Frequency Ratio to 1 (bits
2337                  * 31:24) even though these are only valid for CPU
2338                  * models > 2, however guests may end up dividing or
2339                  * multiplying by zero otherwise.
2340                  */
2341         case MSR_EBC_FREQUENCY_ID:
2342                 msr_info->data = 1 << 24;
2343                 break;
2344         case MSR_IA32_APICBASE:
2345                 msr_info->data = kvm_get_apic_base(vcpu);
2346                 break;
2347         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2348                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2349                 break;
2350         case MSR_IA32_TSCDEADLINE:
2351                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2352                 break;
2353         case MSR_IA32_TSC_ADJUST:
2354                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2355                 break;
2356         case MSR_IA32_MISC_ENABLE:
2357                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2358                 break;
2359         case MSR_IA32_SMBASE:
2360                 if (!msr_info->host_initiated)
2361                         return 1;
2362                 msr_info->data = vcpu->arch.smbase;
2363                 break;
2364         case MSR_IA32_PERF_STATUS:
2365                 /* TSC increment by tick */
2366                 msr_info->data = 1000ULL;
2367                 /* CPU multiplier */
2368                 msr_info->data |= (((uint64_t)4ULL) << 40);
2369                 break;
2370         case MSR_EFER:
2371                 msr_info->data = vcpu->arch.efer;
2372                 break;
2373         case MSR_KVM_WALL_CLOCK:
2374         case MSR_KVM_WALL_CLOCK_NEW:
2375                 msr_info->data = vcpu->kvm->arch.wall_clock;
2376                 break;
2377         case MSR_KVM_SYSTEM_TIME:
2378         case MSR_KVM_SYSTEM_TIME_NEW:
2379                 msr_info->data = vcpu->arch.time;
2380                 break;
2381         case MSR_KVM_ASYNC_PF_EN:
2382                 msr_info->data = vcpu->arch.apf.msr_val;
2383                 break;
2384         case MSR_KVM_STEAL_TIME:
2385                 msr_info->data = vcpu->arch.st.msr_val;
2386                 break;
2387         case MSR_KVM_PV_EOI_EN:
2388                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2389                 break;
2390         case MSR_IA32_P5_MC_ADDR:
2391         case MSR_IA32_P5_MC_TYPE:
2392         case MSR_IA32_MCG_CAP:
2393         case MSR_IA32_MCG_CTL:
2394         case MSR_IA32_MCG_STATUS:
2395         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2396                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2397         case MSR_K7_CLK_CTL:
2398                 /*
2399                  * Provide expected ramp-up count for K7. All other
2400                  * are set to zero, indicating minimum divisors for
2401                  * every field.
2402                  *
2403                  * This prevents guest kernels on AMD host with CPU
2404                  * type 6, model 8 and higher from exploding due to
2405                  * the rdmsr failing.
2406                  */
2407                 msr_info->data = 0x20000000;
2408                 break;
2409         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2410         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2411         case HV_X64_MSR_CRASH_CTL:
2412         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2413                 return kvm_hv_get_msr_common(vcpu,
2414                                              msr_info->index, &msr_info->data);
2415                 break;
2416         case MSR_IA32_BBL_CR_CTL3:
2417                 /* This legacy MSR exists but isn't fully documented in current
2418                  * silicon.  It is however accessed by winxp in very narrow
2419                  * scenarios where it sets bit #19, itself documented as
2420                  * a "reserved" bit.  Best effort attempt to source coherent
2421                  * read data here should the balance of the register be
2422                  * interpreted by the guest:
2423                  *
2424                  * L2 cache control register 3: 64GB range, 256KB size,
2425                  * enabled, latency 0x1, configured
2426                  */
2427                 msr_info->data = 0xbe702111;
2428                 break;
2429         case MSR_AMD64_OSVW_ID_LENGTH:
2430                 if (!guest_cpuid_has_osvw(vcpu))
2431                         return 1;
2432                 msr_info->data = vcpu->arch.osvw.length;
2433                 break;
2434         case MSR_AMD64_OSVW_STATUS:
2435                 if (!guest_cpuid_has_osvw(vcpu))
2436                         return 1;
2437                 msr_info->data = vcpu->arch.osvw.status;
2438                 break;
2439         default:
2440                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2441                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2442                 if (!ignore_msrs) {
2443                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2444                         return 1;
2445                 } else {
2446                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2447                         msr_info->data = 0;
2448                 }
2449                 break;
2450         }
2451         return 0;
2452 }
2453 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2454
2455 /*
2456  * Read or write a bunch of msrs. All parameters are kernel addresses.
2457  *
2458  * @return number of msrs set successfully.
2459  */
2460 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2461                     struct kvm_msr_entry *entries,
2462                     int (*do_msr)(struct kvm_vcpu *vcpu,
2463                                   unsigned index, u64 *data))
2464 {
2465         int i, idx;
2466
2467         idx = srcu_read_lock(&vcpu->kvm->srcu);
2468         for (i = 0; i < msrs->nmsrs; ++i)
2469                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2470                         break;
2471         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2472
2473         return i;
2474 }
2475
2476 /*
2477  * Read or write a bunch of msrs. Parameters are user addresses.
2478  *
2479  * @return number of msrs set successfully.
2480  */
2481 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2482                   int (*do_msr)(struct kvm_vcpu *vcpu,
2483                                 unsigned index, u64 *data),
2484                   int writeback)
2485 {
2486         struct kvm_msrs msrs;
2487         struct kvm_msr_entry *entries;
2488         int r, n;
2489         unsigned size;
2490
2491         r = -EFAULT;
2492         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2493                 goto out;
2494
2495         r = -E2BIG;
2496         if (msrs.nmsrs >= MAX_IO_MSRS)
2497                 goto out;
2498
2499         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2500         entries = memdup_user(user_msrs->entries, size);
2501         if (IS_ERR(entries)) {
2502                 r = PTR_ERR(entries);
2503                 goto out;
2504         }
2505
2506         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2507         if (r < 0)
2508                 goto out_free;
2509
2510         r = -EFAULT;
2511         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2512                 goto out_free;
2513
2514         r = n;
2515
2516 out_free:
2517         kfree(entries);
2518 out:
2519         return r;
2520 }
2521
2522 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2523 {
2524         int r;
2525
2526         switch (ext) {
2527         case KVM_CAP_IRQCHIP:
2528         case KVM_CAP_HLT:
2529         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2530         case KVM_CAP_SET_TSS_ADDR:
2531         case KVM_CAP_EXT_CPUID:
2532         case KVM_CAP_EXT_EMUL_CPUID:
2533         case KVM_CAP_CLOCKSOURCE:
2534         case KVM_CAP_PIT:
2535         case KVM_CAP_NOP_IO_DELAY:
2536         case KVM_CAP_MP_STATE:
2537         case KVM_CAP_SYNC_MMU:
2538         case KVM_CAP_USER_NMI:
2539         case KVM_CAP_REINJECT_CONTROL:
2540         case KVM_CAP_IRQ_INJECT_STATUS:
2541         case KVM_CAP_IOEVENTFD:
2542         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2543         case KVM_CAP_PIT2:
2544         case KVM_CAP_PIT_STATE2:
2545         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2546         case KVM_CAP_XEN_HVM:
2547         case KVM_CAP_ADJUST_CLOCK:
2548         case KVM_CAP_VCPU_EVENTS:
2549         case KVM_CAP_HYPERV:
2550         case KVM_CAP_HYPERV_VAPIC:
2551         case KVM_CAP_HYPERV_SPIN:
2552         case KVM_CAP_HYPERV_SYNIC:
2553         case KVM_CAP_PCI_SEGMENT:
2554         case KVM_CAP_DEBUGREGS:
2555         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2556         case KVM_CAP_XSAVE:
2557         case KVM_CAP_ASYNC_PF:
2558         case KVM_CAP_GET_TSC_KHZ:
2559         case KVM_CAP_KVMCLOCK_CTRL:
2560         case KVM_CAP_READONLY_MEM:
2561         case KVM_CAP_HYPERV_TIME:
2562         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2563         case KVM_CAP_TSC_DEADLINE_TIMER:
2564         case KVM_CAP_ENABLE_CAP_VM:
2565         case KVM_CAP_DISABLE_QUIRKS:
2566         case KVM_CAP_SET_BOOT_CPU_ID:
2567         case KVM_CAP_SPLIT_IRQCHIP:
2568 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2569         case KVM_CAP_ASSIGN_DEV_IRQ:
2570         case KVM_CAP_PCI_2_3:
2571 #endif
2572                 r = 1;
2573                 break;
2574         case KVM_CAP_X86_SMM:
2575                 /* SMBASE is usually relocated above 1M on modern chipsets,
2576                  * and SMM handlers might indeed rely on 4G segment limits,
2577                  * so do not report SMM to be available if real mode is
2578                  * emulated via vm86 mode.  Still, do not go to great lengths
2579                  * to avoid userspace's usage of the feature, because it is a
2580                  * fringe case that is not enabled except via specific settings
2581                  * of the module parameters.
2582                  */
2583                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2584                 break;
2585         case KVM_CAP_COALESCED_MMIO:
2586                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2587                 break;
2588         case KVM_CAP_VAPIC:
2589                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2590                 break;
2591         case KVM_CAP_NR_VCPUS:
2592                 r = KVM_SOFT_MAX_VCPUS;
2593                 break;
2594         case KVM_CAP_MAX_VCPUS:
2595                 r = KVM_MAX_VCPUS;
2596                 break;
2597         case KVM_CAP_NR_MEMSLOTS:
2598                 r = KVM_USER_MEM_SLOTS;
2599                 break;
2600         case KVM_CAP_PV_MMU:    /* obsolete */
2601                 r = 0;
2602                 break;
2603 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2604         case KVM_CAP_IOMMU:
2605                 r = iommu_present(&pci_bus_type);
2606                 break;
2607 #endif
2608         case KVM_CAP_MCE:
2609                 r = KVM_MAX_MCE_BANKS;
2610                 break;
2611         case KVM_CAP_XCRS:
2612                 r = cpu_has_xsave;
2613                 break;
2614         case KVM_CAP_TSC_CONTROL:
2615                 r = kvm_has_tsc_control;
2616                 break;
2617         default:
2618                 r = 0;
2619                 break;
2620         }
2621         return r;
2622
2623 }
2624
2625 long kvm_arch_dev_ioctl(struct file *filp,
2626                         unsigned int ioctl, unsigned long arg)
2627 {
2628         void __user *argp = (void __user *)arg;
2629         long r;
2630
2631         switch (ioctl) {
2632         case KVM_GET_MSR_INDEX_LIST: {
2633                 struct kvm_msr_list __user *user_msr_list = argp;
2634                 struct kvm_msr_list msr_list;
2635                 unsigned n;
2636
2637                 r = -EFAULT;
2638                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2639                         goto out;
2640                 n = msr_list.nmsrs;
2641                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2642                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2643                         goto out;
2644                 r = -E2BIG;
2645                 if (n < msr_list.nmsrs)
2646                         goto out;
2647                 r = -EFAULT;
2648                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2649                                  num_msrs_to_save * sizeof(u32)))
2650                         goto out;
2651                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2652                                  &emulated_msrs,
2653                                  num_emulated_msrs * sizeof(u32)))
2654                         goto out;
2655                 r = 0;
2656                 break;
2657         }
2658         case KVM_GET_SUPPORTED_CPUID:
2659         case KVM_GET_EMULATED_CPUID: {
2660                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2661                 struct kvm_cpuid2 cpuid;
2662
2663                 r = -EFAULT;
2664                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2665                         goto out;
2666
2667                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2668                                             ioctl);
2669                 if (r)
2670                         goto out;
2671
2672                 r = -EFAULT;
2673                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2679                 u64 mce_cap;
2680
2681                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2682                 r = -EFAULT;
2683                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2684                         goto out;
2685                 r = 0;
2686                 break;
2687         }
2688         default:
2689                 r = -EINVAL;
2690         }
2691 out:
2692         return r;
2693 }
2694
2695 static void wbinvd_ipi(void *garbage)
2696 {
2697         wbinvd();
2698 }
2699
2700 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2701 {
2702         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2703 }
2704
2705 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2706 {
2707         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2708 }
2709
2710 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2711 {
2712         /* Address WBINVD may be executed by guest */
2713         if (need_emulate_wbinvd(vcpu)) {
2714                 if (kvm_x86_ops->has_wbinvd_exit())
2715                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2716                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2717                         smp_call_function_single(vcpu->cpu,
2718                                         wbinvd_ipi, NULL, 1);
2719         }
2720
2721         kvm_x86_ops->vcpu_load(vcpu, cpu);
2722
2723         /* Apply any externally detected TSC adjustments (due to suspend) */
2724         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2725                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2726                 vcpu->arch.tsc_offset_adjustment = 0;
2727                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2728         }
2729
2730         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2731                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2732                                 rdtsc() - vcpu->arch.last_host_tsc;
2733                 if (tsc_delta < 0)
2734                         mark_tsc_unstable("KVM discovered backwards TSC");
2735                 if (check_tsc_unstable()) {
2736                         u64 offset = kvm_compute_tsc_offset(vcpu,
2737                                                 vcpu->arch.last_guest_tsc);
2738                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2739                         vcpu->arch.tsc_catchup = 1;
2740                 }
2741                 /*
2742                  * On a host with synchronized TSC, there is no need to update
2743                  * kvmclock on vcpu->cpu migration
2744                  */
2745                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2746                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2747                 if (vcpu->cpu != cpu)
2748                         kvm_migrate_timers(vcpu);
2749                 vcpu->cpu = cpu;
2750         }
2751
2752         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2753         vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
2754 }
2755
2756 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2757 {
2758         kvm_x86_ops->vcpu_put(vcpu);
2759         kvm_put_guest_fpu(vcpu);
2760         vcpu->arch.last_host_tsc = rdtsc();
2761 }
2762
2763 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2764                                     struct kvm_lapic_state *s)
2765 {
2766         if (vcpu->arch.apicv_active)
2767                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2768
2769         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2770
2771         return 0;
2772 }
2773
2774 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2775                                     struct kvm_lapic_state *s)
2776 {
2777         kvm_apic_post_state_restore(vcpu, s);
2778         update_cr8_intercept(vcpu);
2779
2780         return 0;
2781 }
2782
2783 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2784 {
2785         return (!lapic_in_kernel(vcpu) ||
2786                 kvm_apic_accept_pic_intr(vcpu));
2787 }
2788
2789 /*
2790  * if userspace requested an interrupt window, check that the
2791  * interrupt window is open.
2792  *
2793  * No need to exit to userspace if we already have an interrupt queued.
2794  */
2795 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2796 {
2797         return kvm_arch_interrupt_allowed(vcpu) &&
2798                 !kvm_cpu_has_interrupt(vcpu) &&
2799                 !kvm_event_needs_reinjection(vcpu) &&
2800                 kvm_cpu_accept_dm_intr(vcpu);
2801 }
2802
2803 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2804                                     struct kvm_interrupt *irq)
2805 {
2806         if (irq->irq >= KVM_NR_INTERRUPTS)
2807                 return -EINVAL;
2808
2809         if (!irqchip_in_kernel(vcpu->kvm)) {
2810                 kvm_queue_interrupt(vcpu, irq->irq, false);
2811                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2812                 return 0;
2813         }
2814
2815         /*
2816          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2817          * fail for in-kernel 8259.
2818          */
2819         if (pic_in_kernel(vcpu->kvm))
2820                 return -ENXIO;
2821
2822         if (vcpu->arch.pending_external_vector != -1)
2823                 return -EEXIST;
2824
2825         vcpu->arch.pending_external_vector = irq->irq;
2826         kvm_make_request(KVM_REQ_EVENT, vcpu);
2827         return 0;
2828 }
2829
2830 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2831 {
2832         kvm_inject_nmi(vcpu);
2833
2834         return 0;
2835 }
2836
2837 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2838 {
2839         kvm_make_request(KVM_REQ_SMI, vcpu);
2840
2841         return 0;
2842 }
2843
2844 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2845                                            struct kvm_tpr_access_ctl *tac)
2846 {
2847         if (tac->flags)
2848                 return -EINVAL;
2849         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2850         return 0;
2851 }
2852
2853 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2854                                         u64 mcg_cap)
2855 {
2856         int r;
2857         unsigned bank_num = mcg_cap & 0xff, bank;
2858
2859         r = -EINVAL;
2860         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2861                 goto out;
2862         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2863                 goto out;
2864         r = 0;
2865         vcpu->arch.mcg_cap = mcg_cap;
2866         /* Init IA32_MCG_CTL to all 1s */
2867         if (mcg_cap & MCG_CTL_P)
2868                 vcpu->arch.mcg_ctl = ~(u64)0;
2869         /* Init IA32_MCi_CTL to all 1s */
2870         for (bank = 0; bank < bank_num; bank++)
2871                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2872 out:
2873         return r;
2874 }
2875
2876 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2877                                       struct kvm_x86_mce *mce)
2878 {
2879         u64 mcg_cap = vcpu->arch.mcg_cap;
2880         unsigned bank_num = mcg_cap & 0xff;
2881         u64 *banks = vcpu->arch.mce_banks;
2882
2883         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2884                 return -EINVAL;
2885         /*
2886          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2887          * reporting is disabled
2888          */
2889         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2890             vcpu->arch.mcg_ctl != ~(u64)0)
2891                 return 0;
2892         banks += 4 * mce->bank;
2893         /*
2894          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2895          * reporting is disabled for the bank
2896          */
2897         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2898                 return 0;
2899         if (mce->status & MCI_STATUS_UC) {
2900                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2901                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2902                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2903                         return 0;
2904                 }
2905                 if (banks[1] & MCI_STATUS_VAL)
2906                         mce->status |= MCI_STATUS_OVER;
2907                 banks[2] = mce->addr;
2908                 banks[3] = mce->misc;
2909                 vcpu->arch.mcg_status = mce->mcg_status;
2910                 banks[1] = mce->status;
2911                 kvm_queue_exception(vcpu, MC_VECTOR);
2912         } else if (!(banks[1] & MCI_STATUS_VAL)
2913                    || !(banks[1] & MCI_STATUS_UC)) {
2914                 if (banks[1] & MCI_STATUS_VAL)
2915                         mce->status |= MCI_STATUS_OVER;
2916                 banks[2] = mce->addr;
2917                 banks[3] = mce->misc;
2918                 banks[1] = mce->status;
2919         } else
2920                 banks[1] |= MCI_STATUS_OVER;
2921         return 0;
2922 }
2923
2924 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2925                                                struct kvm_vcpu_events *events)
2926 {
2927         process_nmi(vcpu);
2928         events->exception.injected =
2929                 vcpu->arch.exception.pending &&
2930                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2931         events->exception.nr = vcpu->arch.exception.nr;
2932         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2933         events->exception.pad = 0;
2934         events->exception.error_code = vcpu->arch.exception.error_code;
2935
2936         events->interrupt.injected =
2937                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2938         events->interrupt.nr = vcpu->arch.interrupt.nr;
2939         events->interrupt.soft = 0;
2940         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2941
2942         events->nmi.injected = vcpu->arch.nmi_injected;
2943         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2944         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2945         events->nmi.pad = 0;
2946
2947         events->sipi_vector = 0; /* never valid when reporting to user space */
2948
2949         events->smi.smm = is_smm(vcpu);
2950         events->smi.pending = vcpu->arch.smi_pending;
2951         events->smi.smm_inside_nmi =
2952                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2953         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2954
2955         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2956                          | KVM_VCPUEVENT_VALID_SHADOW
2957                          | KVM_VCPUEVENT_VALID_SMM);
2958         memset(&events->reserved, 0, sizeof(events->reserved));
2959 }
2960
2961 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2962                                               struct kvm_vcpu_events *events)
2963 {
2964         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2965                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2966                               | KVM_VCPUEVENT_VALID_SHADOW
2967                               | KVM_VCPUEVENT_VALID_SMM))
2968                 return -EINVAL;
2969
2970         process_nmi(vcpu);
2971         vcpu->arch.exception.pending = events->exception.injected;
2972         vcpu->arch.exception.nr = events->exception.nr;
2973         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2974         vcpu->arch.exception.error_code = events->exception.error_code;
2975
2976         vcpu->arch.interrupt.pending = events->interrupt.injected;
2977         vcpu->arch.interrupt.nr = events->interrupt.nr;
2978         vcpu->arch.interrupt.soft = events->interrupt.soft;
2979         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2980                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2981                                                   events->interrupt.shadow);
2982
2983         vcpu->arch.nmi_injected = events->nmi.injected;
2984         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2985                 vcpu->arch.nmi_pending = events->nmi.pending;
2986         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2987
2988         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2989             lapic_in_kernel(vcpu))
2990                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2991
2992         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2993                 if (events->smi.smm)
2994                         vcpu->arch.hflags |= HF_SMM_MASK;
2995                 else
2996                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2997                 vcpu->arch.smi_pending = events->smi.pending;
2998                 if (events->smi.smm_inside_nmi)
2999                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3000                 else
3001                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3002                 if (lapic_in_kernel(vcpu)) {
3003                         if (events->smi.latched_init)
3004                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3005                         else
3006                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3007                 }
3008         }
3009
3010         kvm_make_request(KVM_REQ_EVENT, vcpu);
3011
3012         return 0;
3013 }
3014
3015 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3016                                              struct kvm_debugregs *dbgregs)
3017 {
3018         unsigned long val;
3019
3020         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3021         kvm_get_dr(vcpu, 6, &val);
3022         dbgregs->dr6 = val;
3023         dbgregs->dr7 = vcpu->arch.dr7;
3024         dbgregs->flags = 0;
3025         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3026 }
3027
3028 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3029                                             struct kvm_debugregs *dbgregs)
3030 {
3031         if (dbgregs->flags)
3032                 return -EINVAL;
3033
3034         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3035         kvm_update_dr0123(vcpu);
3036         vcpu->arch.dr6 = dbgregs->dr6;
3037         kvm_update_dr6(vcpu);
3038         vcpu->arch.dr7 = dbgregs->dr7;
3039         kvm_update_dr7(vcpu);
3040
3041         return 0;
3042 }
3043
3044 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3045
3046 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3047 {
3048         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3049         u64 xstate_bv = xsave->header.xfeatures;
3050         u64 valid;
3051
3052         /*
3053          * Copy legacy XSAVE area, to avoid complications with CPUID
3054          * leaves 0 and 1 in the loop below.
3055          */
3056         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3057
3058         /* Set XSTATE_BV */
3059         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3060
3061         /*
3062          * Copy each region from the possibly compacted offset to the
3063          * non-compacted offset.
3064          */
3065         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3066         while (valid) {
3067                 u64 feature = valid & -valid;
3068                 int index = fls64(feature) - 1;
3069                 void *src = get_xsave_addr(xsave, feature);
3070
3071                 if (src) {
3072                         u32 size, offset, ecx, edx;
3073                         cpuid_count(XSTATE_CPUID, index,
3074                                     &size, &offset, &ecx, &edx);
3075                         memcpy(dest + offset, src, size);
3076                 }
3077
3078                 valid -= feature;
3079         }
3080 }
3081
3082 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3083 {
3084         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3085         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3086         u64 valid;
3087
3088         /*
3089          * Copy legacy XSAVE area, to avoid complications with CPUID
3090          * leaves 0 and 1 in the loop below.
3091          */
3092         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3093
3094         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3095         xsave->header.xfeatures = xstate_bv;
3096         if (cpu_has_xsaves)
3097                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3098
3099         /*
3100          * Copy each region from the non-compacted offset to the
3101          * possibly compacted offset.
3102          */
3103         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3104         while (valid) {
3105                 u64 feature = valid & -valid;
3106                 int index = fls64(feature) - 1;
3107                 void *dest = get_xsave_addr(xsave, feature);
3108
3109                 if (dest) {
3110                         u32 size, offset, ecx, edx;
3111                         cpuid_count(XSTATE_CPUID, index,
3112                                     &size, &offset, &ecx, &edx);
3113                         memcpy(dest, src + offset, size);
3114                 }
3115
3116                 valid -= feature;
3117         }
3118 }
3119
3120 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3121                                          struct kvm_xsave *guest_xsave)
3122 {
3123         if (cpu_has_xsave) {
3124                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3125                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3126         } else {
3127                 memcpy(guest_xsave->region,
3128                         &vcpu->arch.guest_fpu.state.fxsave,
3129                         sizeof(struct fxregs_state));
3130                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3131                         XFEATURE_MASK_FPSSE;
3132         }
3133 }
3134
3135 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3136                                         struct kvm_xsave *guest_xsave)
3137 {
3138         u64 xstate_bv =
3139                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3140
3141         if (cpu_has_xsave) {
3142                 /*
3143                  * Here we allow setting states that are not present in
3144                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3145                  * with old userspace.
3146                  */
3147                 if (xstate_bv & ~kvm_supported_xcr0())
3148                         return -EINVAL;
3149                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3150         } else {
3151                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3152                         return -EINVAL;
3153                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3154                         guest_xsave->region, sizeof(struct fxregs_state));
3155         }
3156         return 0;
3157 }
3158
3159 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3160                                         struct kvm_xcrs *guest_xcrs)
3161 {
3162         if (!cpu_has_xsave) {
3163                 guest_xcrs->nr_xcrs = 0;
3164                 return;
3165         }
3166
3167         guest_xcrs->nr_xcrs = 1;
3168         guest_xcrs->flags = 0;
3169         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3170         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3171 }
3172
3173 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3174                                        struct kvm_xcrs *guest_xcrs)
3175 {
3176         int i, r = 0;
3177
3178         if (!cpu_has_xsave)
3179                 return -EINVAL;
3180
3181         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3182                 return -EINVAL;
3183
3184         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3185                 /* Only support XCR0 currently */
3186                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3187                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3188                                 guest_xcrs->xcrs[i].value);
3189                         break;
3190                 }
3191         if (r)
3192                 r = -EINVAL;
3193         return r;
3194 }
3195
3196 /*
3197  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3198  * stopped by the hypervisor.  This function will be called from the host only.
3199  * EINVAL is returned when the host attempts to set the flag for a guest that
3200  * does not support pv clocks.
3201  */
3202 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3203 {
3204         if (!vcpu->arch.pv_time_enabled)
3205                 return -EINVAL;
3206         vcpu->arch.pvclock_set_guest_stopped_request = true;
3207         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3208         return 0;
3209 }
3210
3211 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3212                                      struct kvm_enable_cap *cap)
3213 {
3214         if (cap->flags)
3215                 return -EINVAL;
3216
3217         switch (cap->cap) {
3218         case KVM_CAP_HYPERV_SYNIC:
3219                 return kvm_hv_activate_synic(vcpu);
3220         default:
3221                 return -EINVAL;
3222         }
3223 }
3224
3225 long kvm_arch_vcpu_ioctl(struct file *filp,
3226                          unsigned int ioctl, unsigned long arg)
3227 {
3228         struct kvm_vcpu *vcpu = filp->private_data;
3229         void __user *argp = (void __user *)arg;
3230         int r;
3231         union {
3232                 struct kvm_lapic_state *lapic;
3233                 struct kvm_xsave *xsave;
3234                 struct kvm_xcrs *xcrs;
3235                 void *buffer;
3236         } u;
3237
3238         u.buffer = NULL;
3239         switch (ioctl) {
3240         case KVM_GET_LAPIC: {
3241                 r = -EINVAL;
3242                 if (!lapic_in_kernel(vcpu))
3243                         goto out;
3244                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3245
3246                 r = -ENOMEM;
3247                 if (!u.lapic)
3248                         goto out;
3249                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3250                 if (r)
3251                         goto out;
3252                 r = -EFAULT;
3253                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3254                         goto out;
3255                 r = 0;
3256                 break;
3257         }
3258         case KVM_SET_LAPIC: {
3259                 r = -EINVAL;
3260                 if (!lapic_in_kernel(vcpu))
3261                         goto out;
3262                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3263                 if (IS_ERR(u.lapic))
3264                         return PTR_ERR(u.lapic);
3265
3266                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3267                 break;
3268         }
3269         case KVM_INTERRUPT: {
3270                 struct kvm_interrupt irq;
3271
3272                 r = -EFAULT;
3273                 if (copy_from_user(&irq, argp, sizeof irq))
3274                         goto out;
3275                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3276                 break;
3277         }
3278         case KVM_NMI: {
3279                 r = kvm_vcpu_ioctl_nmi(vcpu);
3280                 break;
3281         }
3282         case KVM_SMI: {
3283                 r = kvm_vcpu_ioctl_smi(vcpu);
3284                 break;
3285         }
3286         case KVM_SET_CPUID: {
3287                 struct kvm_cpuid __user *cpuid_arg = argp;
3288                 struct kvm_cpuid cpuid;
3289
3290                 r = -EFAULT;
3291                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3292                         goto out;
3293                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3294                 break;
3295         }
3296         case KVM_SET_CPUID2: {
3297                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3298                 struct kvm_cpuid2 cpuid;
3299
3300                 r = -EFAULT;
3301                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3302                         goto out;
3303                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3304                                               cpuid_arg->entries);
3305                 break;
3306         }
3307         case KVM_GET_CPUID2: {
3308                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3309                 struct kvm_cpuid2 cpuid;
3310
3311                 r = -EFAULT;
3312                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3313                         goto out;
3314                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3315                                               cpuid_arg->entries);
3316                 if (r)
3317                         goto out;
3318                 r = -EFAULT;
3319                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3320                         goto out;
3321                 r = 0;
3322                 break;
3323         }
3324         case KVM_GET_MSRS:
3325                 r = msr_io(vcpu, argp, do_get_msr, 1);
3326                 break;
3327         case KVM_SET_MSRS:
3328                 r = msr_io(vcpu, argp, do_set_msr, 0);
3329                 break;
3330         case KVM_TPR_ACCESS_REPORTING: {
3331                 struct kvm_tpr_access_ctl tac;
3332
3333                 r = -EFAULT;
3334                 if (copy_from_user(&tac, argp, sizeof tac))
3335                         goto out;
3336                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3337                 if (r)
3338                         goto out;
3339                 r = -EFAULT;
3340                 if (copy_to_user(argp, &tac, sizeof tac))
3341                         goto out;
3342                 r = 0;
3343                 break;
3344         };
3345         case KVM_SET_VAPIC_ADDR: {
3346                 struct kvm_vapic_addr va;
3347
3348                 r = -EINVAL;
3349                 if (!lapic_in_kernel(vcpu))
3350                         goto out;
3351                 r = -EFAULT;
3352                 if (copy_from_user(&va, argp, sizeof va))
3353                         goto out;
3354                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3355                 break;
3356         }
3357         case KVM_X86_SETUP_MCE: {
3358                 u64 mcg_cap;
3359
3360                 r = -EFAULT;
3361                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3362                         goto out;
3363                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3364                 break;
3365         }
3366         case KVM_X86_SET_MCE: {
3367                 struct kvm_x86_mce mce;
3368
3369                 r = -EFAULT;
3370                 if (copy_from_user(&mce, argp, sizeof mce))
3371                         goto out;
3372                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3373                 break;
3374         }
3375         case KVM_GET_VCPU_EVENTS: {
3376                 struct kvm_vcpu_events events;
3377
3378                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3379
3380                 r = -EFAULT;
3381                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3382                         break;
3383                 r = 0;
3384                 break;
3385         }
3386         case KVM_SET_VCPU_EVENTS: {
3387                 struct kvm_vcpu_events events;
3388
3389                 r = -EFAULT;
3390                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3391                         break;
3392
3393                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3394                 break;
3395         }
3396         case KVM_GET_DEBUGREGS: {
3397                 struct kvm_debugregs dbgregs;
3398
3399                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3400
3401                 r = -EFAULT;
3402                 if (copy_to_user(argp, &dbgregs,
3403                                  sizeof(struct kvm_debugregs)))
3404                         break;
3405                 r = 0;
3406                 break;
3407         }
3408         case KVM_SET_DEBUGREGS: {
3409                 struct kvm_debugregs dbgregs;
3410
3411                 r = -EFAULT;
3412                 if (copy_from_user(&dbgregs, argp,
3413                                    sizeof(struct kvm_debugregs)))
3414                         break;
3415
3416                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3417                 break;
3418         }
3419         case KVM_GET_XSAVE: {
3420                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3421                 r = -ENOMEM;
3422                 if (!u.xsave)
3423                         break;
3424
3425                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3426
3427                 r = -EFAULT;
3428                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3429                         break;
3430                 r = 0;
3431                 break;
3432         }
3433         case KVM_SET_XSAVE: {
3434                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3435                 if (IS_ERR(u.xsave))
3436                         return PTR_ERR(u.xsave);
3437
3438                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3439                 break;
3440         }
3441         case KVM_GET_XCRS: {
3442                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3443                 r = -ENOMEM;
3444                 if (!u.xcrs)
3445                         break;
3446
3447                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3448
3449                 r = -EFAULT;
3450                 if (copy_to_user(argp, u.xcrs,
3451                                  sizeof(struct kvm_xcrs)))
3452                         break;
3453                 r = 0;
3454                 break;
3455         }
3456         case KVM_SET_XCRS: {
3457                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3458                 if (IS_ERR(u.xcrs))
3459                         return PTR_ERR(u.xcrs);
3460
3461                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3462                 break;
3463         }
3464         case KVM_SET_TSC_KHZ: {
3465                 u32 user_tsc_khz;
3466
3467                 r = -EINVAL;
3468                 user_tsc_khz = (u32)arg;
3469
3470                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3471                         goto out;
3472
3473                 if (user_tsc_khz == 0)
3474                         user_tsc_khz = tsc_khz;
3475
3476                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3477                         r = 0;
3478
3479                 goto out;
3480         }
3481         case KVM_GET_TSC_KHZ: {
3482                 r = vcpu->arch.virtual_tsc_khz;
3483                 goto out;
3484         }
3485         case KVM_KVMCLOCK_CTRL: {
3486                 r = kvm_set_guest_paused(vcpu);
3487                 goto out;
3488         }
3489         case KVM_ENABLE_CAP: {
3490                 struct kvm_enable_cap cap;
3491
3492                 r = -EFAULT;
3493                 if (copy_from_user(&cap, argp, sizeof(cap)))
3494                         goto out;
3495                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3496                 break;
3497         }
3498         default:
3499                 r = -EINVAL;
3500         }
3501 out:
3502         kfree(u.buffer);
3503         return r;
3504 }
3505
3506 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3507 {
3508         return VM_FAULT_SIGBUS;
3509 }
3510
3511 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3512 {
3513         int ret;
3514
3515         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3516                 return -EINVAL;
3517         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3518         return ret;
3519 }
3520
3521 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3522                                               u64 ident_addr)
3523 {
3524         kvm->arch.ept_identity_map_addr = ident_addr;
3525         return 0;
3526 }
3527
3528 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3529                                           u32 kvm_nr_mmu_pages)
3530 {
3531         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3532                 return -EINVAL;
3533
3534         mutex_lock(&kvm->slots_lock);
3535
3536         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3537         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3538
3539         mutex_unlock(&kvm->slots_lock);
3540         return 0;
3541 }
3542
3543 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3544 {
3545         return kvm->arch.n_max_mmu_pages;
3546 }
3547
3548 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3549 {
3550         int r;
3551
3552         r = 0;
3553         switch (chip->chip_id) {
3554         case KVM_IRQCHIP_PIC_MASTER:
3555                 memcpy(&chip->chip.pic,
3556                         &pic_irqchip(kvm)->pics[0],
3557                         sizeof(struct kvm_pic_state));
3558                 break;
3559         case KVM_IRQCHIP_PIC_SLAVE:
3560                 memcpy(&chip->chip.pic,
3561                         &pic_irqchip(kvm)->pics[1],
3562                         sizeof(struct kvm_pic_state));
3563                 break;
3564         case KVM_IRQCHIP_IOAPIC:
3565                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3566                 break;
3567         default:
3568                 r = -EINVAL;
3569                 break;
3570         }
3571         return r;
3572 }
3573
3574 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3575 {
3576         int r;
3577
3578         r = 0;
3579         switch (chip->chip_id) {
3580         case KVM_IRQCHIP_PIC_MASTER:
3581                 spin_lock(&pic_irqchip(kvm)->lock);
3582                 memcpy(&pic_irqchip(kvm)->pics[0],
3583                         &chip->chip.pic,
3584                         sizeof(struct kvm_pic_state));
3585                 spin_unlock(&pic_irqchip(kvm)->lock);
3586                 break;
3587         case KVM_IRQCHIP_PIC_SLAVE:
3588                 spin_lock(&pic_irqchip(kvm)->lock);
3589                 memcpy(&pic_irqchip(kvm)->pics[1],
3590                         &chip->chip.pic,
3591                         sizeof(struct kvm_pic_state));
3592                 spin_unlock(&pic_irqchip(kvm)->lock);
3593                 break;
3594         case KVM_IRQCHIP_IOAPIC:
3595                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3596                 break;
3597         default:
3598                 r = -EINVAL;
3599                 break;
3600         }
3601         kvm_pic_update_irq(pic_irqchip(kvm));
3602         return r;
3603 }
3604
3605 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3606 {
3607         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3608         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3609         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3610         return 0;
3611 }
3612
3613 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3614 {
3615         int i;
3616         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3617         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3618         for (i = 0; i < 3; i++)
3619                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3620         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3621         return 0;
3622 }
3623
3624 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3625 {
3626         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3627         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3628                 sizeof(ps->channels));
3629         ps->flags = kvm->arch.vpit->pit_state.flags;
3630         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3631         memset(&ps->reserved, 0, sizeof(ps->reserved));
3632         return 0;
3633 }
3634
3635 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3636 {
3637         int start = 0;
3638         int i;
3639         u32 prev_legacy, cur_legacy;
3640         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3641         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3642         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3643         if (!prev_legacy && cur_legacy)
3644                 start = 1;
3645         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3646                sizeof(kvm->arch.vpit->pit_state.channels));
3647         kvm->arch.vpit->pit_state.flags = ps->flags;
3648         for (i = 0; i < 3; i++)
3649                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3650                                    start && i == 0);
3651         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3652         return 0;
3653 }
3654
3655 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3656                                  struct kvm_reinject_control *control)
3657 {
3658         if (!kvm->arch.vpit)
3659                 return -ENXIO;
3660         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3661         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3662         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3663         return 0;
3664 }
3665
3666 /**
3667  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3668  * @kvm: kvm instance
3669  * @log: slot id and address to which we copy the log
3670  *
3671  * Steps 1-4 below provide general overview of dirty page logging. See
3672  * kvm_get_dirty_log_protect() function description for additional details.
3673  *
3674  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3675  * always flush the TLB (step 4) even if previous step failed  and the dirty
3676  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3677  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3678  * writes will be marked dirty for next log read.
3679  *
3680  *   1. Take a snapshot of the bit and clear it if needed.
3681  *   2. Write protect the corresponding page.
3682  *   3. Copy the snapshot to the userspace.
3683  *   4. Flush TLB's if needed.
3684  */
3685 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3686 {
3687         bool is_dirty = false;
3688         int r;
3689
3690         mutex_lock(&kvm->slots_lock);
3691
3692         /*
3693          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3694          */
3695         if (kvm_x86_ops->flush_log_dirty)
3696                 kvm_x86_ops->flush_log_dirty(kvm);
3697
3698         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3699
3700         /*
3701          * All the TLBs can be flushed out of mmu lock, see the comments in
3702          * kvm_mmu_slot_remove_write_access().
3703          */
3704         lockdep_assert_held(&kvm->slots_lock);
3705         if (is_dirty)
3706                 kvm_flush_remote_tlbs(kvm);
3707
3708         mutex_unlock(&kvm->slots_lock);
3709         return r;
3710 }
3711
3712 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3713                         bool line_status)
3714 {
3715         if (!irqchip_in_kernel(kvm))
3716                 return -ENXIO;
3717
3718         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3719                                         irq_event->irq, irq_event->level,
3720                                         line_status);
3721         return 0;
3722 }
3723
3724 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3725                                    struct kvm_enable_cap *cap)
3726 {
3727         int r;
3728
3729         if (cap->flags)
3730                 return -EINVAL;
3731
3732         switch (cap->cap) {
3733         case KVM_CAP_DISABLE_QUIRKS:
3734                 kvm->arch.disabled_quirks = cap->args[0];
3735                 r = 0;
3736                 break;
3737         case KVM_CAP_SPLIT_IRQCHIP: {
3738                 mutex_lock(&kvm->lock);
3739                 r = -EINVAL;
3740                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3741                         goto split_irqchip_unlock;
3742                 r = -EEXIST;
3743                 if (irqchip_in_kernel(kvm))
3744                         goto split_irqchip_unlock;
3745                 if (atomic_read(&kvm->online_vcpus))
3746                         goto split_irqchip_unlock;
3747                 r = kvm_setup_empty_irq_routing(kvm);
3748                 if (r)
3749                         goto split_irqchip_unlock;
3750                 /* Pairs with irqchip_in_kernel. */
3751                 smp_wmb();
3752                 kvm->arch.irqchip_split = true;
3753                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3754                 r = 0;
3755 split_irqchip_unlock:
3756                 mutex_unlock(&kvm->lock);
3757                 break;
3758         }
3759         default:
3760                 r = -EINVAL;
3761                 break;
3762         }
3763         return r;
3764 }
3765
3766 long kvm_arch_vm_ioctl(struct file *filp,
3767                        unsigned int ioctl, unsigned long arg)
3768 {
3769         struct kvm *kvm = filp->private_data;
3770         void __user *argp = (void __user *)arg;
3771         int r = -ENOTTY;
3772         /*
3773          * This union makes it completely explicit to gcc-3.x
3774          * that these two variables' stack usage should be
3775          * combined, not added together.
3776          */
3777         union {
3778                 struct kvm_pit_state ps;
3779                 struct kvm_pit_state2 ps2;
3780                 struct kvm_pit_config pit_config;
3781         } u;
3782
3783         switch (ioctl) {
3784         case KVM_SET_TSS_ADDR:
3785                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3786                 break;
3787         case KVM_SET_IDENTITY_MAP_ADDR: {
3788                 u64 ident_addr;
3789
3790                 r = -EFAULT;
3791                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3792                         goto out;
3793                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3794                 break;
3795         }
3796         case KVM_SET_NR_MMU_PAGES:
3797                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3798                 break;
3799         case KVM_GET_NR_MMU_PAGES:
3800                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3801                 break;
3802         case KVM_CREATE_IRQCHIP: {
3803                 struct kvm_pic *vpic;
3804
3805                 mutex_lock(&kvm->lock);
3806                 r = -EEXIST;
3807                 if (kvm->arch.vpic)
3808                         goto create_irqchip_unlock;
3809                 r = -EINVAL;
3810                 if (atomic_read(&kvm->online_vcpus))
3811                         goto create_irqchip_unlock;
3812                 r = -ENOMEM;
3813                 vpic = kvm_create_pic(kvm);
3814                 if (vpic) {
3815                         r = kvm_ioapic_init(kvm);
3816                         if (r) {
3817                                 mutex_lock(&kvm->slots_lock);
3818                                 kvm_destroy_pic(vpic);
3819                                 mutex_unlock(&kvm->slots_lock);
3820                                 goto create_irqchip_unlock;
3821                         }
3822                 } else
3823                         goto create_irqchip_unlock;
3824                 r = kvm_setup_default_irq_routing(kvm);
3825                 if (r) {
3826                         mutex_lock(&kvm->slots_lock);
3827                         mutex_lock(&kvm->irq_lock);
3828                         kvm_ioapic_destroy(kvm);
3829                         kvm_destroy_pic(vpic);
3830                         mutex_unlock(&kvm->irq_lock);
3831                         mutex_unlock(&kvm->slots_lock);
3832                         goto create_irqchip_unlock;
3833                 }
3834                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3835                 smp_wmb();
3836                 kvm->arch.vpic = vpic;
3837         create_irqchip_unlock:
3838                 mutex_unlock(&kvm->lock);
3839                 break;
3840         }
3841         case KVM_CREATE_PIT:
3842                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3843                 goto create_pit;
3844         case KVM_CREATE_PIT2:
3845                 r = -EFAULT;
3846                 if (copy_from_user(&u.pit_config, argp,
3847                                    sizeof(struct kvm_pit_config)))
3848                         goto out;
3849         create_pit:
3850                 mutex_lock(&kvm->slots_lock);
3851                 r = -EEXIST;
3852                 if (kvm->arch.vpit)
3853                         goto create_pit_unlock;
3854                 r = -ENOMEM;
3855                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3856                 if (kvm->arch.vpit)
3857                         r = 0;
3858         create_pit_unlock:
3859                 mutex_unlock(&kvm->slots_lock);
3860                 break;
3861         case KVM_GET_IRQCHIP: {
3862                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3863                 struct kvm_irqchip *chip;
3864
3865                 chip = memdup_user(argp, sizeof(*chip));
3866                 if (IS_ERR(chip)) {
3867                         r = PTR_ERR(chip);
3868                         goto out;
3869                 }
3870
3871                 r = -ENXIO;
3872                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3873                         goto get_irqchip_out;
3874                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3875                 if (r)
3876                         goto get_irqchip_out;
3877                 r = -EFAULT;
3878                 if (copy_to_user(argp, chip, sizeof *chip))
3879                         goto get_irqchip_out;
3880                 r = 0;
3881         get_irqchip_out:
3882                 kfree(chip);
3883                 break;
3884         }
3885         case KVM_SET_IRQCHIP: {
3886                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3887                 struct kvm_irqchip *chip;
3888
3889                 chip = memdup_user(argp, sizeof(*chip));
3890                 if (IS_ERR(chip)) {
3891                         r = PTR_ERR(chip);
3892                         goto out;
3893                 }
3894
3895                 r = -ENXIO;
3896                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3897                         goto set_irqchip_out;
3898                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3899                 if (r)
3900                         goto set_irqchip_out;
3901                 r = 0;
3902         set_irqchip_out:
3903                 kfree(chip);
3904                 break;
3905         }
3906         case KVM_GET_PIT: {
3907                 r = -EFAULT;
3908                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3909                         goto out;
3910                 r = -ENXIO;
3911                 if (!kvm->arch.vpit)
3912                         goto out;
3913                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3914                 if (r)
3915                         goto out;
3916                 r = -EFAULT;
3917                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3918                         goto out;
3919                 r = 0;
3920                 break;
3921         }
3922         case KVM_SET_PIT: {
3923                 r = -EFAULT;
3924                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3925                         goto out;
3926                 r = -ENXIO;
3927                 if (!kvm->arch.vpit)
3928                         goto out;
3929                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3930                 break;
3931         }
3932         case KVM_GET_PIT2: {
3933                 r = -ENXIO;
3934                 if (!kvm->arch.vpit)
3935                         goto out;
3936                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3937                 if (r)
3938                         goto out;
3939                 r = -EFAULT;
3940                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3941                         goto out;
3942                 r = 0;
3943                 break;
3944         }
3945         case KVM_SET_PIT2: {
3946                 r = -EFAULT;
3947                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3948                         goto out;
3949                 r = -ENXIO;
3950                 if (!kvm->arch.vpit)
3951                         goto out;
3952                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3953                 break;
3954         }
3955         case KVM_REINJECT_CONTROL: {
3956                 struct kvm_reinject_control control;
3957                 r =  -EFAULT;
3958                 if (copy_from_user(&control, argp, sizeof(control)))
3959                         goto out;
3960                 r = kvm_vm_ioctl_reinject(kvm, &control);
3961                 break;
3962         }
3963         case KVM_SET_BOOT_CPU_ID:
3964                 r = 0;
3965                 mutex_lock(&kvm->lock);
3966                 if (atomic_read(&kvm->online_vcpus) != 0)
3967                         r = -EBUSY;
3968                 else
3969                         kvm->arch.bsp_vcpu_id = arg;
3970                 mutex_unlock(&kvm->lock);
3971                 break;
3972         case KVM_XEN_HVM_CONFIG: {
3973                 r = -EFAULT;
3974                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3975                                    sizeof(struct kvm_xen_hvm_config)))
3976                         goto out;
3977                 r = -EINVAL;
3978                 if (kvm->arch.xen_hvm_config.flags)
3979                         goto out;
3980                 r = 0;
3981                 break;
3982         }
3983         case KVM_SET_CLOCK: {
3984                 struct kvm_clock_data user_ns;
3985                 u64 now_ns;
3986                 s64 delta;
3987
3988                 r = -EFAULT;
3989                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3990                         goto out;
3991
3992                 r = -EINVAL;
3993                 if (user_ns.flags)
3994                         goto out;
3995
3996                 r = 0;
3997                 local_irq_disable();
3998                 now_ns = get_kernel_ns();
3999                 delta = user_ns.clock - now_ns;
4000                 local_irq_enable();
4001                 kvm->arch.kvmclock_offset = delta;
4002                 kvm_gen_update_masterclock(kvm);
4003                 break;
4004         }
4005         case KVM_GET_CLOCK: {
4006                 struct kvm_clock_data user_ns;
4007                 u64 now_ns;
4008
4009                 local_irq_disable();
4010                 now_ns = get_kernel_ns();
4011                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4012                 local_irq_enable();
4013                 user_ns.flags = 0;
4014                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4015
4016                 r = -EFAULT;
4017                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4018                         goto out;
4019                 r = 0;
4020                 break;
4021         }
4022         case KVM_ENABLE_CAP: {
4023                 struct kvm_enable_cap cap;
4024
4025                 r = -EFAULT;
4026                 if (copy_from_user(&cap, argp, sizeof(cap)))
4027                         goto out;
4028                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4029                 break;
4030         }
4031         default:
4032                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4033         }
4034 out:
4035         return r;
4036 }
4037
4038 static void kvm_init_msr_list(void)
4039 {
4040         u32 dummy[2];
4041         unsigned i, j;
4042
4043         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4044                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4045                         continue;
4046
4047                 /*
4048                  * Even MSRs that are valid in the host may not be exposed
4049                  * to the guests in some cases.
4050                  */
4051                 switch (msrs_to_save[i]) {
4052                 case MSR_IA32_BNDCFGS:
4053                         if (!kvm_x86_ops->mpx_supported())
4054                                 continue;
4055                         break;
4056                 case MSR_TSC_AUX:
4057                         if (!kvm_x86_ops->rdtscp_supported())
4058                                 continue;
4059                         break;
4060                 default:
4061                         break;
4062                 }
4063
4064                 if (j < i)
4065                         msrs_to_save[j] = msrs_to_save[i];
4066                 j++;
4067         }
4068         num_msrs_to_save = j;
4069
4070         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4071                 switch (emulated_msrs[i]) {
4072                 case MSR_IA32_SMBASE:
4073                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4074                                 continue;
4075                         break;
4076                 default:
4077                         break;
4078                 }
4079
4080                 if (j < i)
4081                         emulated_msrs[j] = emulated_msrs[i];
4082                 j++;
4083         }
4084         num_emulated_msrs = j;
4085 }
4086
4087 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4088                            const void *v)
4089 {
4090         int handled = 0;
4091         int n;
4092
4093         do {
4094                 n = min(len, 8);
4095                 if (!(lapic_in_kernel(vcpu) &&
4096                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4097                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4098                         break;
4099                 handled += n;
4100                 addr += n;
4101                 len -= n;
4102                 v += n;
4103         } while (len);
4104
4105         return handled;
4106 }
4107
4108 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4109 {
4110         int handled = 0;
4111         int n;
4112
4113         do {
4114                 n = min(len, 8);
4115                 if (!(lapic_in_kernel(vcpu) &&
4116                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4117                                          addr, n, v))
4118                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4119                         break;
4120                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4121                 handled += n;
4122                 addr += n;
4123                 len -= n;
4124                 v += n;
4125         } while (len);
4126
4127         return handled;
4128 }
4129
4130 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4131                         struct kvm_segment *var, int seg)
4132 {
4133         kvm_x86_ops->set_segment(vcpu, var, seg);
4134 }
4135
4136 void kvm_get_segment(struct kvm_vcpu *vcpu,
4137                      struct kvm_segment *var, int seg)
4138 {
4139         kvm_x86_ops->get_segment(vcpu, var, seg);
4140 }
4141
4142 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4143                            struct x86_exception *exception)
4144 {
4145         gpa_t t_gpa;
4146
4147         BUG_ON(!mmu_is_nested(vcpu));
4148
4149         /* NPT walks are always user-walks */
4150         access |= PFERR_USER_MASK;
4151         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4152
4153         return t_gpa;
4154 }
4155
4156 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4157                               struct x86_exception *exception)
4158 {
4159         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4160         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4161 }
4162
4163  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4164                                 struct x86_exception *exception)
4165 {
4166         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4167         access |= PFERR_FETCH_MASK;
4168         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4169 }
4170
4171 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4172                                struct x86_exception *exception)
4173 {
4174         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4175         access |= PFERR_WRITE_MASK;
4176         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4177 }
4178
4179 /* uses this to access any guest's mapped memory without checking CPL */
4180 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4181                                 struct x86_exception *exception)
4182 {
4183         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4184 }
4185
4186 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4187                                       struct kvm_vcpu *vcpu, u32 access,
4188                                       struct x86_exception *exception)
4189 {
4190         void *data = val;
4191         int r = X86EMUL_CONTINUE;
4192
4193         while (bytes) {
4194                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4195                                                             exception);
4196                 unsigned offset = addr & (PAGE_SIZE-1);
4197                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4198                 int ret;
4199
4200                 if (gpa == UNMAPPED_GVA)
4201                         return X86EMUL_PROPAGATE_FAULT;
4202                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4203                                                offset, toread);
4204                 if (ret < 0) {
4205                         r = X86EMUL_IO_NEEDED;
4206                         goto out;
4207                 }
4208
4209                 bytes -= toread;
4210                 data += toread;
4211                 addr += toread;
4212         }
4213 out:
4214         return r;
4215 }
4216
4217 /* used for instruction fetching */
4218 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4219                                 gva_t addr, void *val, unsigned int bytes,
4220                                 struct x86_exception *exception)
4221 {
4222         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4223         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4224         unsigned offset;
4225         int ret;
4226
4227         /* Inline kvm_read_guest_virt_helper for speed.  */
4228         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4229                                                     exception);
4230         if (unlikely(gpa == UNMAPPED_GVA))
4231                 return X86EMUL_PROPAGATE_FAULT;
4232
4233         offset = addr & (PAGE_SIZE-1);
4234         if (WARN_ON(offset + bytes > PAGE_SIZE))
4235                 bytes = (unsigned)PAGE_SIZE - offset;
4236         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4237                                        offset, bytes);
4238         if (unlikely(ret < 0))
4239                 return X86EMUL_IO_NEEDED;
4240
4241         return X86EMUL_CONTINUE;
4242 }
4243
4244 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4245                                gva_t addr, void *val, unsigned int bytes,
4246                                struct x86_exception *exception)
4247 {
4248         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4249         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4250
4251         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4252                                           exception);
4253 }
4254 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4255
4256 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4257                                       gva_t addr, void *val, unsigned int bytes,
4258                                       struct x86_exception *exception)
4259 {
4260         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4261         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4262 }
4263
4264 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4265                 unsigned long addr, void *val, unsigned int bytes)
4266 {
4267         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4268         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4269
4270         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4271 }
4272
4273 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4274                                        gva_t addr, void *val,
4275                                        unsigned int bytes,
4276                                        struct x86_exception *exception)
4277 {
4278         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4279         void *data = val;
4280         int r = X86EMUL_CONTINUE;
4281
4282         while (bytes) {
4283                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4284                                                              PFERR_WRITE_MASK,
4285                                                              exception);
4286                 unsigned offset = addr & (PAGE_SIZE-1);
4287                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4288                 int ret;
4289
4290                 if (gpa == UNMAPPED_GVA)
4291                         return X86EMUL_PROPAGATE_FAULT;
4292                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4293                 if (ret < 0) {
4294                         r = X86EMUL_IO_NEEDED;
4295                         goto out;
4296                 }
4297
4298                 bytes -= towrite;
4299                 data += towrite;
4300                 addr += towrite;
4301         }
4302 out:
4303         return r;
4304 }
4305 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4306
4307 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4308                                 gpa_t *gpa, struct x86_exception *exception,
4309                                 bool write)
4310 {
4311         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4312                 | (write ? PFERR_WRITE_MASK : 0);
4313
4314         if (vcpu_match_mmio_gva(vcpu, gva)
4315             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4316                                  vcpu->arch.access, access)) {
4317                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4318                                         (gva & (PAGE_SIZE - 1));
4319                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4320                 return 1;
4321         }
4322
4323         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4324
4325         if (*gpa == UNMAPPED_GVA)
4326                 return -1;
4327
4328         /* For APIC access vmexit */
4329         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4330                 return 1;
4331
4332         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4333                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4334                 return 1;
4335         }
4336
4337         return 0;
4338 }
4339
4340 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4341                         const void *val, int bytes)
4342 {
4343         int ret;
4344
4345         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4346         if (ret < 0)
4347                 return 0;
4348         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4349         return 1;
4350 }
4351
4352 struct read_write_emulator_ops {
4353         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4354                                   int bytes);
4355         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4356                                   void *val, int bytes);
4357         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4358                                int bytes, void *val);
4359         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4360                                     void *val, int bytes);
4361         bool write;
4362 };
4363
4364 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4365 {
4366         if (vcpu->mmio_read_completed) {
4367                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4368                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4369                 vcpu->mmio_read_completed = 0;
4370                 return 1;
4371         }
4372
4373         return 0;
4374 }
4375
4376 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4377                         void *val, int bytes)
4378 {
4379         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4380 }
4381
4382 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4383                          void *val, int bytes)
4384 {
4385         return emulator_write_phys(vcpu, gpa, val, bytes);
4386 }
4387
4388 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4389 {
4390         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4391         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4392 }
4393
4394 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4395                           void *val, int bytes)
4396 {
4397         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4398         return X86EMUL_IO_NEEDED;
4399 }
4400
4401 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4402                            void *val, int bytes)
4403 {
4404         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4405
4406         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4407         return X86EMUL_CONTINUE;
4408 }
4409
4410 static const struct read_write_emulator_ops read_emultor = {
4411         .read_write_prepare = read_prepare,
4412         .read_write_emulate = read_emulate,
4413         .read_write_mmio = vcpu_mmio_read,
4414         .read_write_exit_mmio = read_exit_mmio,
4415 };
4416
4417 static const struct read_write_emulator_ops write_emultor = {
4418         .read_write_emulate = write_emulate,
4419         .read_write_mmio = write_mmio,
4420         .read_write_exit_mmio = write_exit_mmio,
4421         .write = true,
4422 };
4423
4424 static int emulator_read_write_onepage(unsigned long addr, void *val,
4425                                        unsigned int bytes,
4426                                        struct x86_exception *exception,
4427                                        struct kvm_vcpu *vcpu,
4428                                        const struct read_write_emulator_ops *ops)
4429 {
4430         gpa_t gpa;
4431         int handled, ret;
4432         bool write = ops->write;
4433         struct kvm_mmio_fragment *frag;
4434
4435         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4436
4437         if (ret < 0)
4438                 return X86EMUL_PROPAGATE_FAULT;
4439
4440         /* For APIC access vmexit */
4441         if (ret)
4442                 goto mmio;
4443
4444         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4445                 return X86EMUL_CONTINUE;
4446
4447 mmio:
4448         /*
4449          * Is this MMIO handled locally?
4450          */
4451         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4452         if (handled == bytes)
4453                 return X86EMUL_CONTINUE;
4454
4455         gpa += handled;
4456         bytes -= handled;
4457         val += handled;
4458
4459         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4460         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4461         frag->gpa = gpa;
4462         frag->data = val;
4463         frag->len = bytes;
4464         return X86EMUL_CONTINUE;
4465 }
4466
4467 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4468                         unsigned long addr,
4469                         void *val, unsigned int bytes,
4470                         struct x86_exception *exception,
4471                         const struct read_write_emulator_ops *ops)
4472 {
4473         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4474         gpa_t gpa;
4475         int rc;
4476
4477         if (ops->read_write_prepare &&
4478                   ops->read_write_prepare(vcpu, val, bytes))
4479                 return X86EMUL_CONTINUE;
4480
4481         vcpu->mmio_nr_fragments = 0;
4482
4483         /* Crossing a page boundary? */
4484         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4485                 int now;
4486
4487                 now = -addr & ~PAGE_MASK;
4488                 rc = emulator_read_write_onepage(addr, val, now, exception,
4489                                                  vcpu, ops);
4490
4491                 if (rc != X86EMUL_CONTINUE)
4492                         return rc;
4493                 addr += now;
4494                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4495                         addr = (u32)addr;
4496                 val += now;
4497                 bytes -= now;
4498         }
4499
4500         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4501                                          vcpu, ops);
4502         if (rc != X86EMUL_CONTINUE)
4503                 return rc;
4504
4505         if (!vcpu->mmio_nr_fragments)
4506                 return rc;
4507
4508         gpa = vcpu->mmio_fragments[0].gpa;
4509
4510         vcpu->mmio_needed = 1;
4511         vcpu->mmio_cur_fragment = 0;
4512
4513         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4514         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4515         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4516         vcpu->run->mmio.phys_addr = gpa;
4517
4518         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4519 }
4520
4521 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4522                                   unsigned long addr,
4523                                   void *val,
4524                                   unsigned int bytes,
4525                                   struct x86_exception *exception)
4526 {
4527         return emulator_read_write(ctxt, addr, val, bytes,
4528                                    exception, &read_emultor);
4529 }
4530
4531 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4532                             unsigned long addr,
4533                             const void *val,
4534                             unsigned int bytes,
4535                             struct x86_exception *exception)
4536 {
4537         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4538                                    exception, &write_emultor);
4539 }
4540
4541 #define CMPXCHG_TYPE(t, ptr, old, new) \
4542         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4543
4544 #ifdef CONFIG_X86_64
4545 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4546 #else
4547 #  define CMPXCHG64(ptr, old, new) \
4548         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4549 #endif
4550
4551 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4552                                      unsigned long addr,
4553                                      const void *old,
4554                                      const void *new,
4555                                      unsigned int bytes,
4556                                      struct x86_exception *exception)
4557 {
4558         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4559         gpa_t gpa;
4560         struct page *page;
4561         char *kaddr;
4562         bool exchanged;
4563
4564         /* guests cmpxchg8b have to be emulated atomically */
4565         if (bytes > 8 || (bytes & (bytes - 1)))
4566                 goto emul_write;
4567
4568         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4569
4570         if (gpa == UNMAPPED_GVA ||
4571             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4572                 goto emul_write;
4573
4574         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4575                 goto emul_write;
4576
4577         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4578         if (is_error_page(page))
4579                 goto emul_write;
4580
4581         kaddr = kmap_atomic(page);
4582         kaddr += offset_in_page(gpa);
4583         switch (bytes) {
4584         case 1:
4585                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4586                 break;
4587         case 2:
4588                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4589                 break;
4590         case 4:
4591                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4592                 break;
4593         case 8:
4594                 exchanged = CMPXCHG64(kaddr, old, new);
4595                 break;
4596         default:
4597                 BUG();
4598         }
4599         kunmap_atomic(kaddr);
4600         kvm_release_page_dirty(page);
4601
4602         if (!exchanged)
4603                 return X86EMUL_CMPXCHG_FAILED;
4604
4605         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4606         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4607
4608         return X86EMUL_CONTINUE;
4609
4610 emul_write:
4611         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4612
4613         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4614 }
4615
4616 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4617 {
4618         /* TODO: String I/O for in kernel device */
4619         int r;
4620
4621         if (vcpu->arch.pio.in)
4622                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4623                                     vcpu->arch.pio.size, pd);
4624         else
4625                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4626                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4627                                      pd);
4628         return r;
4629 }
4630
4631 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4632                                unsigned short port, void *val,
4633                                unsigned int count, bool in)
4634 {
4635         vcpu->arch.pio.port = port;
4636         vcpu->arch.pio.in = in;
4637         vcpu->arch.pio.count  = count;
4638         vcpu->arch.pio.size = size;
4639
4640         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4641                 vcpu->arch.pio.count = 0;
4642                 return 1;
4643         }
4644
4645         vcpu->run->exit_reason = KVM_EXIT_IO;
4646         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4647         vcpu->run->io.size = size;
4648         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4649         vcpu->run->io.count = count;
4650         vcpu->run->io.port = port;
4651
4652         return 0;
4653 }
4654
4655 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4656                                     int size, unsigned short port, void *val,
4657                                     unsigned int count)
4658 {
4659         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4660         int ret;
4661
4662         if (vcpu->arch.pio.count)
4663                 goto data_avail;
4664
4665         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4666         if (ret) {
4667 data_avail:
4668                 memcpy(val, vcpu->arch.pio_data, size * count);
4669                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4670                 vcpu->arch.pio.count = 0;
4671                 return 1;
4672         }
4673
4674         return 0;
4675 }
4676
4677 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4678                                      int size, unsigned short port,
4679                                      const void *val, unsigned int count)
4680 {
4681         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4682
4683         memcpy(vcpu->arch.pio_data, val, size * count);
4684         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4685         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4686 }
4687
4688 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4689 {
4690         return kvm_x86_ops->get_segment_base(vcpu, seg);
4691 }
4692
4693 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4694 {
4695         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4696 }
4697
4698 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4699 {
4700         if (!need_emulate_wbinvd(vcpu))
4701                 return X86EMUL_CONTINUE;
4702
4703         if (kvm_x86_ops->has_wbinvd_exit()) {
4704                 int cpu = get_cpu();
4705
4706                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4707                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4708                                 wbinvd_ipi, NULL, 1);
4709                 put_cpu();
4710                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4711         } else
4712                 wbinvd();
4713         return X86EMUL_CONTINUE;
4714 }
4715
4716 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4717 {
4718         kvm_x86_ops->skip_emulated_instruction(vcpu);
4719         return kvm_emulate_wbinvd_noskip(vcpu);
4720 }
4721 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4722
4723
4724
4725 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4726 {
4727         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4728 }
4729
4730 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4731                            unsigned long *dest)
4732 {
4733         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4734 }
4735
4736 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4737                            unsigned long value)
4738 {
4739
4740         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4741 }
4742
4743 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4744 {
4745         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4746 }
4747
4748 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4749 {
4750         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4751         unsigned long value;
4752
4753         switch (cr) {
4754         case 0:
4755                 value = kvm_read_cr0(vcpu);
4756                 break;
4757         case 2:
4758                 value = vcpu->arch.cr2;
4759                 break;
4760         case 3:
4761                 value = kvm_read_cr3(vcpu);
4762                 break;
4763         case 4:
4764                 value = kvm_read_cr4(vcpu);
4765                 break;
4766         case 8:
4767                 value = kvm_get_cr8(vcpu);
4768                 break;
4769         default:
4770                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4771                 return 0;
4772         }
4773
4774         return value;
4775 }
4776
4777 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4778 {
4779         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4780         int res = 0;
4781
4782         switch (cr) {
4783         case 0:
4784                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4785                 break;
4786         case 2:
4787                 vcpu->arch.cr2 = val;
4788                 break;
4789         case 3:
4790                 res = kvm_set_cr3(vcpu, val);
4791                 break;
4792         case 4:
4793                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4794                 break;
4795         case 8:
4796                 res = kvm_set_cr8(vcpu, val);
4797                 break;
4798         default:
4799                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4800                 res = -1;
4801         }
4802
4803         return res;
4804 }
4805
4806 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4807 {
4808         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4809 }
4810
4811 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4812 {
4813         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4814 }
4815
4816 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4817 {
4818         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4819 }
4820
4821 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4822 {
4823         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4824 }
4825
4826 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4827 {
4828         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4829 }
4830
4831 static unsigned long emulator_get_cached_segment_base(
4832         struct x86_emulate_ctxt *ctxt, int seg)
4833 {
4834         return get_segment_base(emul_to_vcpu(ctxt), seg);
4835 }
4836
4837 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4838                                  struct desc_struct *desc, u32 *base3,
4839                                  int seg)
4840 {
4841         struct kvm_segment var;
4842
4843         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4844         *selector = var.selector;
4845
4846         if (var.unusable) {
4847                 memset(desc, 0, sizeof(*desc));
4848                 return false;
4849         }
4850
4851         if (var.g)
4852                 var.limit >>= 12;
4853         set_desc_limit(desc, var.limit);
4854         set_desc_base(desc, (unsigned long)var.base);
4855 #ifdef CONFIG_X86_64
4856         if (base3)
4857                 *base3 = var.base >> 32;
4858 #endif
4859         desc->type = var.type;
4860         desc->s = var.s;
4861         desc->dpl = var.dpl;
4862         desc->p = var.present;
4863         desc->avl = var.avl;
4864         desc->l = var.l;
4865         desc->d = var.db;
4866         desc->g = var.g;
4867
4868         return true;
4869 }
4870
4871 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4872                                  struct desc_struct *desc, u32 base3,
4873                                  int seg)
4874 {
4875         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4876         struct kvm_segment var;
4877
4878         var.selector = selector;
4879         var.base = get_desc_base(desc);
4880 #ifdef CONFIG_X86_64
4881         var.base |= ((u64)base3) << 32;
4882 #endif
4883         var.limit = get_desc_limit(desc);
4884         if (desc->g)
4885                 var.limit = (var.limit << 12) | 0xfff;
4886         var.type = desc->type;
4887         var.dpl = desc->dpl;
4888         var.db = desc->d;
4889         var.s = desc->s;
4890         var.l = desc->l;
4891         var.g = desc->g;
4892         var.avl = desc->avl;
4893         var.present = desc->p;
4894         var.unusable = !var.present;
4895         var.padding = 0;
4896
4897         kvm_set_segment(vcpu, &var, seg);
4898         return;
4899 }
4900
4901 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4902                             u32 msr_index, u64 *pdata)
4903 {
4904         struct msr_data msr;
4905         int r;
4906
4907         msr.index = msr_index;
4908         msr.host_initiated = false;
4909         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4910         if (r)
4911                 return r;
4912
4913         *pdata = msr.data;
4914         return 0;
4915 }
4916
4917 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4918                             u32 msr_index, u64 data)
4919 {
4920         struct msr_data msr;
4921
4922         msr.data = data;
4923         msr.index = msr_index;
4924         msr.host_initiated = false;
4925         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4926 }
4927
4928 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4929 {
4930         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4931
4932         return vcpu->arch.smbase;
4933 }
4934
4935 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4936 {
4937         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4938
4939         vcpu->arch.smbase = smbase;
4940 }
4941
4942 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4943                               u32 pmc)
4944 {
4945         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4946 }
4947
4948 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4949                              u32 pmc, u64 *pdata)
4950 {
4951         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4952 }
4953
4954 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4955 {
4956         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4957 }
4958
4959 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4960 {
4961         preempt_disable();
4962         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4963         /*
4964          * CR0.TS may reference the host fpu state, not the guest fpu state,
4965          * so it may be clear at this point.
4966          */
4967         clts();
4968 }
4969
4970 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4971 {
4972         preempt_enable();
4973 }
4974
4975 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4976                               struct x86_instruction_info *info,
4977                               enum x86_intercept_stage stage)
4978 {
4979         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4980 }
4981
4982 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4983                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4984 {
4985         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4986 }
4987
4988 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4989 {
4990         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4991 }
4992
4993 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4994 {
4995         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4996 }
4997
4998 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4999 {
5000         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5001 }
5002
5003 static const struct x86_emulate_ops emulate_ops = {
5004         .read_gpr            = emulator_read_gpr,
5005         .write_gpr           = emulator_write_gpr,
5006         .read_std            = kvm_read_guest_virt_system,
5007         .write_std           = kvm_write_guest_virt_system,
5008         .read_phys           = kvm_read_guest_phys_system,
5009         .fetch               = kvm_fetch_guest_virt,
5010         .read_emulated       = emulator_read_emulated,
5011         .write_emulated      = emulator_write_emulated,
5012         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5013         .invlpg              = emulator_invlpg,
5014         .pio_in_emulated     = emulator_pio_in_emulated,
5015         .pio_out_emulated    = emulator_pio_out_emulated,
5016         .get_segment         = emulator_get_segment,
5017         .set_segment         = emulator_set_segment,
5018         .get_cached_segment_base = emulator_get_cached_segment_base,
5019         .get_gdt             = emulator_get_gdt,
5020         .get_idt             = emulator_get_idt,
5021         .set_gdt             = emulator_set_gdt,
5022         .set_idt             = emulator_set_idt,
5023         .get_cr              = emulator_get_cr,
5024         .set_cr              = emulator_set_cr,
5025         .cpl                 = emulator_get_cpl,
5026         .get_dr              = emulator_get_dr,
5027         .set_dr              = emulator_set_dr,
5028         .get_smbase          = emulator_get_smbase,
5029         .set_smbase          = emulator_set_smbase,
5030         .set_msr             = emulator_set_msr,
5031         .get_msr             = emulator_get_msr,
5032         .check_pmc           = emulator_check_pmc,
5033         .read_pmc            = emulator_read_pmc,
5034         .halt                = emulator_halt,
5035         .wbinvd              = emulator_wbinvd,
5036         .fix_hypercall       = emulator_fix_hypercall,
5037         .get_fpu             = emulator_get_fpu,
5038         .put_fpu             = emulator_put_fpu,
5039         .intercept           = emulator_intercept,
5040         .get_cpuid           = emulator_get_cpuid,
5041         .set_nmi_mask        = emulator_set_nmi_mask,
5042 };
5043
5044 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5045 {
5046         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5047         /*
5048          * an sti; sti; sequence only disable interrupts for the first
5049          * instruction. So, if the last instruction, be it emulated or
5050          * not, left the system with the INT_STI flag enabled, it
5051          * means that the last instruction is an sti. We should not
5052          * leave the flag on in this case. The same goes for mov ss
5053          */
5054         if (int_shadow & mask)
5055                 mask = 0;
5056         if (unlikely(int_shadow || mask)) {
5057                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5058                 if (!mask)
5059                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5060         }
5061 }
5062
5063 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5064 {
5065         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5066         if (ctxt->exception.vector == PF_VECTOR)
5067                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5068
5069         if (ctxt->exception.error_code_valid)
5070                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5071                                       ctxt->exception.error_code);
5072         else
5073                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5074         return false;
5075 }
5076
5077 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5078 {
5079         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5080         int cs_db, cs_l;
5081
5082         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5083
5084         ctxt->eflags = kvm_get_rflags(vcpu);
5085         ctxt->eip = kvm_rip_read(vcpu);
5086         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5087                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5088                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5089                      cs_db                              ? X86EMUL_MODE_PROT32 :
5090                                                           X86EMUL_MODE_PROT16;
5091         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5092         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5093         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5094         ctxt->emul_flags = vcpu->arch.hflags;
5095
5096         init_decode_cache(ctxt);
5097         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5098 }
5099
5100 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5101 {
5102         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5103         int ret;
5104
5105         init_emulate_ctxt(vcpu);
5106
5107         ctxt->op_bytes = 2;
5108         ctxt->ad_bytes = 2;
5109         ctxt->_eip = ctxt->eip + inc_eip;
5110         ret = emulate_int_real(ctxt, irq);
5111
5112         if (ret != X86EMUL_CONTINUE)
5113                 return EMULATE_FAIL;
5114
5115         ctxt->eip = ctxt->_eip;
5116         kvm_rip_write(vcpu, ctxt->eip);
5117         kvm_set_rflags(vcpu, ctxt->eflags);
5118
5119         if (irq == NMI_VECTOR)
5120                 vcpu->arch.nmi_pending = 0;
5121         else
5122                 vcpu->arch.interrupt.pending = false;
5123
5124         return EMULATE_DONE;
5125 }
5126 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5127
5128 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5129 {
5130         int r = EMULATE_DONE;
5131
5132         ++vcpu->stat.insn_emulation_fail;
5133         trace_kvm_emulate_insn_failed(vcpu);
5134         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5135                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5136                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5137                 vcpu->run->internal.ndata = 0;
5138                 r = EMULATE_FAIL;
5139         }
5140         kvm_queue_exception(vcpu, UD_VECTOR);
5141
5142         return r;
5143 }
5144
5145 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5146                                   bool write_fault_to_shadow_pgtable,
5147                                   int emulation_type)
5148 {
5149         gpa_t gpa = cr2;
5150         kvm_pfn_t pfn;
5151
5152         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5153                 return false;
5154
5155         if (!vcpu->arch.mmu.direct_map) {
5156                 /*
5157                  * Write permission should be allowed since only
5158                  * write access need to be emulated.
5159                  */
5160                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5161
5162                 /*
5163                  * If the mapping is invalid in guest, let cpu retry
5164                  * it to generate fault.
5165                  */
5166                 if (gpa == UNMAPPED_GVA)
5167                         return true;
5168         }
5169
5170         /*
5171          * Do not retry the unhandleable instruction if it faults on the
5172          * readonly host memory, otherwise it will goto a infinite loop:
5173          * retry instruction -> write #PF -> emulation fail -> retry
5174          * instruction -> ...
5175          */
5176         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5177
5178         /*
5179          * If the instruction failed on the error pfn, it can not be fixed,
5180          * report the error to userspace.
5181          */
5182         if (is_error_noslot_pfn(pfn))
5183                 return false;
5184
5185         kvm_release_pfn_clean(pfn);
5186
5187         /* The instructions are well-emulated on direct mmu. */
5188         if (vcpu->arch.mmu.direct_map) {
5189                 unsigned int indirect_shadow_pages;
5190
5191                 spin_lock(&vcpu->kvm->mmu_lock);
5192                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5193                 spin_unlock(&vcpu->kvm->mmu_lock);
5194
5195                 if (indirect_shadow_pages)
5196                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5197
5198                 return true;
5199         }
5200
5201         /*
5202          * if emulation was due to access to shadowed page table
5203          * and it failed try to unshadow page and re-enter the
5204          * guest to let CPU execute the instruction.
5205          */
5206         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5207
5208         /*
5209          * If the access faults on its page table, it can not
5210          * be fixed by unprotecting shadow page and it should
5211          * be reported to userspace.
5212          */
5213         return !write_fault_to_shadow_pgtable;
5214 }
5215
5216 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5217                               unsigned long cr2,  int emulation_type)
5218 {
5219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5220         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5221
5222         last_retry_eip = vcpu->arch.last_retry_eip;
5223         last_retry_addr = vcpu->arch.last_retry_addr;
5224
5225         /*
5226          * If the emulation is caused by #PF and it is non-page_table
5227          * writing instruction, it means the VM-EXIT is caused by shadow
5228          * page protected, we can zap the shadow page and retry this
5229          * instruction directly.
5230          *
5231          * Note: if the guest uses a non-page-table modifying instruction
5232          * on the PDE that points to the instruction, then we will unmap
5233          * the instruction and go to an infinite loop. So, we cache the
5234          * last retried eip and the last fault address, if we meet the eip
5235          * and the address again, we can break out of the potential infinite
5236          * loop.
5237          */
5238         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5239
5240         if (!(emulation_type & EMULTYPE_RETRY))
5241                 return false;
5242
5243         if (x86_page_table_writing_insn(ctxt))
5244                 return false;
5245
5246         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5247                 return false;
5248
5249         vcpu->arch.last_retry_eip = ctxt->eip;
5250         vcpu->arch.last_retry_addr = cr2;
5251
5252         if (!vcpu->arch.mmu.direct_map)
5253                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5254
5255         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5256
5257         return true;
5258 }
5259
5260 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5261 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5262
5263 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5264 {
5265         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5266                 /* This is a good place to trace that we are exiting SMM.  */
5267                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5268
5269                 if (unlikely(vcpu->arch.smi_pending)) {
5270                         kvm_make_request(KVM_REQ_SMI, vcpu);
5271                         vcpu->arch.smi_pending = 0;
5272                 } else {
5273                         /* Process a latched INIT, if any.  */
5274                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5275                 }
5276         }
5277
5278         kvm_mmu_reset_context(vcpu);
5279 }
5280
5281 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5282 {
5283         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5284
5285         vcpu->arch.hflags = emul_flags;
5286
5287         if (changed & HF_SMM_MASK)
5288                 kvm_smm_changed(vcpu);
5289 }
5290
5291 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5292                                 unsigned long *db)
5293 {
5294         u32 dr6 = 0;
5295         int i;
5296         u32 enable, rwlen;
5297
5298         enable = dr7;
5299         rwlen = dr7 >> 16;
5300         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5301                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5302                         dr6 |= (1 << i);
5303         return dr6;
5304 }
5305
5306 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5307 {
5308         struct kvm_run *kvm_run = vcpu->run;
5309
5310         /*
5311          * rflags is the old, "raw" value of the flags.  The new value has
5312          * not been saved yet.
5313          *
5314          * This is correct even for TF set by the guest, because "the
5315          * processor will not generate this exception after the instruction
5316          * that sets the TF flag".
5317          */
5318         if (unlikely(rflags & X86_EFLAGS_TF)) {
5319                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5320                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5321                                                   DR6_RTM;
5322                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5323                         kvm_run->debug.arch.exception = DB_VECTOR;
5324                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5325                         *r = EMULATE_USER_EXIT;
5326                 } else {
5327                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5328                         /*
5329                          * "Certain debug exceptions may clear bit 0-3.  The
5330                          * remaining contents of the DR6 register are never
5331                          * cleared by the processor".
5332                          */
5333                         vcpu->arch.dr6 &= ~15;
5334                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5335                         kvm_queue_exception(vcpu, DB_VECTOR);
5336                 }
5337         }
5338 }
5339
5340 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5341 {
5342         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5343             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5344                 struct kvm_run *kvm_run = vcpu->run;
5345                 unsigned long eip = kvm_get_linear_rip(vcpu);
5346                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5347                                            vcpu->arch.guest_debug_dr7,
5348                                            vcpu->arch.eff_db);
5349
5350                 if (dr6 != 0) {
5351                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5352                         kvm_run->debug.arch.pc = eip;
5353                         kvm_run->debug.arch.exception = DB_VECTOR;
5354                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5355                         *r = EMULATE_USER_EXIT;
5356                         return true;
5357                 }
5358         }
5359
5360         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5361             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5362                 unsigned long eip = kvm_get_linear_rip(vcpu);
5363                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5364                                            vcpu->arch.dr7,
5365                                            vcpu->arch.db);
5366
5367                 if (dr6 != 0) {
5368                         vcpu->arch.dr6 &= ~15;
5369                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5370                         kvm_queue_exception(vcpu, DB_VECTOR);
5371                         *r = EMULATE_DONE;
5372                         return true;
5373                 }
5374         }
5375
5376         return false;
5377 }
5378
5379 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5380                             unsigned long cr2,
5381                             int emulation_type,
5382                             void *insn,
5383                             int insn_len)
5384 {
5385         int r;
5386         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5387         bool writeback = true;
5388         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5389
5390         /*
5391          * Clear write_fault_to_shadow_pgtable here to ensure it is
5392          * never reused.
5393          */
5394         vcpu->arch.write_fault_to_shadow_pgtable = false;
5395         kvm_clear_exception_queue(vcpu);
5396
5397         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5398                 init_emulate_ctxt(vcpu);
5399
5400                 /*
5401                  * We will reenter on the same instruction since
5402                  * we do not set complete_userspace_io.  This does not
5403                  * handle watchpoints yet, those would be handled in
5404                  * the emulate_ops.
5405                  */
5406                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5407                         return r;
5408
5409                 ctxt->interruptibility = 0;
5410                 ctxt->have_exception = false;
5411                 ctxt->exception.vector = -1;
5412                 ctxt->perm_ok = false;
5413
5414                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5415
5416                 r = x86_decode_insn(ctxt, insn, insn_len);
5417
5418                 trace_kvm_emulate_insn_start(vcpu);
5419                 ++vcpu->stat.insn_emulation;
5420                 if (r != EMULATION_OK)  {
5421                         if (emulation_type & EMULTYPE_TRAP_UD)
5422                                 return EMULATE_FAIL;
5423                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5424                                                 emulation_type))
5425                                 return EMULATE_DONE;
5426                         if (emulation_type & EMULTYPE_SKIP)
5427                                 return EMULATE_FAIL;
5428                         return handle_emulation_failure(vcpu);
5429                 }
5430         }
5431
5432         if (emulation_type & EMULTYPE_SKIP) {
5433                 kvm_rip_write(vcpu, ctxt->_eip);
5434                 if (ctxt->eflags & X86_EFLAGS_RF)
5435                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5436                 return EMULATE_DONE;
5437         }
5438
5439         if (retry_instruction(ctxt, cr2, emulation_type))
5440                 return EMULATE_DONE;
5441
5442         /* this is needed for vmware backdoor interface to work since it
5443            changes registers values  during IO operation */
5444         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5445                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5446                 emulator_invalidate_register_cache(ctxt);
5447         }
5448
5449 restart:
5450         r = x86_emulate_insn(ctxt);
5451
5452         if (r == EMULATION_INTERCEPTED)
5453                 return EMULATE_DONE;
5454
5455         if (r == EMULATION_FAILED) {
5456                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5457                                         emulation_type))
5458                         return EMULATE_DONE;
5459
5460                 return handle_emulation_failure(vcpu);
5461         }
5462
5463         if (ctxt->have_exception) {
5464                 r = EMULATE_DONE;
5465                 if (inject_emulated_exception(vcpu))
5466                         return r;
5467         } else if (vcpu->arch.pio.count) {
5468                 if (!vcpu->arch.pio.in) {
5469                         /* FIXME: return into emulator if single-stepping.  */
5470                         vcpu->arch.pio.count = 0;
5471                 } else {
5472                         writeback = false;
5473                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5474                 }
5475                 r = EMULATE_USER_EXIT;
5476         } else if (vcpu->mmio_needed) {
5477                 if (!vcpu->mmio_is_write)
5478                         writeback = false;
5479                 r = EMULATE_USER_EXIT;
5480                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5481         } else if (r == EMULATION_RESTART)
5482                 goto restart;
5483         else
5484                 r = EMULATE_DONE;
5485
5486         if (writeback) {
5487                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5488                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5489                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5490                 if (vcpu->arch.hflags != ctxt->emul_flags)
5491                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5492                 kvm_rip_write(vcpu, ctxt->eip);
5493                 if (r == EMULATE_DONE)
5494                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5495                 if (!ctxt->have_exception ||
5496                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5497                         __kvm_set_rflags(vcpu, ctxt->eflags);
5498
5499                 /*
5500                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5501                  * do nothing, and it will be requested again as soon as
5502                  * the shadow expires.  But we still need to check here,
5503                  * because POPF has no interrupt shadow.
5504                  */
5505                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5506                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5507         } else
5508                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5509
5510         return r;
5511 }
5512 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5513
5514 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5515 {
5516         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5517         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5518                                             size, port, &val, 1);
5519         /* do not return to emulator after return from userspace */
5520         vcpu->arch.pio.count = 0;
5521         return ret;
5522 }
5523 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5524
5525 static void tsc_bad(void *info)
5526 {
5527         __this_cpu_write(cpu_tsc_khz, 0);
5528 }
5529
5530 static void tsc_khz_changed(void *data)
5531 {
5532         struct cpufreq_freqs *freq = data;
5533         unsigned long khz = 0;
5534
5535         if (data)
5536                 khz = freq->new;
5537         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5538                 khz = cpufreq_quick_get(raw_smp_processor_id());
5539         if (!khz)
5540                 khz = tsc_khz;
5541         __this_cpu_write(cpu_tsc_khz, khz);
5542 }
5543
5544 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5545                                      void *data)
5546 {
5547         struct cpufreq_freqs *freq = data;
5548         struct kvm *kvm;
5549         struct kvm_vcpu *vcpu;
5550         int i, send_ipi = 0;
5551
5552         /*
5553          * We allow guests to temporarily run on slowing clocks,
5554          * provided we notify them after, or to run on accelerating
5555          * clocks, provided we notify them before.  Thus time never
5556          * goes backwards.
5557          *
5558          * However, we have a problem.  We can't atomically update
5559          * the frequency of a given CPU from this function; it is
5560          * merely a notifier, which can be called from any CPU.
5561          * Changing the TSC frequency at arbitrary points in time
5562          * requires a recomputation of local variables related to
5563          * the TSC for each VCPU.  We must flag these local variables
5564          * to be updated and be sure the update takes place with the
5565          * new frequency before any guests proceed.
5566          *
5567          * Unfortunately, the combination of hotplug CPU and frequency
5568          * change creates an intractable locking scenario; the order
5569          * of when these callouts happen is undefined with respect to
5570          * CPU hotplug, and they can race with each other.  As such,
5571          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5572          * undefined; you can actually have a CPU frequency change take
5573          * place in between the computation of X and the setting of the
5574          * variable.  To protect against this problem, all updates of
5575          * the per_cpu tsc_khz variable are done in an interrupt
5576          * protected IPI, and all callers wishing to update the value
5577          * must wait for a synchronous IPI to complete (which is trivial
5578          * if the caller is on the CPU already).  This establishes the
5579          * necessary total order on variable updates.
5580          *
5581          * Note that because a guest time update may take place
5582          * anytime after the setting of the VCPU's request bit, the
5583          * correct TSC value must be set before the request.  However,
5584          * to ensure the update actually makes it to any guest which
5585          * starts running in hardware virtualization between the set
5586          * and the acquisition of the spinlock, we must also ping the
5587          * CPU after setting the request bit.
5588          *
5589          */
5590
5591         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5592                 return 0;
5593         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5594                 return 0;
5595
5596         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5597
5598         spin_lock(&kvm_lock);
5599         list_for_each_entry(kvm, &vm_list, vm_list) {
5600                 kvm_for_each_vcpu(i, vcpu, kvm) {
5601                         if (vcpu->cpu != freq->cpu)
5602                                 continue;
5603                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5604                         if (vcpu->cpu != smp_processor_id())
5605                                 send_ipi = 1;
5606                 }
5607         }
5608         spin_unlock(&kvm_lock);
5609
5610         if (freq->old < freq->new && send_ipi) {
5611                 /*
5612                  * We upscale the frequency.  Must make the guest
5613                  * doesn't see old kvmclock values while running with
5614                  * the new frequency, otherwise we risk the guest sees
5615                  * time go backwards.
5616                  *
5617                  * In case we update the frequency for another cpu
5618                  * (which might be in guest context) send an interrupt
5619                  * to kick the cpu out of guest context.  Next time
5620                  * guest context is entered kvmclock will be updated,
5621                  * so the guest will not see stale values.
5622                  */
5623                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5624         }
5625         return 0;
5626 }
5627
5628 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5629         .notifier_call  = kvmclock_cpufreq_notifier
5630 };
5631
5632 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5633                                         unsigned long action, void *hcpu)
5634 {
5635         unsigned int cpu = (unsigned long)hcpu;
5636
5637         switch (action) {
5638                 case CPU_ONLINE:
5639                 case CPU_DOWN_FAILED:
5640                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5641                         break;
5642                 case CPU_DOWN_PREPARE:
5643                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5644                         break;
5645         }
5646         return NOTIFY_OK;
5647 }
5648
5649 static struct notifier_block kvmclock_cpu_notifier_block = {
5650         .notifier_call  = kvmclock_cpu_notifier,
5651         .priority = -INT_MAX
5652 };
5653
5654 static void kvm_timer_init(void)
5655 {
5656         int cpu;
5657
5658         max_tsc_khz = tsc_khz;
5659
5660         cpu_notifier_register_begin();
5661         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5662 #ifdef CONFIG_CPU_FREQ
5663                 struct cpufreq_policy policy;
5664                 memset(&policy, 0, sizeof(policy));
5665                 cpu = get_cpu();
5666                 cpufreq_get_policy(&policy, cpu);
5667                 if (policy.cpuinfo.max_freq)
5668                         max_tsc_khz = policy.cpuinfo.max_freq;
5669                 put_cpu();
5670 #endif
5671                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5672                                           CPUFREQ_TRANSITION_NOTIFIER);
5673         }
5674         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5675         for_each_online_cpu(cpu)
5676                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5677
5678         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5679         cpu_notifier_register_done();
5680
5681 }
5682
5683 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5684
5685 int kvm_is_in_guest(void)
5686 {
5687         return __this_cpu_read(current_vcpu) != NULL;
5688 }
5689
5690 static int kvm_is_user_mode(void)
5691 {
5692         int user_mode = 3;
5693
5694         if (__this_cpu_read(current_vcpu))
5695                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5696
5697         return user_mode != 0;
5698 }
5699
5700 static unsigned long kvm_get_guest_ip(void)
5701 {
5702         unsigned long ip = 0;
5703
5704         if (__this_cpu_read(current_vcpu))
5705                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5706
5707         return ip;
5708 }
5709
5710 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5711         .is_in_guest            = kvm_is_in_guest,
5712         .is_user_mode           = kvm_is_user_mode,
5713         .get_guest_ip           = kvm_get_guest_ip,
5714 };
5715
5716 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5717 {
5718         __this_cpu_write(current_vcpu, vcpu);
5719 }
5720 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5721
5722 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5723 {
5724         __this_cpu_write(current_vcpu, NULL);
5725 }
5726 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5727
5728 static void kvm_set_mmio_spte_mask(void)
5729 {
5730         u64 mask;
5731         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5732
5733         /*
5734          * Set the reserved bits and the present bit of an paging-structure
5735          * entry to generate page fault with PFER.RSV = 1.
5736          */
5737          /* Mask the reserved physical address bits. */
5738         mask = rsvd_bits(maxphyaddr, 51);
5739
5740         /* Bit 62 is always reserved for 32bit host. */
5741         mask |= 0x3ull << 62;
5742
5743         /* Set the present bit. */
5744         mask |= 1ull;
5745
5746 #ifdef CONFIG_X86_64
5747         /*
5748          * If reserved bit is not supported, clear the present bit to disable
5749          * mmio page fault.
5750          */
5751         if (maxphyaddr == 52)
5752                 mask &= ~1ull;
5753 #endif
5754
5755         kvm_mmu_set_mmio_spte_mask(mask);
5756 }
5757
5758 #ifdef CONFIG_X86_64
5759 static void pvclock_gtod_update_fn(struct work_struct *work)
5760 {
5761         struct kvm *kvm;
5762
5763         struct kvm_vcpu *vcpu;
5764         int i;
5765
5766         spin_lock(&kvm_lock);
5767         list_for_each_entry(kvm, &vm_list, vm_list)
5768                 kvm_for_each_vcpu(i, vcpu, kvm)
5769                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5770         atomic_set(&kvm_guest_has_master_clock, 0);
5771         spin_unlock(&kvm_lock);
5772 }
5773
5774 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5775
5776 /*
5777  * Notification about pvclock gtod data update.
5778  */
5779 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5780                                void *priv)
5781 {
5782         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5783         struct timekeeper *tk = priv;
5784
5785         update_pvclock_gtod(tk);
5786
5787         /* disable master clock if host does not trust, or does not
5788          * use, TSC clocksource
5789          */
5790         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5791             atomic_read(&kvm_guest_has_master_clock) != 0)
5792                 queue_work(system_long_wq, &pvclock_gtod_work);
5793
5794         return 0;
5795 }
5796
5797 static struct notifier_block pvclock_gtod_notifier = {
5798         .notifier_call = pvclock_gtod_notify,
5799 };
5800 #endif
5801
5802 int kvm_arch_init(void *opaque)
5803 {
5804         int r;
5805         struct kvm_x86_ops *ops = opaque;
5806
5807         if (kvm_x86_ops) {
5808                 printk(KERN_ERR "kvm: already loaded the other module\n");
5809                 r = -EEXIST;
5810                 goto out;
5811         }
5812
5813         if (!ops->cpu_has_kvm_support()) {
5814                 printk(KERN_ERR "kvm: no hardware support\n");
5815                 r = -EOPNOTSUPP;
5816                 goto out;
5817         }
5818         if (ops->disabled_by_bios()) {
5819                 printk(KERN_ERR "kvm: disabled by bios\n");
5820                 r = -EOPNOTSUPP;
5821                 goto out;
5822         }
5823
5824         r = -ENOMEM;
5825         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5826         if (!shared_msrs) {
5827                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5828                 goto out;
5829         }
5830
5831         r = kvm_mmu_module_init();
5832         if (r)
5833                 goto out_free_percpu;
5834
5835         kvm_set_mmio_spte_mask();
5836
5837         kvm_x86_ops = ops;
5838
5839         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5840                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5841
5842         kvm_timer_init();
5843
5844         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5845
5846         if (cpu_has_xsave)
5847                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5848
5849         kvm_lapic_init();
5850 #ifdef CONFIG_X86_64
5851         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5852 #endif
5853
5854         return 0;
5855
5856 out_free_percpu:
5857         free_percpu(shared_msrs);
5858 out:
5859         return r;
5860 }
5861
5862 void kvm_arch_exit(void)
5863 {
5864         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5865
5866         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5867                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5868                                             CPUFREQ_TRANSITION_NOTIFIER);
5869         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5870 #ifdef CONFIG_X86_64
5871         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5872 #endif
5873         kvm_x86_ops = NULL;
5874         kvm_mmu_module_exit();
5875         free_percpu(shared_msrs);
5876 }
5877
5878 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5879 {
5880         ++vcpu->stat.halt_exits;
5881         if (lapic_in_kernel(vcpu)) {
5882                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5883                 return 1;
5884         } else {
5885                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5886                 return 0;
5887         }
5888 }
5889 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5890
5891 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5892 {
5893         kvm_x86_ops->skip_emulated_instruction(vcpu);
5894         return kvm_vcpu_halt(vcpu);
5895 }
5896 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5897
5898 /*
5899  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5900  *
5901  * @apicid - apicid of vcpu to be kicked.
5902  */
5903 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5904 {
5905         struct kvm_lapic_irq lapic_irq;
5906
5907         lapic_irq.shorthand = 0;
5908         lapic_irq.dest_mode = 0;
5909         lapic_irq.dest_id = apicid;
5910         lapic_irq.msi_redir_hint = false;
5911
5912         lapic_irq.delivery_mode = APIC_DM_REMRD;
5913         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5914 }
5915
5916 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5917 {
5918         vcpu->arch.apicv_active = false;
5919         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5920 }
5921
5922 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5923 {
5924         unsigned long nr, a0, a1, a2, a3, ret;
5925         int op_64_bit, r = 1;
5926
5927         kvm_x86_ops->skip_emulated_instruction(vcpu);
5928
5929         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5930                 return kvm_hv_hypercall(vcpu);
5931
5932         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5933         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5934         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5935         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5936         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5937
5938         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5939
5940         op_64_bit = is_64_bit_mode(vcpu);
5941         if (!op_64_bit) {
5942                 nr &= 0xFFFFFFFF;
5943                 a0 &= 0xFFFFFFFF;
5944                 a1 &= 0xFFFFFFFF;
5945                 a2 &= 0xFFFFFFFF;
5946                 a3 &= 0xFFFFFFFF;
5947         }
5948
5949         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5950                 ret = -KVM_EPERM;
5951                 goto out;
5952         }
5953
5954         switch (nr) {
5955         case KVM_HC_VAPIC_POLL_IRQ:
5956                 ret = 0;
5957                 break;
5958         case KVM_HC_KICK_CPU:
5959                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5960                 ret = 0;
5961                 break;
5962         default:
5963                 ret = -KVM_ENOSYS;
5964                 break;
5965         }
5966 out:
5967         if (!op_64_bit)
5968                 ret = (u32)ret;
5969         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5970         ++vcpu->stat.hypercalls;
5971         return r;
5972 }
5973 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5974
5975 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5976 {
5977         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5978         char instruction[3];
5979         unsigned long rip = kvm_rip_read(vcpu);
5980
5981         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5982
5983         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5984 }
5985
5986 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5987 {
5988         return vcpu->run->request_interrupt_window &&
5989                 likely(!pic_in_kernel(vcpu->kvm));
5990 }
5991
5992 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5993 {
5994         struct kvm_run *kvm_run = vcpu->run;
5995
5996         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5997         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5998         kvm_run->cr8 = kvm_get_cr8(vcpu);
5999         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6000         kvm_run->ready_for_interrupt_injection =
6001                 pic_in_kernel(vcpu->kvm) ||
6002                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6003 }
6004
6005 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6006 {
6007         int max_irr, tpr;
6008
6009         if (!kvm_x86_ops->update_cr8_intercept)
6010                 return;
6011
6012         if (!lapic_in_kernel(vcpu))
6013                 return;
6014
6015         if (vcpu->arch.apicv_active)
6016                 return;
6017
6018         if (!vcpu->arch.apic->vapic_addr)
6019                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6020         else
6021                 max_irr = -1;
6022
6023         if (max_irr != -1)
6024                 max_irr >>= 4;
6025
6026         tpr = kvm_lapic_get_cr8(vcpu);
6027
6028         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6029 }
6030
6031 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6032 {
6033         int r;
6034
6035         /* try to reinject previous events if any */
6036         if (vcpu->arch.exception.pending) {
6037                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6038                                         vcpu->arch.exception.has_error_code,
6039                                         vcpu->arch.exception.error_code);
6040
6041                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6042                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6043                                              X86_EFLAGS_RF);
6044
6045                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6046                     (vcpu->arch.dr7 & DR7_GD)) {
6047                         vcpu->arch.dr7 &= ~DR7_GD;
6048                         kvm_update_dr7(vcpu);
6049                 }
6050
6051                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6052                                           vcpu->arch.exception.has_error_code,
6053                                           vcpu->arch.exception.error_code,
6054                                           vcpu->arch.exception.reinject);
6055                 return 0;
6056         }
6057
6058         if (vcpu->arch.nmi_injected) {
6059                 kvm_x86_ops->set_nmi(vcpu);
6060                 return 0;
6061         }
6062
6063         if (vcpu->arch.interrupt.pending) {
6064                 kvm_x86_ops->set_irq(vcpu);
6065                 return 0;
6066         }
6067
6068         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6069                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6070                 if (r != 0)
6071                         return r;
6072         }
6073
6074         /* try to inject new event if pending */
6075         if (vcpu->arch.nmi_pending) {
6076                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6077                         --vcpu->arch.nmi_pending;
6078                         vcpu->arch.nmi_injected = true;
6079                         kvm_x86_ops->set_nmi(vcpu);
6080                 }
6081         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6082                 /*
6083                  * Because interrupts can be injected asynchronously, we are
6084                  * calling check_nested_events again here to avoid a race condition.
6085                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6086                  * proposal and current concerns.  Perhaps we should be setting
6087                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6088                  */
6089                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6090                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6091                         if (r != 0)
6092                                 return r;
6093                 }
6094                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6095                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6096                                             false);
6097                         kvm_x86_ops->set_irq(vcpu);
6098                 }
6099         }
6100         return 0;
6101 }
6102
6103 static void process_nmi(struct kvm_vcpu *vcpu)
6104 {
6105         unsigned limit = 2;
6106
6107         /*
6108          * x86 is limited to one NMI running, and one NMI pending after it.
6109          * If an NMI is already in progress, limit further NMIs to just one.
6110          * Otherwise, allow two (and we'll inject the first one immediately).
6111          */
6112         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6113                 limit = 1;
6114
6115         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6116         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6117         kvm_make_request(KVM_REQ_EVENT, vcpu);
6118 }
6119
6120 #define put_smstate(type, buf, offset, val)                       \
6121         *(type *)((buf) + (offset) - 0x7e00) = val
6122
6123 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6124 {
6125         u32 flags = 0;
6126         flags |= seg->g       << 23;
6127         flags |= seg->db      << 22;
6128         flags |= seg->l       << 21;
6129         flags |= seg->avl     << 20;
6130         flags |= seg->present << 15;
6131         flags |= seg->dpl     << 13;
6132         flags |= seg->s       << 12;
6133         flags |= seg->type    << 8;
6134         return flags;
6135 }
6136
6137 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6138 {
6139         struct kvm_segment seg;
6140         int offset;
6141
6142         kvm_get_segment(vcpu, &seg, n);
6143         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6144
6145         if (n < 3)
6146                 offset = 0x7f84 + n * 12;
6147         else
6148                 offset = 0x7f2c + (n - 3) * 12;
6149
6150         put_smstate(u32, buf, offset + 8, seg.base);
6151         put_smstate(u32, buf, offset + 4, seg.limit);
6152         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6153 }
6154
6155 #ifdef CONFIG_X86_64
6156 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6157 {
6158         struct kvm_segment seg;
6159         int offset;
6160         u16 flags;
6161
6162         kvm_get_segment(vcpu, &seg, n);
6163         offset = 0x7e00 + n * 16;
6164
6165         flags = process_smi_get_segment_flags(&seg) >> 8;
6166         put_smstate(u16, buf, offset, seg.selector);
6167         put_smstate(u16, buf, offset + 2, flags);
6168         put_smstate(u32, buf, offset + 4, seg.limit);
6169         put_smstate(u64, buf, offset + 8, seg.base);
6170 }
6171 #endif
6172
6173 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6174 {
6175         struct desc_ptr dt;
6176         struct kvm_segment seg;
6177         unsigned long val;
6178         int i;
6179
6180         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6181         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6182         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6183         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6184
6185         for (i = 0; i < 8; i++)
6186                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6187
6188         kvm_get_dr(vcpu, 6, &val);
6189         put_smstate(u32, buf, 0x7fcc, (u32)val);
6190         kvm_get_dr(vcpu, 7, &val);
6191         put_smstate(u32, buf, 0x7fc8, (u32)val);
6192
6193         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6194         put_smstate(u32, buf, 0x7fc4, seg.selector);
6195         put_smstate(u32, buf, 0x7f64, seg.base);
6196         put_smstate(u32, buf, 0x7f60, seg.limit);
6197         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6198
6199         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6200         put_smstate(u32, buf, 0x7fc0, seg.selector);
6201         put_smstate(u32, buf, 0x7f80, seg.base);
6202         put_smstate(u32, buf, 0x7f7c, seg.limit);
6203         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6204
6205         kvm_x86_ops->get_gdt(vcpu, &dt);
6206         put_smstate(u32, buf, 0x7f74, dt.address);
6207         put_smstate(u32, buf, 0x7f70, dt.size);
6208
6209         kvm_x86_ops->get_idt(vcpu, &dt);
6210         put_smstate(u32, buf, 0x7f58, dt.address);
6211         put_smstate(u32, buf, 0x7f54, dt.size);
6212
6213         for (i = 0; i < 6; i++)
6214                 process_smi_save_seg_32(vcpu, buf, i);
6215
6216         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6217
6218         /* revision id */
6219         put_smstate(u32, buf, 0x7efc, 0x00020000);
6220         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6221 }
6222
6223 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6224 {
6225 #ifdef CONFIG_X86_64
6226         struct desc_ptr dt;
6227         struct kvm_segment seg;
6228         unsigned long val;
6229         int i;
6230
6231         for (i = 0; i < 16; i++)
6232                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6233
6234         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6235         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6236
6237         kvm_get_dr(vcpu, 6, &val);
6238         put_smstate(u64, buf, 0x7f68, val);
6239         kvm_get_dr(vcpu, 7, &val);
6240         put_smstate(u64, buf, 0x7f60, val);
6241
6242         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6243         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6244         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6245
6246         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6247
6248         /* revision id */
6249         put_smstate(u32, buf, 0x7efc, 0x00020064);
6250
6251         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6252
6253         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6254         put_smstate(u16, buf, 0x7e90, seg.selector);
6255         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6256         put_smstate(u32, buf, 0x7e94, seg.limit);
6257         put_smstate(u64, buf, 0x7e98, seg.base);
6258
6259         kvm_x86_ops->get_idt(vcpu, &dt);
6260         put_smstate(u32, buf, 0x7e84, dt.size);
6261         put_smstate(u64, buf, 0x7e88, dt.address);
6262
6263         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6264         put_smstate(u16, buf, 0x7e70, seg.selector);
6265         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6266         put_smstate(u32, buf, 0x7e74, seg.limit);
6267         put_smstate(u64, buf, 0x7e78, seg.base);
6268
6269         kvm_x86_ops->get_gdt(vcpu, &dt);
6270         put_smstate(u32, buf, 0x7e64, dt.size);
6271         put_smstate(u64, buf, 0x7e68, dt.address);
6272
6273         for (i = 0; i < 6; i++)
6274                 process_smi_save_seg_64(vcpu, buf, i);
6275 #else
6276         WARN_ON_ONCE(1);
6277 #endif
6278 }
6279
6280 static void process_smi(struct kvm_vcpu *vcpu)
6281 {
6282         struct kvm_segment cs, ds;
6283         struct desc_ptr dt;
6284         char buf[512];
6285         u32 cr0;
6286
6287         if (is_smm(vcpu)) {
6288                 vcpu->arch.smi_pending = true;
6289                 return;
6290         }
6291
6292         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6293         vcpu->arch.hflags |= HF_SMM_MASK;
6294         memset(buf, 0, 512);
6295         if (guest_cpuid_has_longmode(vcpu))
6296                 process_smi_save_state_64(vcpu, buf);
6297         else
6298                 process_smi_save_state_32(vcpu, buf);
6299
6300         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6301
6302         if (kvm_x86_ops->get_nmi_mask(vcpu))
6303                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6304         else
6305                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6306
6307         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6308         kvm_rip_write(vcpu, 0x8000);
6309
6310         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6311         kvm_x86_ops->set_cr0(vcpu, cr0);
6312         vcpu->arch.cr0 = cr0;
6313
6314         kvm_x86_ops->set_cr4(vcpu, 0);
6315
6316         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6317         dt.address = dt.size = 0;
6318         kvm_x86_ops->set_idt(vcpu, &dt);
6319
6320         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6321
6322         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6323         cs.base = vcpu->arch.smbase;
6324
6325         ds.selector = 0;
6326         ds.base = 0;
6327
6328         cs.limit    = ds.limit = 0xffffffff;
6329         cs.type     = ds.type = 0x3;
6330         cs.dpl      = ds.dpl = 0;
6331         cs.db       = ds.db = 0;
6332         cs.s        = ds.s = 1;
6333         cs.l        = ds.l = 0;
6334         cs.g        = ds.g = 1;
6335         cs.avl      = ds.avl = 0;
6336         cs.present  = ds.present = 1;
6337         cs.unusable = ds.unusable = 0;
6338         cs.padding  = ds.padding = 0;
6339
6340         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6341         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6342         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6343         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6344         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6345         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6346
6347         if (guest_cpuid_has_longmode(vcpu))
6348                 kvm_x86_ops->set_efer(vcpu, 0);
6349
6350         kvm_update_cpuid(vcpu);
6351         kvm_mmu_reset_context(vcpu);
6352 }
6353
6354 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6355 {
6356         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6357 }
6358
6359 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6360 {
6361         u64 eoi_exit_bitmap[4];
6362
6363         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6364                 return;
6365
6366         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6367
6368         if (irqchip_split(vcpu->kvm))
6369                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6370         else {
6371                 if (vcpu->arch.apicv_active)
6372                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6373                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6374         }
6375         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6376                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6377         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6378 }
6379
6380 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6381 {
6382         ++vcpu->stat.tlb_flush;
6383         kvm_x86_ops->tlb_flush(vcpu);
6384 }
6385
6386 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6387 {
6388         struct page *page = NULL;
6389
6390         if (!lapic_in_kernel(vcpu))
6391                 return;
6392
6393         if (!kvm_x86_ops->set_apic_access_page_addr)
6394                 return;
6395
6396         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6397         if (is_error_page(page))
6398                 return;
6399         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6400
6401         /*
6402          * Do not pin apic access page in memory, the MMU notifier
6403          * will call us again if it is migrated or swapped out.
6404          */
6405         put_page(page);
6406 }
6407 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6408
6409 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6410                                            unsigned long address)
6411 {
6412         /*
6413          * The physical address of apic access page is stored in the VMCS.
6414          * Update it when it becomes invalid.
6415          */
6416         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6417                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6418 }
6419
6420 /*
6421  * Returns 1 to let vcpu_run() continue the guest execution loop without
6422  * exiting to the userspace.  Otherwise, the value will be returned to the
6423  * userspace.
6424  */
6425 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6426 {
6427         int r;
6428         bool req_int_win =
6429                 dm_request_for_irq_injection(vcpu) &&
6430                 kvm_cpu_accept_dm_intr(vcpu);
6431
6432         bool req_immediate_exit = false;
6433
6434         if (vcpu->requests) {
6435                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6436                         kvm_mmu_unload(vcpu);
6437                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6438                         __kvm_migrate_timers(vcpu);
6439                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6440                         kvm_gen_update_masterclock(vcpu->kvm);
6441                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6442                         kvm_gen_kvmclock_update(vcpu);
6443                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6444                         r = kvm_guest_time_update(vcpu);
6445                         if (unlikely(r))
6446                                 goto out;
6447                 }
6448                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6449                         kvm_mmu_sync_roots(vcpu);
6450                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6451                         kvm_vcpu_flush_tlb(vcpu);
6452                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6453                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6454                         r = 0;
6455                         goto out;
6456                 }
6457                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6458                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6459                         r = 0;
6460                         goto out;
6461                 }
6462                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6463                         vcpu->fpu_active = 0;
6464                         kvm_x86_ops->fpu_deactivate(vcpu);
6465                 }
6466                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6467                         /* Page is swapped out. Do synthetic halt */
6468                         vcpu->arch.apf.halted = true;
6469                         r = 1;
6470                         goto out;
6471                 }
6472                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6473                         record_steal_time(vcpu);
6474                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6475                         process_smi(vcpu);
6476                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6477                         process_nmi(vcpu);
6478                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6479                         kvm_pmu_handle_event(vcpu);
6480                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6481                         kvm_pmu_deliver_pmi(vcpu);
6482                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6483                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6484                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6485                                      vcpu->arch.ioapic_handled_vectors)) {
6486                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6487                                 vcpu->run->eoi.vector =
6488                                                 vcpu->arch.pending_ioapic_eoi;
6489                                 r = 0;
6490                                 goto out;
6491                         }
6492                 }
6493                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6494                         vcpu_scan_ioapic(vcpu);
6495                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6496                         kvm_vcpu_reload_apic_access_page(vcpu);
6497                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6498                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6499                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6500                         r = 0;
6501                         goto out;
6502                 }
6503                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6504                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6505                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6506                         r = 0;
6507                         goto out;
6508                 }
6509                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6510                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6511                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6512                         r = 0;
6513                         goto out;
6514                 }
6515
6516                 /*
6517                  * KVM_REQ_HV_STIMER has to be processed after
6518                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6519                  * depend on the guest clock being up-to-date
6520                  */
6521                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6522                         kvm_hv_process_stimers(vcpu);
6523         }
6524
6525         /*
6526          * KVM_REQ_EVENT is not set when posted interrupts are set by
6527          * VT-d hardware, so we have to update RVI unconditionally.
6528          */
6529         if (kvm_lapic_enabled(vcpu)) {
6530                 /*
6531                  * Update architecture specific hints for APIC
6532                  * virtual interrupt delivery.
6533                  */
6534                 if (vcpu->arch.apicv_active)
6535                         kvm_x86_ops->hwapic_irr_update(vcpu,
6536                                 kvm_lapic_find_highest_irr(vcpu));
6537         }
6538
6539         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6540                 kvm_apic_accept_events(vcpu);
6541                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6542                         r = 1;
6543                         goto out;
6544                 }
6545
6546                 if (inject_pending_event(vcpu, req_int_win) != 0)
6547                         req_immediate_exit = true;
6548                 /* enable NMI/IRQ window open exits if needed */
6549                 else if (vcpu->arch.nmi_pending)
6550                         kvm_x86_ops->enable_nmi_window(vcpu);
6551                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6552                         kvm_x86_ops->enable_irq_window(vcpu);
6553
6554                 if (kvm_lapic_enabled(vcpu)) {
6555                         update_cr8_intercept(vcpu);
6556                         kvm_lapic_sync_to_vapic(vcpu);
6557                 }
6558         }
6559
6560         r = kvm_mmu_reload(vcpu);
6561         if (unlikely(r)) {
6562                 goto cancel_injection;
6563         }
6564
6565         preempt_disable();
6566
6567         kvm_x86_ops->prepare_guest_switch(vcpu);
6568         if (vcpu->fpu_active)
6569                 kvm_load_guest_fpu(vcpu);
6570         kvm_load_guest_xcr0(vcpu);
6571
6572         vcpu->mode = IN_GUEST_MODE;
6573
6574         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6575
6576         /* We should set ->mode before check ->requests,
6577          * see the comment in make_all_cpus_request.
6578          */
6579         smp_mb__after_srcu_read_unlock();
6580
6581         local_irq_disable();
6582
6583         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6584             || need_resched() || signal_pending(current)) {
6585                 vcpu->mode = OUTSIDE_GUEST_MODE;
6586                 smp_wmb();
6587                 local_irq_enable();
6588                 preempt_enable();
6589                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6590                 r = 1;
6591                 goto cancel_injection;
6592         }
6593
6594         if (req_immediate_exit)
6595                 smp_send_reschedule(vcpu->cpu);
6596
6597         trace_kvm_entry(vcpu->vcpu_id);
6598         wait_lapic_expire(vcpu);
6599         __kvm_guest_enter();
6600
6601         if (unlikely(vcpu->arch.switch_db_regs)) {
6602                 set_debugreg(0, 7);
6603                 set_debugreg(vcpu->arch.eff_db[0], 0);
6604                 set_debugreg(vcpu->arch.eff_db[1], 1);
6605                 set_debugreg(vcpu->arch.eff_db[2], 2);
6606                 set_debugreg(vcpu->arch.eff_db[3], 3);
6607                 set_debugreg(vcpu->arch.dr6, 6);
6608                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6609         }
6610
6611         kvm_x86_ops->run(vcpu);
6612
6613         /*
6614          * Do this here before restoring debug registers on the host.  And
6615          * since we do this before handling the vmexit, a DR access vmexit
6616          * can (a) read the correct value of the debug registers, (b) set
6617          * KVM_DEBUGREG_WONT_EXIT again.
6618          */
6619         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6620                 int i;
6621
6622                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6623                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6624                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6625                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6626         }
6627
6628         /*
6629          * If the guest has used debug registers, at least dr7
6630          * will be disabled while returning to the host.
6631          * If we don't have active breakpoints in the host, we don't
6632          * care about the messed up debug address registers. But if
6633          * we have some of them active, restore the old state.
6634          */
6635         if (hw_breakpoint_active())
6636                 hw_breakpoint_restore();
6637
6638         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6639
6640         vcpu->mode = OUTSIDE_GUEST_MODE;
6641         smp_wmb();
6642
6643         /* Interrupt is enabled by handle_external_intr() */
6644         kvm_x86_ops->handle_external_intr(vcpu);
6645
6646         ++vcpu->stat.exits;
6647
6648         /*
6649          * We must have an instruction between local_irq_enable() and
6650          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6651          * the interrupt shadow.  The stat.exits increment will do nicely.
6652          * But we need to prevent reordering, hence this barrier():
6653          */
6654         barrier();
6655
6656         kvm_guest_exit();
6657
6658         preempt_enable();
6659
6660         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6661
6662         /*
6663          * Profile KVM exit RIPs:
6664          */
6665         if (unlikely(prof_on == KVM_PROFILING)) {
6666                 unsigned long rip = kvm_rip_read(vcpu);
6667                 profile_hit(KVM_PROFILING, (void *)rip);
6668         }
6669
6670         if (unlikely(vcpu->arch.tsc_always_catchup))
6671                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6672
6673         if (vcpu->arch.apic_attention)
6674                 kvm_lapic_sync_from_vapic(vcpu);
6675
6676         r = kvm_x86_ops->handle_exit(vcpu);
6677         return r;
6678
6679 cancel_injection:
6680         kvm_x86_ops->cancel_injection(vcpu);
6681         if (unlikely(vcpu->arch.apic_attention))
6682                 kvm_lapic_sync_from_vapic(vcpu);
6683 out:
6684         return r;
6685 }
6686
6687 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6688 {
6689         if (!kvm_arch_vcpu_runnable(vcpu) &&
6690             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6691                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6692                 kvm_vcpu_block(vcpu);
6693                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6694
6695                 if (kvm_x86_ops->post_block)
6696                         kvm_x86_ops->post_block(vcpu);
6697
6698                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6699                         return 1;
6700         }
6701
6702         kvm_apic_accept_events(vcpu);
6703         switch(vcpu->arch.mp_state) {
6704         case KVM_MP_STATE_HALTED:
6705                 vcpu->arch.pv.pv_unhalted = false;
6706                 vcpu->arch.mp_state =
6707                         KVM_MP_STATE_RUNNABLE;
6708         case KVM_MP_STATE_RUNNABLE:
6709                 vcpu->arch.apf.halted = false;
6710                 break;
6711         case KVM_MP_STATE_INIT_RECEIVED:
6712                 break;
6713         default:
6714                 return -EINTR;
6715                 break;
6716         }
6717         return 1;
6718 }
6719
6720 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6721 {
6722         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6723                 !vcpu->arch.apf.halted);
6724 }
6725
6726 static int vcpu_run(struct kvm_vcpu *vcpu)
6727 {
6728         int r;
6729         struct kvm *kvm = vcpu->kvm;
6730
6731         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6732
6733         for (;;) {
6734                 if (kvm_vcpu_running(vcpu)) {
6735                         r = vcpu_enter_guest(vcpu);
6736                 } else {
6737                         r = vcpu_block(kvm, vcpu);
6738                 }
6739
6740                 if (r <= 0)
6741                         break;
6742
6743                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6744                 if (kvm_cpu_has_pending_timer(vcpu))
6745                         kvm_inject_pending_timer_irqs(vcpu);
6746
6747                 if (dm_request_for_irq_injection(vcpu) &&
6748                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6749                         r = 0;
6750                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6751                         ++vcpu->stat.request_irq_exits;
6752                         break;
6753                 }
6754
6755                 kvm_check_async_pf_completion(vcpu);
6756
6757                 if (signal_pending(current)) {
6758                         r = -EINTR;
6759                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6760                         ++vcpu->stat.signal_exits;
6761                         break;
6762                 }
6763                 if (need_resched()) {
6764                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6765                         cond_resched();
6766                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6767                 }
6768         }
6769
6770         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6771
6772         return r;
6773 }
6774
6775 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6776 {
6777         int r;
6778         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6779         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6780         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6781         if (r != EMULATE_DONE)
6782                 return 0;
6783         return 1;
6784 }
6785
6786 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6787 {
6788         BUG_ON(!vcpu->arch.pio.count);
6789
6790         return complete_emulated_io(vcpu);
6791 }
6792
6793 /*
6794  * Implements the following, as a state machine:
6795  *
6796  * read:
6797  *   for each fragment
6798  *     for each mmio piece in the fragment
6799  *       write gpa, len
6800  *       exit
6801  *       copy data
6802  *   execute insn
6803  *
6804  * write:
6805  *   for each fragment
6806  *     for each mmio piece in the fragment
6807  *       write gpa, len
6808  *       copy data
6809  *       exit
6810  */
6811 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6812 {
6813         struct kvm_run *run = vcpu->run;
6814         struct kvm_mmio_fragment *frag;
6815         unsigned len;
6816
6817         BUG_ON(!vcpu->mmio_needed);
6818
6819         /* Complete previous fragment */
6820         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6821         len = min(8u, frag->len);
6822         if (!vcpu->mmio_is_write)
6823                 memcpy(frag->data, run->mmio.data, len);
6824
6825         if (frag->len <= 8) {
6826                 /* Switch to the next fragment. */
6827                 frag++;
6828                 vcpu->mmio_cur_fragment++;
6829         } else {
6830                 /* Go forward to the next mmio piece. */
6831                 frag->data += len;
6832                 frag->gpa += len;
6833                 frag->len -= len;
6834         }
6835
6836         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6837                 vcpu->mmio_needed = 0;
6838
6839                 /* FIXME: return into emulator if single-stepping.  */
6840                 if (vcpu->mmio_is_write)
6841                         return 1;
6842                 vcpu->mmio_read_completed = 1;
6843                 return complete_emulated_io(vcpu);
6844         }
6845
6846         run->exit_reason = KVM_EXIT_MMIO;
6847         run->mmio.phys_addr = frag->gpa;
6848         if (vcpu->mmio_is_write)
6849                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6850         run->mmio.len = min(8u, frag->len);
6851         run->mmio.is_write = vcpu->mmio_is_write;
6852         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6853         return 0;
6854 }
6855
6856
6857 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6858 {
6859         struct fpu *fpu = &current->thread.fpu;
6860         int r;
6861         sigset_t sigsaved;
6862
6863         fpu__activate_curr(fpu);
6864
6865         if (vcpu->sigset_active)
6866                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6867
6868         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6869                 kvm_vcpu_block(vcpu);
6870                 kvm_apic_accept_events(vcpu);
6871                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6872                 r = -EAGAIN;
6873                 goto out;
6874         }
6875
6876         /* re-sync apic's tpr */
6877         if (!lapic_in_kernel(vcpu)) {
6878                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6879                         r = -EINVAL;
6880                         goto out;
6881                 }
6882         }
6883
6884         if (unlikely(vcpu->arch.complete_userspace_io)) {
6885                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6886                 vcpu->arch.complete_userspace_io = NULL;
6887                 r = cui(vcpu);
6888                 if (r <= 0)
6889                         goto out;
6890         } else
6891                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6892
6893         r = vcpu_run(vcpu);
6894
6895 out:
6896         post_kvm_run_save(vcpu);
6897         if (vcpu->sigset_active)
6898                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6899
6900         return r;
6901 }
6902
6903 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6904 {
6905         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6906                 /*
6907                  * We are here if userspace calls get_regs() in the middle of
6908                  * instruction emulation. Registers state needs to be copied
6909                  * back from emulation context to vcpu. Userspace shouldn't do
6910                  * that usually, but some bad designed PV devices (vmware
6911                  * backdoor interface) need this to work
6912                  */
6913                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6914                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6915         }
6916         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6917         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6918         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6919         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6920         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6921         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6922         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6923         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6924 #ifdef CONFIG_X86_64
6925         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6926         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6927         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6928         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6929         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6930         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6931         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6932         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6933 #endif
6934
6935         regs->rip = kvm_rip_read(vcpu);
6936         regs->rflags = kvm_get_rflags(vcpu);
6937
6938         return 0;
6939 }
6940
6941 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6942 {
6943         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6944         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6945
6946         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6947         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6948         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6949         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6950         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6951         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6952         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6953         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6954 #ifdef CONFIG_X86_64
6955         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6956         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6957         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6958         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6959         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6960         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6961         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6962         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6963 #endif
6964
6965         kvm_rip_write(vcpu, regs->rip);
6966         kvm_set_rflags(vcpu, regs->rflags);
6967
6968         vcpu->arch.exception.pending = false;
6969
6970         kvm_make_request(KVM_REQ_EVENT, vcpu);
6971
6972         return 0;
6973 }
6974
6975 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6976 {
6977         struct kvm_segment cs;
6978
6979         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6980         *db = cs.db;
6981         *l = cs.l;
6982 }
6983 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6984
6985 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6986                                   struct kvm_sregs *sregs)
6987 {
6988         struct desc_ptr dt;
6989
6990         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6991         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6992         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6993         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6994         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6995         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6996
6997         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6998         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6999
7000         kvm_x86_ops->get_idt(vcpu, &dt);
7001         sregs->idt.limit = dt.size;
7002         sregs->idt.base = dt.address;
7003         kvm_x86_ops->get_gdt(vcpu, &dt);
7004         sregs->gdt.limit = dt.size;
7005         sregs->gdt.base = dt.address;
7006
7007         sregs->cr0 = kvm_read_cr0(vcpu);
7008         sregs->cr2 = vcpu->arch.cr2;
7009         sregs->cr3 = kvm_read_cr3(vcpu);
7010         sregs->cr4 = kvm_read_cr4(vcpu);
7011         sregs->cr8 = kvm_get_cr8(vcpu);
7012         sregs->efer = vcpu->arch.efer;
7013         sregs->apic_base = kvm_get_apic_base(vcpu);
7014
7015         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7016
7017         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7018                 set_bit(vcpu->arch.interrupt.nr,
7019                         (unsigned long *)sregs->interrupt_bitmap);
7020
7021         return 0;
7022 }
7023
7024 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7025                                     struct kvm_mp_state *mp_state)
7026 {
7027         kvm_apic_accept_events(vcpu);
7028         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7029                                         vcpu->arch.pv.pv_unhalted)
7030                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7031         else
7032                 mp_state->mp_state = vcpu->arch.mp_state;
7033
7034         return 0;
7035 }
7036
7037 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7038                                     struct kvm_mp_state *mp_state)
7039 {
7040         if (!lapic_in_kernel(vcpu) &&
7041             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7042                 return -EINVAL;
7043
7044         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7045                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7046                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7047         } else
7048                 vcpu->arch.mp_state = mp_state->mp_state;
7049         kvm_make_request(KVM_REQ_EVENT, vcpu);
7050         return 0;
7051 }
7052
7053 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7054                     int reason, bool has_error_code, u32 error_code)
7055 {
7056         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7057         int ret;
7058
7059         init_emulate_ctxt(vcpu);
7060
7061         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7062                                    has_error_code, error_code);
7063
7064         if (ret)
7065                 return EMULATE_FAIL;
7066
7067         kvm_rip_write(vcpu, ctxt->eip);
7068         kvm_set_rflags(vcpu, ctxt->eflags);
7069         kvm_make_request(KVM_REQ_EVENT, vcpu);
7070         return EMULATE_DONE;
7071 }
7072 EXPORT_SYMBOL_GPL(kvm_task_switch);
7073
7074 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7075                                   struct kvm_sregs *sregs)
7076 {
7077         struct msr_data apic_base_msr;
7078         int mmu_reset_needed = 0;
7079         int pending_vec, max_bits, idx;
7080         struct desc_ptr dt;
7081
7082         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7083                 return -EINVAL;
7084
7085         dt.size = sregs->idt.limit;
7086         dt.address = sregs->idt.base;
7087         kvm_x86_ops->set_idt(vcpu, &dt);
7088         dt.size = sregs->gdt.limit;
7089         dt.address = sregs->gdt.base;
7090         kvm_x86_ops->set_gdt(vcpu, &dt);
7091
7092         vcpu->arch.cr2 = sregs->cr2;
7093         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7094         vcpu->arch.cr3 = sregs->cr3;
7095         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7096
7097         kvm_set_cr8(vcpu, sregs->cr8);
7098
7099         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7100         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7101         apic_base_msr.data = sregs->apic_base;
7102         apic_base_msr.host_initiated = true;
7103         kvm_set_apic_base(vcpu, &apic_base_msr);
7104
7105         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7106         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7107         vcpu->arch.cr0 = sregs->cr0;
7108
7109         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7110         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7111         if (sregs->cr4 & X86_CR4_OSXSAVE)
7112                 kvm_update_cpuid(vcpu);
7113
7114         idx = srcu_read_lock(&vcpu->kvm->srcu);
7115         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7116                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7117                 mmu_reset_needed = 1;
7118         }
7119         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7120
7121         if (mmu_reset_needed)
7122                 kvm_mmu_reset_context(vcpu);
7123
7124         max_bits = KVM_NR_INTERRUPTS;
7125         pending_vec = find_first_bit(
7126                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7127         if (pending_vec < max_bits) {
7128                 kvm_queue_interrupt(vcpu, pending_vec, false);
7129                 pr_debug("Set back pending irq %d\n", pending_vec);
7130         }
7131
7132         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7133         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7134         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7135         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7136         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7137         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7138
7139         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7140         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7141
7142         update_cr8_intercept(vcpu);
7143
7144         /* Older userspace won't unhalt the vcpu on reset. */
7145         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7146             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7147             !is_protmode(vcpu))
7148                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7149
7150         kvm_make_request(KVM_REQ_EVENT, vcpu);
7151
7152         return 0;
7153 }
7154
7155 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7156                                         struct kvm_guest_debug *dbg)
7157 {
7158         unsigned long rflags;
7159         int i, r;
7160
7161         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7162                 r = -EBUSY;
7163                 if (vcpu->arch.exception.pending)
7164                         goto out;
7165                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7166                         kvm_queue_exception(vcpu, DB_VECTOR);
7167                 else
7168                         kvm_queue_exception(vcpu, BP_VECTOR);
7169         }
7170
7171         /*
7172          * Read rflags as long as potentially injected trace flags are still
7173          * filtered out.
7174          */
7175         rflags = kvm_get_rflags(vcpu);
7176
7177         vcpu->guest_debug = dbg->control;
7178         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7179                 vcpu->guest_debug = 0;
7180
7181         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7182                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7183                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7184                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7185         } else {
7186                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7187                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7188         }
7189         kvm_update_dr7(vcpu);
7190
7191         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7192                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7193                         get_segment_base(vcpu, VCPU_SREG_CS);
7194
7195         /*
7196          * Trigger an rflags update that will inject or remove the trace
7197          * flags.
7198          */
7199         kvm_set_rflags(vcpu, rflags);
7200
7201         kvm_x86_ops->update_bp_intercept(vcpu);
7202
7203         r = 0;
7204
7205 out:
7206
7207         return r;
7208 }
7209
7210 /*
7211  * Translate a guest virtual address to a guest physical address.
7212  */
7213 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7214                                     struct kvm_translation *tr)
7215 {
7216         unsigned long vaddr = tr->linear_address;
7217         gpa_t gpa;
7218         int idx;
7219
7220         idx = srcu_read_lock(&vcpu->kvm->srcu);
7221         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7222         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7223         tr->physical_address = gpa;
7224         tr->valid = gpa != UNMAPPED_GVA;
7225         tr->writeable = 1;
7226         tr->usermode = 0;
7227
7228         return 0;
7229 }
7230
7231 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7232 {
7233         struct fxregs_state *fxsave =
7234                         &vcpu->arch.guest_fpu.state.fxsave;
7235
7236         memcpy(fpu->fpr, fxsave->st_space, 128);
7237         fpu->fcw = fxsave->cwd;
7238         fpu->fsw = fxsave->swd;
7239         fpu->ftwx = fxsave->twd;
7240         fpu->last_opcode = fxsave->fop;
7241         fpu->last_ip = fxsave->rip;
7242         fpu->last_dp = fxsave->rdp;
7243         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7244
7245         return 0;
7246 }
7247
7248 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7249 {
7250         struct fxregs_state *fxsave =
7251                         &vcpu->arch.guest_fpu.state.fxsave;
7252
7253         memcpy(fxsave->st_space, fpu->fpr, 128);
7254         fxsave->cwd = fpu->fcw;
7255         fxsave->swd = fpu->fsw;
7256         fxsave->twd = fpu->ftwx;
7257         fxsave->fop = fpu->last_opcode;
7258         fxsave->rip = fpu->last_ip;
7259         fxsave->rdp = fpu->last_dp;
7260         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7261
7262         return 0;
7263 }
7264
7265 static void fx_init(struct kvm_vcpu *vcpu)
7266 {
7267         fpstate_init(&vcpu->arch.guest_fpu.state);
7268         if (cpu_has_xsaves)
7269                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7270                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7271
7272         /*
7273          * Ensure guest xcr0 is valid for loading
7274          */
7275         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7276
7277         vcpu->arch.cr0 |= X86_CR0_ET;
7278 }
7279
7280 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7281 {
7282         if (vcpu->guest_fpu_loaded)
7283                 return;
7284
7285         /*
7286          * Restore all possible states in the guest,
7287          * and assume host would use all available bits.
7288          * Guest xcr0 would be loaded later.
7289          */
7290         kvm_put_guest_xcr0(vcpu);
7291         vcpu->guest_fpu_loaded = 1;
7292         __kernel_fpu_begin();
7293         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7294         trace_kvm_fpu(1);
7295 }
7296
7297 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7298 {
7299         kvm_put_guest_xcr0(vcpu);
7300
7301         if (!vcpu->guest_fpu_loaded) {
7302                 vcpu->fpu_counter = 0;
7303                 return;
7304         }
7305
7306         vcpu->guest_fpu_loaded = 0;
7307         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7308         __kernel_fpu_end();
7309         ++vcpu->stat.fpu_reload;
7310         /*
7311          * If using eager FPU mode, or if the guest is a frequent user
7312          * of the FPU, just leave the FPU active for next time.
7313          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7314          * the FPU in bursts will revert to loading it on demand.
7315          */
7316         if (!vcpu->arch.eager_fpu) {
7317                 if (++vcpu->fpu_counter < 5)
7318                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7319         }
7320         trace_kvm_fpu(0);
7321 }
7322
7323 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7324 {
7325         kvmclock_reset(vcpu);
7326
7327         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7328         kvm_x86_ops->vcpu_free(vcpu);
7329 }
7330
7331 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7332                                                 unsigned int id)
7333 {
7334         struct kvm_vcpu *vcpu;
7335
7336         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7337                 printk_once(KERN_WARNING
7338                 "kvm: SMP vm created on host with unstable TSC; "
7339                 "guest TSC will not be reliable\n");
7340
7341         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7342
7343         return vcpu;
7344 }
7345
7346 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7347 {
7348         int r;
7349
7350         kvm_vcpu_mtrr_init(vcpu);
7351         r = vcpu_load(vcpu);
7352         if (r)
7353                 return r;
7354         kvm_vcpu_reset(vcpu, false);
7355         kvm_mmu_setup(vcpu);
7356         vcpu_put(vcpu);
7357         return r;
7358 }
7359
7360 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7361 {
7362         struct msr_data msr;
7363         struct kvm *kvm = vcpu->kvm;
7364
7365         if (vcpu_load(vcpu))
7366                 return;
7367         msr.data = 0x0;
7368         msr.index = MSR_IA32_TSC;
7369         msr.host_initiated = true;
7370         kvm_write_tsc(vcpu, &msr);
7371         vcpu_put(vcpu);
7372
7373         if (!kvmclock_periodic_sync)
7374                 return;
7375
7376         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7377                                         KVMCLOCK_SYNC_PERIOD);
7378 }
7379
7380 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7381 {
7382         int r;
7383         vcpu->arch.apf.msr_val = 0;
7384
7385         r = vcpu_load(vcpu);
7386         BUG_ON(r);
7387         kvm_mmu_unload(vcpu);
7388         vcpu_put(vcpu);
7389
7390         kvm_x86_ops->vcpu_free(vcpu);
7391 }
7392
7393 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7394 {
7395         vcpu->arch.hflags = 0;
7396
7397         atomic_set(&vcpu->arch.nmi_queued, 0);
7398         vcpu->arch.nmi_pending = 0;
7399         vcpu->arch.nmi_injected = false;
7400         kvm_clear_interrupt_queue(vcpu);
7401         kvm_clear_exception_queue(vcpu);
7402
7403         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7404         kvm_update_dr0123(vcpu);
7405         vcpu->arch.dr6 = DR6_INIT;
7406         kvm_update_dr6(vcpu);
7407         vcpu->arch.dr7 = DR7_FIXED_1;
7408         kvm_update_dr7(vcpu);
7409
7410         vcpu->arch.cr2 = 0;
7411
7412         kvm_make_request(KVM_REQ_EVENT, vcpu);
7413         vcpu->arch.apf.msr_val = 0;
7414         vcpu->arch.st.msr_val = 0;
7415
7416         kvmclock_reset(vcpu);
7417
7418         kvm_clear_async_pf_completion_queue(vcpu);
7419         kvm_async_pf_hash_reset(vcpu);
7420         vcpu->arch.apf.halted = false;
7421
7422         if (!init_event) {
7423                 kvm_pmu_reset(vcpu);
7424                 vcpu->arch.smbase = 0x30000;
7425         }
7426
7427         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7428         vcpu->arch.regs_avail = ~0;
7429         vcpu->arch.regs_dirty = ~0;
7430
7431         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7432 }
7433
7434 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7435 {
7436         struct kvm_segment cs;
7437
7438         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7439         cs.selector = vector << 8;
7440         cs.base = vector << 12;
7441         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7442         kvm_rip_write(vcpu, 0);
7443 }
7444
7445 int kvm_arch_hardware_enable(void)
7446 {
7447         struct kvm *kvm;
7448         struct kvm_vcpu *vcpu;
7449         int i;
7450         int ret;
7451         u64 local_tsc;
7452         u64 max_tsc = 0;
7453         bool stable, backwards_tsc = false;
7454
7455         kvm_shared_msr_cpu_online();
7456         ret = kvm_x86_ops->hardware_enable();
7457         if (ret != 0)
7458                 return ret;
7459
7460         local_tsc = rdtsc();
7461         stable = !check_tsc_unstable();
7462         list_for_each_entry(kvm, &vm_list, vm_list) {
7463                 kvm_for_each_vcpu(i, vcpu, kvm) {
7464                         if (!stable && vcpu->cpu == smp_processor_id())
7465                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7466                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7467                                 backwards_tsc = true;
7468                                 if (vcpu->arch.last_host_tsc > max_tsc)
7469                                         max_tsc = vcpu->arch.last_host_tsc;
7470                         }
7471                 }
7472         }
7473
7474         /*
7475          * Sometimes, even reliable TSCs go backwards.  This happens on
7476          * platforms that reset TSC during suspend or hibernate actions, but
7477          * maintain synchronization.  We must compensate.  Fortunately, we can
7478          * detect that condition here, which happens early in CPU bringup,
7479          * before any KVM threads can be running.  Unfortunately, we can't
7480          * bring the TSCs fully up to date with real time, as we aren't yet far
7481          * enough into CPU bringup that we know how much real time has actually
7482          * elapsed; our helper function, get_kernel_ns() will be using boot
7483          * variables that haven't been updated yet.
7484          *
7485          * So we simply find the maximum observed TSC above, then record the
7486          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7487          * the adjustment will be applied.  Note that we accumulate
7488          * adjustments, in case multiple suspend cycles happen before some VCPU
7489          * gets a chance to run again.  In the event that no KVM threads get a
7490          * chance to run, we will miss the entire elapsed period, as we'll have
7491          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7492          * loose cycle time.  This isn't too big a deal, since the loss will be
7493          * uniform across all VCPUs (not to mention the scenario is extremely
7494          * unlikely). It is possible that a second hibernate recovery happens
7495          * much faster than a first, causing the observed TSC here to be
7496          * smaller; this would require additional padding adjustment, which is
7497          * why we set last_host_tsc to the local tsc observed here.
7498          *
7499          * N.B. - this code below runs only on platforms with reliable TSC,
7500          * as that is the only way backwards_tsc is set above.  Also note
7501          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7502          * have the same delta_cyc adjustment applied if backwards_tsc
7503          * is detected.  Note further, this adjustment is only done once,
7504          * as we reset last_host_tsc on all VCPUs to stop this from being
7505          * called multiple times (one for each physical CPU bringup).
7506          *
7507          * Platforms with unreliable TSCs don't have to deal with this, they
7508          * will be compensated by the logic in vcpu_load, which sets the TSC to
7509          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7510          * guarantee that they stay in perfect synchronization.
7511          */
7512         if (backwards_tsc) {
7513                 u64 delta_cyc = max_tsc - local_tsc;
7514                 backwards_tsc_observed = true;
7515                 list_for_each_entry(kvm, &vm_list, vm_list) {
7516                         kvm_for_each_vcpu(i, vcpu, kvm) {
7517                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7518                                 vcpu->arch.last_host_tsc = local_tsc;
7519                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7520                         }
7521
7522                         /*
7523                          * We have to disable TSC offset matching.. if you were
7524                          * booting a VM while issuing an S4 host suspend....
7525                          * you may have some problem.  Solving this issue is
7526                          * left as an exercise to the reader.
7527                          */
7528                         kvm->arch.last_tsc_nsec = 0;
7529                         kvm->arch.last_tsc_write = 0;
7530                 }
7531
7532         }
7533         return 0;
7534 }
7535
7536 void kvm_arch_hardware_disable(void)
7537 {
7538         kvm_x86_ops->hardware_disable();
7539         drop_user_return_notifiers();
7540 }
7541
7542 int kvm_arch_hardware_setup(void)
7543 {
7544         int r;
7545
7546         r = kvm_x86_ops->hardware_setup();
7547         if (r != 0)
7548                 return r;
7549
7550         if (kvm_has_tsc_control) {
7551                 /*
7552                  * Make sure the user can only configure tsc_khz values that
7553                  * fit into a signed integer.
7554                  * A min value is not calculated needed because it will always
7555                  * be 1 on all machines.
7556                  */
7557                 u64 max = min(0x7fffffffULL,
7558                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7559                 kvm_max_guest_tsc_khz = max;
7560
7561                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7562         }
7563
7564         kvm_init_msr_list();
7565         return 0;
7566 }
7567
7568 void kvm_arch_hardware_unsetup(void)
7569 {
7570         kvm_x86_ops->hardware_unsetup();
7571 }
7572
7573 void kvm_arch_check_processor_compat(void *rtn)
7574 {
7575         kvm_x86_ops->check_processor_compatibility(rtn);
7576 }
7577
7578 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7579 {
7580         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7581 }
7582 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7583
7584 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7585 {
7586         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7587 }
7588
7589 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7590 {
7591         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7592 }
7593
7594 struct static_key kvm_no_apic_vcpu __read_mostly;
7595 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7596
7597 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7598 {
7599         struct page *page;
7600         struct kvm *kvm;
7601         int r;
7602
7603         BUG_ON(vcpu->kvm == NULL);
7604         kvm = vcpu->kvm;
7605
7606         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7607         vcpu->arch.pv.pv_unhalted = false;
7608         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7609         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7610                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7611         else
7612                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7613
7614         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7615         if (!page) {
7616                 r = -ENOMEM;
7617                 goto fail;
7618         }
7619         vcpu->arch.pio_data = page_address(page);
7620
7621         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7622
7623         r = kvm_mmu_create(vcpu);
7624         if (r < 0)
7625                 goto fail_free_pio_data;
7626
7627         if (irqchip_in_kernel(kvm)) {
7628                 r = kvm_create_lapic(vcpu);
7629                 if (r < 0)
7630                         goto fail_mmu_destroy;
7631         } else
7632                 static_key_slow_inc(&kvm_no_apic_vcpu);
7633
7634         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7635                                        GFP_KERNEL);
7636         if (!vcpu->arch.mce_banks) {
7637                 r = -ENOMEM;
7638                 goto fail_free_lapic;
7639         }
7640         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7641
7642         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7643                 r = -ENOMEM;
7644                 goto fail_free_mce_banks;
7645         }
7646
7647         fx_init(vcpu);
7648
7649         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7650         vcpu->arch.pv_time_enabled = false;
7651
7652         vcpu->arch.guest_supported_xcr0 = 0;
7653         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7654
7655         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7656
7657         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7658
7659         kvm_async_pf_hash_reset(vcpu);
7660         kvm_pmu_init(vcpu);
7661
7662         vcpu->arch.pending_external_vector = -1;
7663
7664         kvm_hv_vcpu_init(vcpu);
7665
7666         return 0;
7667
7668 fail_free_mce_banks:
7669         kfree(vcpu->arch.mce_banks);
7670 fail_free_lapic:
7671         kvm_free_lapic(vcpu);
7672 fail_mmu_destroy:
7673         kvm_mmu_destroy(vcpu);
7674 fail_free_pio_data:
7675         free_page((unsigned long)vcpu->arch.pio_data);
7676 fail:
7677         return r;
7678 }
7679
7680 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7681 {
7682         int idx;
7683
7684         kvm_hv_vcpu_uninit(vcpu);
7685         kvm_pmu_destroy(vcpu);
7686         kfree(vcpu->arch.mce_banks);
7687         kvm_free_lapic(vcpu);
7688         idx = srcu_read_lock(&vcpu->kvm->srcu);
7689         kvm_mmu_destroy(vcpu);
7690         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7691         free_page((unsigned long)vcpu->arch.pio_data);
7692         if (!lapic_in_kernel(vcpu))
7693                 static_key_slow_dec(&kvm_no_apic_vcpu);
7694 }
7695
7696 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7697 {
7698         kvm_x86_ops->sched_in(vcpu, cpu);
7699 }
7700
7701 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7702 {
7703         if (type)
7704                 return -EINVAL;
7705
7706         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7707         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7708         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7709         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7710         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7711
7712         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7713         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7714         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7715         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7716                 &kvm->arch.irq_sources_bitmap);
7717
7718         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7719         mutex_init(&kvm->arch.apic_map_lock);
7720         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7721
7722         pvclock_update_vm_gtod_copy(kvm);
7723
7724         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7725         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7726
7727         return 0;
7728 }
7729
7730 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7731 {
7732         int r;
7733         r = vcpu_load(vcpu);
7734         BUG_ON(r);
7735         kvm_mmu_unload(vcpu);
7736         vcpu_put(vcpu);
7737 }
7738
7739 static void kvm_free_vcpus(struct kvm *kvm)
7740 {
7741         unsigned int i;
7742         struct kvm_vcpu *vcpu;
7743
7744         /*
7745          * Unpin any mmu pages first.
7746          */
7747         kvm_for_each_vcpu(i, vcpu, kvm) {
7748                 kvm_clear_async_pf_completion_queue(vcpu);
7749                 kvm_unload_vcpu_mmu(vcpu);
7750         }
7751         kvm_for_each_vcpu(i, vcpu, kvm)
7752                 kvm_arch_vcpu_free(vcpu);
7753
7754         mutex_lock(&kvm->lock);
7755         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7756                 kvm->vcpus[i] = NULL;
7757
7758         atomic_set(&kvm->online_vcpus, 0);
7759         mutex_unlock(&kvm->lock);
7760 }
7761
7762 void kvm_arch_sync_events(struct kvm *kvm)
7763 {
7764         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7765         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7766         kvm_free_all_assigned_devices(kvm);
7767         kvm_free_pit(kvm);
7768 }
7769
7770 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7771 {
7772         int i, r;
7773         unsigned long hva;
7774         struct kvm_memslots *slots = kvm_memslots(kvm);
7775         struct kvm_memory_slot *slot, old;
7776
7777         /* Called with kvm->slots_lock held.  */
7778         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7779                 return -EINVAL;
7780
7781         slot = id_to_memslot(slots, id);
7782         if (size) {
7783                 if (WARN_ON(slot->npages))
7784                         return -EEXIST;
7785
7786                 /*
7787                  * MAP_SHARED to prevent internal slot pages from being moved
7788                  * by fork()/COW.
7789                  */
7790                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7791                               MAP_SHARED | MAP_ANONYMOUS, 0);
7792                 if (IS_ERR((void *)hva))
7793                         return PTR_ERR((void *)hva);
7794         } else {
7795                 if (!slot->npages)
7796                         return 0;
7797
7798                 hva = 0;
7799         }
7800
7801         old = *slot;
7802         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7803                 struct kvm_userspace_memory_region m;
7804
7805                 m.slot = id | (i << 16);
7806                 m.flags = 0;
7807                 m.guest_phys_addr = gpa;
7808                 m.userspace_addr = hva;
7809                 m.memory_size = size;
7810                 r = __kvm_set_memory_region(kvm, &m);
7811                 if (r < 0)
7812                         return r;
7813         }
7814
7815         if (!size) {
7816                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7817                 WARN_ON(r < 0);
7818         }
7819
7820         return 0;
7821 }
7822 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7823
7824 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7825 {
7826         int r;
7827
7828         mutex_lock(&kvm->slots_lock);
7829         r = __x86_set_memory_region(kvm, id, gpa, size);
7830         mutex_unlock(&kvm->slots_lock);
7831
7832         return r;
7833 }
7834 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7835
7836 void kvm_arch_destroy_vm(struct kvm *kvm)
7837 {
7838         if (current->mm == kvm->mm) {
7839                 /*
7840                  * Free memory regions allocated on behalf of userspace,
7841                  * unless the the memory map has changed due to process exit
7842                  * or fd copying.
7843                  */
7844                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7845                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7846                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7847         }
7848         kvm_iommu_unmap_guest(kvm);
7849         kfree(kvm->arch.vpic);
7850         kfree(kvm->arch.vioapic);
7851         kvm_free_vcpus(kvm);
7852         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7853 }
7854
7855 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7856                            struct kvm_memory_slot *dont)
7857 {
7858         int i;
7859
7860         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7861                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7862                         kvfree(free->arch.rmap[i]);
7863                         free->arch.rmap[i] = NULL;
7864                 }
7865                 if (i == 0)
7866                         continue;
7867
7868                 if (!dont || free->arch.lpage_info[i - 1] !=
7869                              dont->arch.lpage_info[i - 1]) {
7870                         kvfree(free->arch.lpage_info[i - 1]);
7871                         free->arch.lpage_info[i - 1] = NULL;
7872                 }
7873         }
7874 }
7875
7876 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7877                             unsigned long npages)
7878 {
7879         int i;
7880
7881         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7882                 unsigned long ugfn;
7883                 int lpages;
7884                 int level = i + 1;
7885
7886                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7887                                       slot->base_gfn, level) + 1;
7888
7889                 slot->arch.rmap[i] =
7890                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7891                 if (!slot->arch.rmap[i])
7892                         goto out_free;
7893                 if (i == 0)
7894                         continue;
7895
7896                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7897                                         sizeof(*slot->arch.lpage_info[i - 1]));
7898                 if (!slot->arch.lpage_info[i - 1])
7899                         goto out_free;
7900
7901                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7902                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7903                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7904                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7905                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7906                 /*
7907                  * If the gfn and userspace address are not aligned wrt each
7908                  * other, or if explicitly asked to, disable large page
7909                  * support for this slot
7910                  */
7911                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7912                     !kvm_largepages_enabled()) {
7913                         unsigned long j;
7914
7915                         for (j = 0; j < lpages; ++j)
7916                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7917                 }
7918         }
7919
7920         return 0;
7921
7922 out_free:
7923         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7924                 kvfree(slot->arch.rmap[i]);
7925                 slot->arch.rmap[i] = NULL;
7926                 if (i == 0)
7927                         continue;
7928
7929                 kvfree(slot->arch.lpage_info[i - 1]);
7930                 slot->arch.lpage_info[i - 1] = NULL;
7931         }
7932         return -ENOMEM;
7933 }
7934
7935 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7936 {
7937         /*
7938          * memslots->generation has been incremented.
7939          * mmio generation may have reached its maximum value.
7940          */
7941         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7942 }
7943
7944 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7945                                 struct kvm_memory_slot *memslot,
7946                                 const struct kvm_userspace_memory_region *mem,
7947                                 enum kvm_mr_change change)
7948 {
7949         return 0;
7950 }
7951
7952 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7953                                      struct kvm_memory_slot *new)
7954 {
7955         /* Still write protect RO slot */
7956         if (new->flags & KVM_MEM_READONLY) {
7957                 kvm_mmu_slot_remove_write_access(kvm, new);
7958                 return;
7959         }
7960
7961         /*
7962          * Call kvm_x86_ops dirty logging hooks when they are valid.
7963          *
7964          * kvm_x86_ops->slot_disable_log_dirty is called when:
7965          *
7966          *  - KVM_MR_CREATE with dirty logging is disabled
7967          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7968          *
7969          * The reason is, in case of PML, we need to set D-bit for any slots
7970          * with dirty logging disabled in order to eliminate unnecessary GPA
7971          * logging in PML buffer (and potential PML buffer full VMEXT). This
7972          * guarantees leaving PML enabled during guest's lifetime won't have
7973          * any additonal overhead from PML when guest is running with dirty
7974          * logging disabled for memory slots.
7975          *
7976          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7977          * to dirty logging mode.
7978          *
7979          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7980          *
7981          * In case of write protect:
7982          *
7983          * Write protect all pages for dirty logging.
7984          *
7985          * All the sptes including the large sptes which point to this
7986          * slot are set to readonly. We can not create any new large
7987          * spte on this slot until the end of the logging.
7988          *
7989          * See the comments in fast_page_fault().
7990          */
7991         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7992                 if (kvm_x86_ops->slot_enable_log_dirty)
7993                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7994                 else
7995                         kvm_mmu_slot_remove_write_access(kvm, new);
7996         } else {
7997                 if (kvm_x86_ops->slot_disable_log_dirty)
7998                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7999         }
8000 }
8001
8002 void kvm_arch_commit_memory_region(struct kvm *kvm,
8003                                 const struct kvm_userspace_memory_region *mem,
8004                                 const struct kvm_memory_slot *old,
8005                                 const struct kvm_memory_slot *new,
8006                                 enum kvm_mr_change change)
8007 {
8008         int nr_mmu_pages = 0;
8009
8010         if (!kvm->arch.n_requested_mmu_pages)
8011                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8012
8013         if (nr_mmu_pages)
8014                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8015
8016         /*
8017          * Dirty logging tracks sptes in 4k granularity, meaning that large
8018          * sptes have to be split.  If live migration is successful, the guest
8019          * in the source machine will be destroyed and large sptes will be
8020          * created in the destination. However, if the guest continues to run
8021          * in the source machine (for example if live migration fails), small
8022          * sptes will remain around and cause bad performance.
8023          *
8024          * Scan sptes if dirty logging has been stopped, dropping those
8025          * which can be collapsed into a single large-page spte.  Later
8026          * page faults will create the large-page sptes.
8027          */
8028         if ((change != KVM_MR_DELETE) &&
8029                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8030                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8031                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8032
8033         /*
8034          * Set up write protection and/or dirty logging for the new slot.
8035          *
8036          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8037          * been zapped so no dirty logging staff is needed for old slot. For
8038          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8039          * new and it's also covered when dealing with the new slot.
8040          *
8041          * FIXME: const-ify all uses of struct kvm_memory_slot.
8042          */
8043         if (change != KVM_MR_DELETE)
8044                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8045 }
8046
8047 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8048 {
8049         kvm_mmu_invalidate_zap_all_pages(kvm);
8050 }
8051
8052 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8053                                    struct kvm_memory_slot *slot)
8054 {
8055         kvm_mmu_invalidate_zap_all_pages(kvm);
8056 }
8057
8058 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8059 {
8060         if (!list_empty_careful(&vcpu->async_pf.done))
8061                 return true;
8062
8063         if (kvm_apic_has_events(vcpu))
8064                 return true;
8065
8066         if (vcpu->arch.pv.pv_unhalted)
8067                 return true;
8068
8069         if (atomic_read(&vcpu->arch.nmi_queued))
8070                 return true;
8071
8072         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8073                 return true;
8074
8075         if (kvm_arch_interrupt_allowed(vcpu) &&
8076             kvm_cpu_has_interrupt(vcpu))
8077                 return true;
8078
8079         if (kvm_hv_has_stimer_pending(vcpu))
8080                 return true;
8081
8082         return false;
8083 }
8084
8085 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8086 {
8087         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8088                 kvm_x86_ops->check_nested_events(vcpu, false);
8089
8090         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8091 }
8092
8093 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8094 {
8095         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8096 }
8097
8098 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8099 {
8100         return kvm_x86_ops->interrupt_allowed(vcpu);
8101 }
8102
8103 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8104 {
8105         if (is_64_bit_mode(vcpu))
8106                 return kvm_rip_read(vcpu);
8107         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8108                      kvm_rip_read(vcpu));
8109 }
8110 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8111
8112 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8113 {
8114         return kvm_get_linear_rip(vcpu) == linear_rip;
8115 }
8116 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8117
8118 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8119 {
8120         unsigned long rflags;
8121
8122         rflags = kvm_x86_ops->get_rflags(vcpu);
8123         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8124                 rflags &= ~X86_EFLAGS_TF;
8125         return rflags;
8126 }
8127 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8128
8129 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8130 {
8131         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8132             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8133                 rflags |= X86_EFLAGS_TF;
8134         kvm_x86_ops->set_rflags(vcpu, rflags);
8135 }
8136
8137 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8138 {
8139         __kvm_set_rflags(vcpu, rflags);
8140         kvm_make_request(KVM_REQ_EVENT, vcpu);
8141 }
8142 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8143
8144 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8145 {
8146         int r;
8147
8148         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8149               work->wakeup_all)
8150                 return;
8151
8152         r = kvm_mmu_reload(vcpu);
8153         if (unlikely(r))
8154                 return;
8155
8156         if (!vcpu->arch.mmu.direct_map &&
8157               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8158                 return;
8159
8160         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8161 }
8162
8163 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8164 {
8165         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8166 }
8167
8168 static inline u32 kvm_async_pf_next_probe(u32 key)
8169 {
8170         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8171 }
8172
8173 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8174 {
8175         u32 key = kvm_async_pf_hash_fn(gfn);
8176
8177         while (vcpu->arch.apf.gfns[key] != ~0)
8178                 key = kvm_async_pf_next_probe(key);
8179
8180         vcpu->arch.apf.gfns[key] = gfn;
8181 }
8182
8183 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8184 {
8185         int i;
8186         u32 key = kvm_async_pf_hash_fn(gfn);
8187
8188         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8189                      (vcpu->arch.apf.gfns[key] != gfn &&
8190                       vcpu->arch.apf.gfns[key] != ~0); i++)
8191                 key = kvm_async_pf_next_probe(key);
8192
8193         return key;
8194 }
8195
8196 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8197 {
8198         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8199 }
8200
8201 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8202 {
8203         u32 i, j, k;
8204
8205         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8206         while (true) {
8207                 vcpu->arch.apf.gfns[i] = ~0;
8208                 do {
8209                         j = kvm_async_pf_next_probe(j);
8210                         if (vcpu->arch.apf.gfns[j] == ~0)
8211                                 return;
8212                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8213                         /*
8214                          * k lies cyclically in ]i,j]
8215                          * |    i.k.j |
8216                          * |....j i.k.| or  |.k..j i...|
8217                          */
8218                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8219                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8220                 i = j;
8221         }
8222 }
8223
8224 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8225 {
8226
8227         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8228                                       sizeof(val));
8229 }
8230
8231 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8232                                      struct kvm_async_pf *work)
8233 {
8234         struct x86_exception fault;
8235
8236         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8237         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8238
8239         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8240             (vcpu->arch.apf.send_user_only &&
8241              kvm_x86_ops->get_cpl(vcpu) == 0))
8242                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8243         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8244                 fault.vector = PF_VECTOR;
8245                 fault.error_code_valid = true;
8246                 fault.error_code = 0;
8247                 fault.nested_page_fault = false;
8248                 fault.address = work->arch.token;
8249                 kvm_inject_page_fault(vcpu, &fault);
8250         }
8251 }
8252
8253 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8254                                  struct kvm_async_pf *work)
8255 {
8256         struct x86_exception fault;
8257
8258         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8259         if (work->wakeup_all)
8260                 work->arch.token = ~0; /* broadcast wakeup */
8261         else
8262                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8263
8264         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8265             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8266                 fault.vector = PF_VECTOR;
8267                 fault.error_code_valid = true;
8268                 fault.error_code = 0;
8269                 fault.nested_page_fault = false;
8270                 fault.address = work->arch.token;
8271                 kvm_inject_page_fault(vcpu, &fault);
8272         }
8273         vcpu->arch.apf.halted = false;
8274         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8275 }
8276
8277 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8278 {
8279         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8280                 return true;
8281         else
8282                 return !kvm_event_needs_reinjection(vcpu) &&
8283                         kvm_x86_ops->interrupt_allowed(vcpu);
8284 }
8285
8286 void kvm_arch_start_assignment(struct kvm *kvm)
8287 {
8288         atomic_inc(&kvm->arch.assigned_device_count);
8289 }
8290 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8291
8292 void kvm_arch_end_assignment(struct kvm *kvm)
8293 {
8294         atomic_dec(&kvm->arch.assigned_device_count);
8295 }
8296 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8297
8298 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8299 {
8300         return atomic_read(&kvm->arch.assigned_device_count);
8301 }
8302 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8303
8304 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8305 {
8306         atomic_inc(&kvm->arch.noncoherent_dma_count);
8307 }
8308 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8309
8310 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8311 {
8312         atomic_dec(&kvm->arch.noncoherent_dma_count);
8313 }
8314 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8315
8316 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8317 {
8318         return atomic_read(&kvm->arch.noncoherent_dma_count);
8319 }
8320 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8321
8322 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8323                                       struct irq_bypass_producer *prod)
8324 {
8325         struct kvm_kernel_irqfd *irqfd =
8326                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8327
8328         if (kvm_x86_ops->update_pi_irte) {
8329                 irqfd->producer = prod;
8330                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8331                                 prod->irq, irqfd->gsi, 1);
8332         }
8333
8334         return -EINVAL;
8335 }
8336
8337 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8338                                       struct irq_bypass_producer *prod)
8339 {
8340         int ret;
8341         struct kvm_kernel_irqfd *irqfd =
8342                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8343
8344         if (!kvm_x86_ops->update_pi_irte) {
8345                 WARN_ON(irqfd->producer != NULL);
8346                 return;
8347         }
8348
8349         WARN_ON(irqfd->producer != prod);
8350         irqfd->producer = NULL;
8351
8352         /*
8353          * When producer of consumer is unregistered, we change back to
8354          * remapped mode, so we can re-use the current implementation
8355          * when the irq is masked/disabed or the consumer side (KVM
8356          * int this case doesn't want to receive the interrupts.
8357         */
8358         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8359         if (ret)
8360                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8361                        " fails: %d\n", irqfd->consumer.token, ret);
8362 }
8363
8364 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8365                                    uint32_t guest_irq, bool set)
8366 {
8367         if (!kvm_x86_ops->update_pi_irte)
8368                 return -EINVAL;
8369
8370         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8371 }
8372
8373 bool kvm_vector_hashing_enabled(void)
8374 {
8375         return vector_hashing;
8376 }
8377 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8378
8379 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8380 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8381 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8382 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8383 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8384 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8385 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8386 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8387 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8388 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8389 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8390 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8391 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8392 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8393 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8394 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8395 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);