arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112
 113 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 114 static u32 tsc_tolerance_ppm = 250;
 115 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 116
 117 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 118 unsigned int lapic_timer_advance_ns = 0;
 119 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 120
 121 static bool backwards_tsc_observed = false;
 122
 123 #define KVM_NR_SHARED_MSRS 16
 124
 125 struct kvm_shared_msrs_global {
 126         int nr;
 127         u32 msrs[KVM_NR_SHARED_MSRS];
 128 };
 129
 130 struct kvm_shared_msrs {
 131         struct user_return_notifier urn;
 132         bool registered;
 133         struct kvm_shared_msr_values {
 134                 u64 host;
 135                 u64 curr;
 136         } values[KVM_NR_SHARED_MSRS];
 137 };
 138
 139 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 140 static struct kvm_shared_msrs __percpu *shared_msrs;
 141
 142 struct kvm_stats_debugfs_item debugfs_entries[] = {
 143         { "pf_fixed", VCPU_STAT(pf_fixed) },
 144         { "pf_guest", VCPU_STAT(pf_guest) },
 145         { "tlb_flush", VCPU_STAT(tlb_flush) },
 146         { "invlpg", VCPU_STAT(invlpg) },
 147         { "exits", VCPU_STAT(exits) },
 148         { "io_exits", VCPU_STAT(io_exits) },
 149         { "mmio_exits", VCPU_STAT(mmio_exits) },
 150         { "signal_exits", VCPU_STAT(signal_exits) },
 151         { "irq_window", VCPU_STAT(irq_window_exits) },
 152         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 153         { "halt_exits", VCPU_STAT(halt_exits) },
 154         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 155         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 156         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 157         { "hypercalls", VCPU_STAT(hypercalls) },
 158         { "request_irq", VCPU_STAT(request_irq_exits) },
 159         { "irq_exits", VCPU_STAT(irq_exits) },
 160         { "host_state_reload", VCPU_STAT(host_state_reload) },
 161         { "efer_reload", VCPU_STAT(efer_reload) },
 162         { "fpu_reload", VCPU_STAT(fpu_reload) },
 163         { "insn_emulation", VCPU_STAT(insn_emulation) },
 164         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 165         { "irq_injections", VCPU_STAT(irq_injections) },
 166         { "nmi_injections", VCPU_STAT(nmi_injections) },
 167         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 168         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 169         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 170         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 171         { "mmu_flooded", VM_STAT(mmu_flooded) },
 172         { "mmu_recycled", VM_STAT(mmu_recycled) },
 173         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 174         { "mmu_unsync", VM_STAT(mmu_unsync) },
 175         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 176         { "largepages", VM_STAT(lpages) },
 177         { NULL }
 178 };
 179
 180 u64 __read_mostly host_xcr0;
 181
 182 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 183
 184 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 185 {
 186         int i;
 187         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 188                 vcpu->arch.apf.gfns[i] = ~0;
 189 }
 190
 191 static void kvm_on_user_return(struct user_return_notifier *urn)
 192 {
 193         unsigned slot;
 194         struct kvm_shared_msrs *locals
 195                 = container_of(urn, struct kvm_shared_msrs, urn);
 196         struct kvm_shared_msr_values *values;
 197
 198         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 199                 values = &locals->values[slot];
 200                 if (values->host != values->curr) {
 201                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 202                         values->curr = values->host;
 203                 }
 204         }
 205         locals->registered = false;
 206         user_return_notifier_unregister(urn);
 207 }
 208
 209 static void shared_msr_update(unsigned slot, u32 msr)
 210 {
 211         u64 value;
 212         unsigned int cpu = smp_processor_id();
 213         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 214
 215         /* only read, and nobody should modify it at this time,
 216          * so don't need lock */
 217         if (slot >= shared_msrs_global.nr) {
 218                 printk(KERN_ERR "kvm: invalid MSR slot!");
 219                 return;
 220         }
 221         rdmsrl_safe(msr, &value);
 222         smsr->values[slot].host = value;
 223         smsr->values[slot].curr = value;
 224 }
 225
 226 void kvm_define_shared_msr(unsigned slot, u32 msr)
 227 {
 228         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 229         shared_msrs_global.msrs[slot] = msr;
 230         if (slot >= shared_msrs_global.nr)
 231                 shared_msrs_global.nr = slot + 1;
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 234
 235 static void kvm_shared_msr_cpu_online(void)
 236 {
 237         unsigned i;
 238
 239         for (i = 0; i < shared_msrs_global.nr; ++i)
 240                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 241 }
 242
 243 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 244 {
 245         unsigned int cpu = smp_processor_id();
 246         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 247         int err;
 248
 249         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 250                 return 0;
 251         smsr->values[slot].curr = value;
 252         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 253         if (err)
 254                 return 1;
 255
 256         if (!smsr->registered) {
 257                 smsr->urn.on_user_return = kvm_on_user_return;
 258                 user_return_notifier_register(&smsr->urn);
 259                 smsr->registered = true;
 260         }
 261         return 0;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 264
 265 static void drop_user_return_notifiers(void)
 266 {
 267         unsigned int cpu = smp_processor_id();
 268         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 269
 270         if (smsr->registered)
 271                 kvm_on_user_return(&smsr->urn);
 272 }
 273
 274 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 275 {
 276         return vcpu->arch.apic_base;
 277 }
 278 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 279
 280 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 281 {
 282         u64 old_state = vcpu->arch.apic_base &
 283                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 284         u64 new_state = msr_info->data &
 285                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 286         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 287                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 288
 289         if (!msr_info->host_initiated &&
 290             ((msr_info->data & reserved_bits) != 0 ||
 291              new_state == X2APIC_ENABLE ||
 292              (new_state == MSR_IA32_APICBASE_ENABLE &&
 293               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 294              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 295               old_state == 0)))
 296                 return 1;
 297
 298         kvm_lapic_set_base(vcpu, msr_info->data);
 299         return 0;
 300 }
 301 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 302
 303 asmlinkage __visible void kvm_spurious_fault(void)
 304 {
 305         /* Fault while not rebooting.  We want the trace. */
 306         BUG();
 307 }
 308 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 309
 310 #define EXCPT_BENIGN            0
 311 #define EXCPT_CONTRIBUTORY      1
 312 #define EXCPT_PF                2
 313
 314 static int exception_class(int vector)
 315 {
 316         switch (vector) {
 317         case PF_VECTOR:
 318                 return EXCPT_PF;
 319         case DE_VECTOR:
 320         case TS_VECTOR:
 321         case NP_VECTOR:
 322         case SS_VECTOR:
 323         case GP_VECTOR:
 324                 return EXCPT_CONTRIBUTORY;
 325         default:
 326                 break;
 327         }
 328         return EXCPT_BENIGN;
 329 }
 330
 331 #define EXCPT_FAULT             0
 332 #define EXCPT_TRAP              1
 333 #define EXCPT_ABORT             2
 334 #define EXCPT_INTERRUPT         3
 335
 336 static int exception_type(int vector)
 337 {
 338         unsigned int mask;
 339
 340         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 341                 return EXCPT_INTERRUPT;
 342
 343         mask = 1 << vector;
 344
 345         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 346         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 347                 return EXCPT_TRAP;
 348
 349         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 350                 return EXCPT_ABORT;
 351
 352         /* Reserved exceptions will result in fault */
 353         return EXCPT_FAULT;
 354 }
 355
 356 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 357                 unsigned nr, bool has_error, u32 error_code,
 358                 bool reinject)
 359 {
 360         u32 prev_nr;
 361         int class1, class2;
 362
 363         kvm_make_request(KVM_REQ_EVENT, vcpu);
 364
 365         if (!vcpu->arch.exception.pending) {
 366         queue:
 367                 if (has_error && !is_protmode(vcpu))
 368                         has_error = false;
 369                 vcpu->arch.exception.pending = true;
 370                 vcpu->arch.exception.has_error_code = has_error;
 371                 vcpu->arch.exception.nr = nr;
 372                 vcpu->arch.exception.error_code = error_code;
 373                 vcpu->arch.exception.reinject = reinject;
 374                 return;
 375         }
 376
 377         /* to check exception */
 378         prev_nr = vcpu->arch.exception.nr;
 379         if (prev_nr == DF_VECTOR) {
 380                 /* triple fault -> shutdown */
 381                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 382                 return;
 383         }
 384         class1 = exception_class(prev_nr);
 385         class2 = exception_class(nr);
 386         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 387                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 388                 /* generate double fault per SDM Table 5-5 */
 389                 vcpu->arch.exception.pending = true;
 390                 vcpu->arch.exception.has_error_code = true;
 391                 vcpu->arch.exception.nr = DF_VECTOR;
 392                 vcpu->arch.exception.error_code = 0;
 393         } else
 394                 /* replace previous exception with a new one in a hope
 395                    that instruction re-execution will regenerate lost
 396                    exception */
 397                 goto queue;
 398 }
 399
 400 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 401 {
 402         kvm_multiple_exception(vcpu, nr, false, 0, false);
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 405
 406 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 407 {
 408         kvm_multiple_exception(vcpu, nr, false, 0, true);
 409 }
 410 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 411
 412 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 413 {
 414         if (err)
 415                 kvm_inject_gp(vcpu, 0);
 416         else
 417                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 420
 421 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 422 {
 423         ++vcpu->stat.pf_guest;
 424         vcpu->arch.cr2 = fault->address;
 425         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 428
 429 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 430 {
 431         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 432                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 433         else
 434                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 435
 436         return fault->nested_page_fault;
 437 }
 438
 439 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 440 {
 441         atomic_inc(&vcpu->arch.nmi_queued);
 442         kvm_make_request(KVM_REQ_NMI, vcpu);
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 445
 446 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 447 {
 448         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 451
 452 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 453 {
 454         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 457
 458 /*
 459  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 460  * a #GP and return false.
 461  */
 462 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 463 {
 464         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 465                 return true;
 466         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 467         return false;
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 470
 471 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 472 {
 473         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 474                 return true;
 475
 476         kvm_queue_exception(vcpu, UD_VECTOR);
 477         return false;
 478 }
 479 EXPORT_SYMBOL_GPL(kvm_require_dr);
 480
 481 /*
 482  * This function will be used to read from the physical memory of the currently
 483  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 484  * can read from guest physical or from the guest's guest physical memory.
 485  */
 486 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 487                             gfn_t ngfn, void *data, int offset, int len,
 488                             u32 access)
 489 {
 490         struct x86_exception exception;
 491         gfn_t real_gfn;
 492         gpa_t ngpa;
 493
 494         ngpa     = gfn_to_gpa(ngfn);
 495         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 496         if (real_gfn == UNMAPPED_GVA)
 497                 return -EFAULT;
 498
 499         real_gfn = gpa_to_gfn(real_gfn);
 500
 501         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 502 }
 503 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 504
 505 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 506                                void *data, int offset, int len, u32 access)
 507 {
 508         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 509                                        data, offset, len, access);
 510 }
 511
 512 /*
 513  * Load the pae pdptrs.  Return true is they are all valid.
 514  */
 515 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 516 {
 517         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 518         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 519         int i;
 520         int ret;
 521         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 522
 523         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 524                                       offset * sizeof(u64), sizeof(pdpte),
 525                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 526         if (ret < 0) {
 527                 ret = 0;
 528                 goto out;
 529         }
 530         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 531                 if (is_present_gpte(pdpte[i]) &&
 532                     (pdpte[i] &
 533                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 534                         ret = 0;
 535                         goto out;
 536                 }
 537         }
 538         ret = 1;
 539
 540         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 541         __set_bit(VCPU_EXREG_PDPTR,
 542                   (unsigned long *)&vcpu->arch.regs_avail);
 543         __set_bit(VCPU_EXREG_PDPTR,
 544                   (unsigned long *)&vcpu->arch.regs_dirty);
 545 out:
 546
 547         return ret;
 548 }
 549 EXPORT_SYMBOL_GPL(load_pdptrs);
 550
 551 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 552 {
 553         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 554         bool changed = true;
 555         int offset;
 556         gfn_t gfn;
 557         int r;
 558
 559         if (is_long_mode(vcpu) || !is_pae(vcpu))
 560                 return false;
 561
 562         if (!test_bit(VCPU_EXREG_PDPTR,
 563                       (unsigned long *)&vcpu->arch.regs_avail))
 564                 return true;
 565
 566         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 567         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 568         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 569                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 570         if (r < 0)
 571                 goto out;
 572         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 573 out:
 574
 575         return changed;
 576 }
 577
 578 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 579 {
 580         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 581         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 582
 583         cr0 |= X86_CR0_ET;
 584
 585 #ifdef CONFIG_X86_64
 586         if (cr0 & 0xffffffff00000000UL)
 587                 return 1;
 588 #endif
 589
 590         cr0 &= ~CR0_RESERVED_BITS;
 591
 592         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 593                 return 1;
 594
 595         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 596                 return 1;
 597
 598         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 599 #ifdef CONFIG_X86_64
 600                 if ((vcpu->arch.efer & EFER_LME)) {
 601                         int cs_db, cs_l;
 602
 603                         if (!is_pae(vcpu))
 604                                 return 1;
 605                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 606                         if (cs_l)
 607                                 return 1;
 608                 } else
 609 #endif
 610                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 611                                                  kvm_read_cr3(vcpu)))
 612                         return 1;
 613         }
 614
 615         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 616                 return 1;
 617
 618         kvm_x86_ops->set_cr0(vcpu, cr0);
 619
 620         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 621                 kvm_clear_async_pf_completion_queue(vcpu);
 622                 kvm_async_pf_hash_reset(vcpu);
 623         }
 624
 625         if ((cr0 ^ old_cr0) & update_bits)
 626                 kvm_mmu_reset_context(vcpu);
 627
 628         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 629                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 630
 631         return 0;
 632 }
 633 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 634
 635 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 636 {
 637         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 638 }
 639 EXPORT_SYMBOL_GPL(kvm_lmsw);
 640
 641 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 642 {
 643         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 644                         !vcpu->guest_xcr0_loaded) {
 645                 /* kvm_set_xcr() also depends on this */
 646                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 647                 vcpu->guest_xcr0_loaded = 1;
 648         }
 649 }
 650
 651 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 652 {
 653         if (vcpu->guest_xcr0_loaded) {
 654                 if (vcpu->arch.xcr0 != host_xcr0)
 655                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 656                 vcpu->guest_xcr0_loaded = 0;
 657         }
 658 }
 659
 660 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 661 {
 662         u64 xcr0 = xcr;
 663         u64 old_xcr0 = vcpu->arch.xcr0;
 664         u64 valid_bits;
 665
 666         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 667         if (index != XCR_XFEATURE_ENABLED_MASK)
 668                 return 1;
 669         if (!(xcr0 & XSTATE_FP))
 670                 return 1;
 671         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 672                 return 1;
 673
 674         /*
 675          * Do not allow the guest to set bits that we do not support
 676          * saving.  However, xcr0 bit 0 is always set, even if the
 677          * emulated CPU does not support XSAVE (see fx_init).
 678          */
 679         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 680         if (xcr0 & ~valid_bits)
 681                 return 1;
 682
 683         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 684                 return 1;
 685
 686         if (xcr0 & XSTATE_AVX512) {
 687                 if (!(xcr0 & XSTATE_YMM))
 688                         return 1;
 689                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 690                         return 1;
 691         }
 692         kvm_put_guest_xcr0(vcpu);
 693         vcpu->arch.xcr0 = xcr0;
 694
 695         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 696                 kvm_update_cpuid(vcpu);
 697         return 0;
 698 }
 699
 700 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 701 {
 702         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 703             __kvm_set_xcr(vcpu, index, xcr)) {
 704                 kvm_inject_gp(vcpu, 0);
 705                 return 1;
 706         }
 707         return 0;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 710
 711 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 712 {
 713         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 714         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 715                                    X86_CR4_SMEP | X86_CR4_SMAP;
 716
 717         if (cr4 & CR4_RESERVED_BITS)
 718                 return 1;
 719
 720         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 721                 return 1;
 722
 723         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 724                 return 1;
 725
 726         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 727                 return 1;
 728
 729         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 730                 return 1;
 731
 732         if (is_long_mode(vcpu)) {
 733                 if (!(cr4 & X86_CR4_PAE))
 734                         return 1;
 735         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 736                    && ((cr4 ^ old_cr4) & pdptr_bits)
 737                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 738                                    kvm_read_cr3(vcpu)))
 739                 return 1;
 740
 741         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 742                 if (!guest_cpuid_has_pcid(vcpu))
 743                         return 1;
 744
 745                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 746                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 747                         return 1;
 748         }
 749
 750         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 751                 return 1;
 752
 753         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 754             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 755                 kvm_mmu_reset_context(vcpu);
 756
 757         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 758                 kvm_update_cpuid(vcpu);
 759
 760         return 0;
 761 }
 762 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 763
 764 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 765 {
 766 #ifdef CONFIG_X86_64
 767         cr3 &= ~CR3_PCID_INVD;
 768 #endif
 769
 770         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 771                 kvm_mmu_sync_roots(vcpu);
 772                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 773                 return 0;
 774         }
 775
 776         if (is_long_mode(vcpu)) {
 777                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 778                         return 1;
 779         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 780                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 781                 return 1;
 782
 783         vcpu->arch.cr3 = cr3;
 784         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 785         kvm_mmu_new_cr3(vcpu);
 786         return 0;
 787 }
 788 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 789
 790 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 791 {
 792         if (cr8 & CR8_RESERVED_BITS)
 793                 return 1;
 794         if (lapic_in_kernel(vcpu))
 795                 kvm_lapic_set_tpr(vcpu, cr8);
 796         else
 797                 vcpu->arch.cr8 = cr8;
 798         return 0;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 801
 802 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 803 {
 804         if (lapic_in_kernel(vcpu))
 805                 return kvm_lapic_get_cr8(vcpu);
 806         else
 807                 return vcpu->arch.cr8;
 808 }
 809 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 810
 811 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 812 {
 813         int i;
 814
 815         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 816                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 817                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 818                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 819         }
 820 }
 821
 822 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 823 {
 824         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 825                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 826 }
 827
 828 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 829 {
 830         unsigned long dr7;
 831
 832         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 833                 dr7 = vcpu->arch.guest_debug_dr7;
 834         else
 835                 dr7 = vcpu->arch.dr7;
 836         kvm_x86_ops->set_dr7(vcpu, dr7);
 837         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 838         if (dr7 & DR7_BP_EN_MASK)
 839                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 840 }
 841
 842 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 843 {
 844         u64 fixed = DR6_FIXED_1;
 845
 846         if (!guest_cpuid_has_rtm(vcpu))
 847                 fixed |= DR6_RTM;
 848         return fixed;
 849 }
 850
 851 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 852 {
 853         switch (dr) {
 854         case 0 ... 3:
 855                 vcpu->arch.db[dr] = val;
 856                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 857                         vcpu->arch.eff_db[dr] = val;
 858                 break;
 859         case 4:
 860                 /* fall through */
 861         case 6:
 862                 if (val & 0xffffffff00000000ULL)
 863                         return -1; /* #GP */
 864                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 865                 kvm_update_dr6(vcpu);
 866                 break;
 867         case 5:
 868                 /* fall through */
 869         default: /* 7 */
 870                 if (val & 0xffffffff00000000ULL)
 871                         return -1; /* #GP */
 872                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 873                 kvm_update_dr7(vcpu);
 874                 break;
 875         }
 876
 877         return 0;
 878 }
 879
 880 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 881 {
 882         if (__kvm_set_dr(vcpu, dr, val)) {
 883                 kvm_inject_gp(vcpu, 0);
 884                 return 1;
 885         }
 886         return 0;
 887 }
 888 EXPORT_SYMBOL_GPL(kvm_set_dr);
 889
 890 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 891 {
 892         switch (dr) {
 893         case 0 ... 3:
 894                 *val = vcpu->arch.db[dr];
 895                 break;
 896         case 4:
 897                 /* fall through */
 898         case 6:
 899                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 900                         *val = vcpu->arch.dr6;
 901                 else
 902                         *val = kvm_x86_ops->get_dr6(vcpu);
 903                 break;
 904         case 5:
 905                 /* fall through */
 906         default: /* 7 */
 907                 *val = vcpu->arch.dr7;
 908                 break;
 909         }
 910         return 0;
 911 }
 912 EXPORT_SYMBOL_GPL(kvm_get_dr);
 913
 914 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 915 {
 916         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 917         u64 data;
 918         int err;
 919
 920         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 921         if (err)
 922                 return err;
 923         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 924         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 925         return err;
 926 }
 927 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 928
 929 /*
 930  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 931  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 932  *
 933  * This list is modified at module load time to reflect the
 934  * capabilities of the host cpu. This capabilities test skips MSRs that are
 935  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 936  * may depend on host virtualization features rather than host cpu features.
 937  */
 938
 939 static u32 msrs_to_save[] = {
 940         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 941         MSR_STAR,
 942 #ifdef CONFIG_X86_64
 943         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 944 #endif
 945         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 946         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 947 };
 948
 949 static unsigned num_msrs_to_save;
 950
 951 static u32 emulated_msrs[] = {
 952         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 953         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 954         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 955         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 956         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 957         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 958         HV_X64_MSR_RESET,
 959         HV_X64_MSR_VP_INDEX,
 960         HV_X64_MSR_VP_RUNTIME,
 961         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 962         MSR_KVM_PV_EOI_EN,
 963
 964         MSR_IA32_TSC_ADJUST,
 965         MSR_IA32_TSCDEADLINE,
 966         MSR_IA32_MISC_ENABLE,
 967         MSR_IA32_MCG_STATUS,
 968         MSR_IA32_MCG_CTL,
 969         MSR_IA32_SMBASE,
 970 };
 971
 972 static unsigned num_emulated_msrs;
 973
 974 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 975 {
 976         if (efer & efer_reserved_bits)
 977                 return false;
 978
 979         if (efer & EFER_FFXSR) {
 980                 struct kvm_cpuid_entry2 *feat;
 981
 982                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 983                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 984                         return false;
 985         }
 986
 987         if (efer & EFER_SVME) {
 988                 struct kvm_cpuid_entry2 *feat;
 989
 990                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 991                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 992                         return false;
 993         }
 994
 995         return true;
 996 }
 997 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 998
 999 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1000 {
1001         u64 old_efer = vcpu->arch.efer;
1002
1003         if (!kvm_valid_efer(vcpu, efer))
1004                 return 1;
1005
1006         if (is_paging(vcpu)
1007             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1008                 return 1;
1009
1010         efer &= ~EFER_LMA;
1011         efer |= vcpu->arch.efer & EFER_LMA;
1012
1013         kvm_x86_ops->set_efer(vcpu, efer);
1014
1015         /* Update reserved bits */
1016         if ((efer ^ old_efer) & EFER_NX)
1017                 kvm_mmu_reset_context(vcpu);
1018
1019         return 0;
1020 }
1021
1022 void kvm_enable_efer_bits(u64 mask)
1023 {
1024        efer_reserved_bits &= ~mask;
1025 }
1026 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1027
1028 /*
1029  * Writes msr value into into the appropriate "register".
1030  * Returns 0 on success, non-0 otherwise.
1031  * Assumes vcpu_load() was already called.
1032  */
1033 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1034 {
1035         switch (msr->index) {
1036         case MSR_FS_BASE:
1037         case MSR_GS_BASE:
1038         case MSR_KERNEL_GS_BASE:
1039         case MSR_CSTAR:
1040         case MSR_LSTAR:
1041                 if (is_noncanonical_address(msr->data))
1042                         return 1;
1043                 break;
1044         case MSR_IA32_SYSENTER_EIP:
1045         case MSR_IA32_SYSENTER_ESP:
1046                 /*
1047                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1048                  * non-canonical address is written on Intel but not on
1049                  * AMD (which ignores the top 32-bits, because it does
1050                  * not implement 64-bit SYSENTER).
1051                  *
1052                  * 64-bit code should hence be able to write a non-canonical
1053                  * value on AMD.  Making the address canonical ensures that
1054                  * vmentry does not fail on Intel after writing a non-canonical
1055                  * value, and that something deterministic happens if the guest
1056                  * invokes 64-bit SYSENTER.
1057                  */
1058                 msr->data = get_canonical(msr->data);
1059         }
1060         return kvm_x86_ops->set_msr(vcpu, msr);
1061 }
1062 EXPORT_SYMBOL_GPL(kvm_set_msr);
1063
1064 /*
1065  * Adapt set_msr() to msr_io()'s calling convention
1066  */
1067 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1068 {
1069         struct msr_data msr;
1070         int r;
1071
1072         msr.index = index;
1073         msr.host_initiated = true;
1074         r = kvm_get_msr(vcpu, &msr);
1075         if (r)
1076                 return r;
1077
1078         *data = msr.data;
1079         return 0;
1080 }
1081
1082 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1083 {
1084         struct msr_data msr;
1085
1086         msr.data = *data;
1087         msr.index = index;
1088         msr.host_initiated = true;
1089         return kvm_set_msr(vcpu, &msr);
1090 }
1091
1092 #ifdef CONFIG_X86_64
1093 struct pvclock_gtod_data {
1094         seqcount_t      seq;
1095
1096         struct { /* extract of a clocksource struct */
1097                 int vclock_mode;
1098                 cycle_t cycle_last;
1099                 cycle_t mask;
1100                 u32     mult;
1101                 u32     shift;
1102         } clock;
1103
1104         u64             boot_ns;
1105         u64             nsec_base;
1106 };
1107
1108 static struct pvclock_gtod_data pvclock_gtod_data;
1109
1110 static void update_pvclock_gtod(struct timekeeper *tk)
1111 {
1112         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1113         u64 boot_ns;
1114
1115         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1116
1117         write_seqcount_begin(&vdata->seq);
1118
1119         /* copy pvclock gtod data */
1120         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1121         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1122         vdata->clock.mask               = tk->tkr_mono.mask;
1123         vdata->clock.mult               = tk->tkr_mono.mult;
1124         vdata->clock.shift              = tk->tkr_mono.shift;
1125
1126         vdata->boot_ns                  = boot_ns;
1127         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1128
1129         write_seqcount_end(&vdata->seq);
1130 }
1131 #endif
1132
1133 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1134 {
1135         /*
1136          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1137          * vcpu_enter_guest.  This function is only called from
1138          * the physical CPU that is running vcpu.
1139          */
1140         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1141 }
1142
1143 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1144 {
1145         int version;
1146         int r;
1147         struct pvclock_wall_clock wc;
1148         struct timespec boot;
1149
1150         if (!wall_clock)
1151                 return;
1152
1153         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1154         if (r)
1155                 return;
1156
1157         if (version & 1)
1158                 ++version;  /* first time write, random junk */
1159
1160         ++version;
1161
1162         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1163
1164         /*
1165          * The guest calculates current wall clock time by adding
1166          * system time (updated by kvm_guest_time_update below) to the
1167          * wall clock specified here.  guest system time equals host
1168          * system time for us, thus we must fill in host boot time here.
1169          */
1170         getboottime(&boot);
1171
1172         if (kvm->arch.kvmclock_offset) {
1173                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1174                 boot = timespec_sub(boot, ts);
1175         }
1176         wc.sec = boot.tv_sec;
1177         wc.nsec = boot.tv_nsec;
1178         wc.version = version;
1179
1180         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1181
1182         version++;
1183         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1184 }
1185
1186 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1187 {
1188         uint32_t quotient, remainder;
1189
1190         /* Don't try to replace with do_div(), this one calculates
1191          * "(dividend << 32) / divisor" */
1192         __asm__ ( "divl %4"
1193                   : "=a" (quotient), "=d" (remainder)
1194                   : "0" (0), "1" (dividend), "r" (divisor) );
1195         return quotient;
1196 }
1197
1198 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1199                                s8 *pshift, u32 *pmultiplier)
1200 {
1201         uint64_t scaled64;
1202         int32_t  shift = 0;
1203         uint64_t tps64;
1204         uint32_t tps32;
1205
1206         tps64 = base_khz * 1000LL;
1207         scaled64 = scaled_khz * 1000LL;
1208         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1209                 tps64 >>= 1;
1210                 shift--;
1211         }
1212
1213         tps32 = (uint32_t)tps64;
1214         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1215                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1216                         scaled64 >>= 1;
1217                 else
1218                         tps32 <<= 1;
1219                 shift++;
1220         }
1221
1222         *pshift = shift;
1223         *pmultiplier = div_frac(scaled64, tps32);
1224
1225         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1226                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1227 }
1228
1229 #ifdef CONFIG_X86_64
1230 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1231 #endif
1232
1233 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1234 static unsigned long max_tsc_khz;
1235
1236 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1237 {
1238         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1239                                    vcpu->arch.virtual_tsc_shift);
1240 }
1241
1242 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1243 {
1244         u64 v = (u64)khz * (1000000 + ppm);
1245         do_div(v, 1000000);
1246         return v;
1247 }
1248
1249 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1250 {
1251         u32 thresh_lo, thresh_hi;
1252         int use_scaling = 0;
1253
1254         /* tsc_khz can be zero if TSC calibration fails */
1255         if (this_tsc_khz == 0)
1256                 return;
1257
1258         /* Compute a scale to convert nanoseconds in TSC cycles */
1259         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1260                            &vcpu->arch.virtual_tsc_shift,
1261                            &vcpu->arch.virtual_tsc_mult);
1262         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1263
1264         /*
1265          * Compute the variation in TSC rate which is acceptable
1266          * within the range of tolerance and decide if the
1267          * rate being applied is within that bounds of the hardware
1268          * rate.  If so, no scaling or compensation need be done.
1269          */
1270         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1271         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1272         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1273                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1274                 use_scaling = 1;
1275         }
1276         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1277 }
1278
1279 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1280 {
1281         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1282                                       vcpu->arch.virtual_tsc_mult,
1283                                       vcpu->arch.virtual_tsc_shift);
1284         tsc += vcpu->arch.this_tsc_write;
1285         return tsc;
1286 }
1287
1288 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1289 {
1290 #ifdef CONFIG_X86_64
1291         bool vcpus_matched;
1292         struct kvm_arch *ka = &vcpu->kvm->arch;
1293         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1294
1295         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1296                          atomic_read(&vcpu->kvm->online_vcpus));
1297
1298         /*
1299          * Once the masterclock is enabled, always perform request in
1300          * order to update it.
1301          *
1302          * In order to enable masterclock, the host clocksource must be TSC
1303          * and the vcpus need to have matched TSCs.  When that happens,
1304          * perform request to enable masterclock.
1305          */
1306         if (ka->use_master_clock ||
1307             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1308                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1309
1310         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1311                             atomic_read(&vcpu->kvm->online_vcpus),
1312                             ka->use_master_clock, gtod->clock.vclock_mode);
1313 #endif
1314 }
1315
1316 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1317 {
1318         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1319         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1320 }
1321
1322 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1323 {
1324         struct kvm *kvm = vcpu->kvm;
1325         u64 offset, ns, elapsed;
1326         unsigned long flags;
1327         s64 usdiff;
1328         bool matched;
1329         bool already_matched;
1330         u64 data = msr->data;
1331
1332         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1333         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1334         ns = get_kernel_ns();
1335         elapsed = ns - kvm->arch.last_tsc_nsec;
1336
1337         if (vcpu->arch.virtual_tsc_khz) {
1338                 int faulted = 0;
1339
1340                 /* n.b - signed multiplication and division required */
1341                 usdiff = data - kvm->arch.last_tsc_write;
1342 #ifdef CONFIG_X86_64
1343                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1344 #else
1345                 /* do_div() only does unsigned */
1346                 asm("1: idivl %[divisor]\n"
1347                     "2: xor %%edx, %%edx\n"
1348                     "   movl $0, %[faulted]\n"
1349                     "3:\n"
1350                     ".section .fixup,\"ax\"\n"
1351                     "4: movl $1, %[faulted]\n"
1352                     "   jmp  3b\n"
1353                     ".previous\n"
1354
1355                 _ASM_EXTABLE(1b, 4b)
1356
1357                 : "=A"(usdiff), [faulted] "=r" (faulted)
1358                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1359
1360 #endif
1361                 do_div(elapsed, 1000);
1362                 usdiff -= elapsed;
1363                 if (usdiff < 0)
1364                         usdiff = -usdiff;
1365
1366                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1367                 if (faulted)
1368                         usdiff = USEC_PER_SEC;
1369         } else
1370                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1371
1372         /*
1373          * Special case: TSC write with a small delta (1 second) of virtual
1374          * cycle time against real time is interpreted as an attempt to
1375          * synchronize the CPU.
1376          *
1377          * For a reliable TSC, we can match TSC offsets, and for an unstable
1378          * TSC, we add elapsed time in this computation.  We could let the
1379          * compensation code attempt to catch up if we fall behind, but
1380          * it's better to try to match offsets from the beginning.
1381          */
1382         if (usdiff < USEC_PER_SEC &&
1383             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1384                 if (!check_tsc_unstable()) {
1385                         offset = kvm->arch.cur_tsc_offset;
1386                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1387                 } else {
1388                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1389                         data += delta;
1390                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1391                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1392                 }
1393                 matched = true;
1394                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1395         } else {
1396                 /*
1397                  * We split periods of matched TSC writes into generations.
1398                  * For each generation, we track the original measured
1399                  * nanosecond time, offset, and write, so if TSCs are in
1400                  * sync, we can match exact offset, and if not, we can match
1401                  * exact software computation in compute_guest_tsc()
1402                  *
1403                  * These values are tracked in kvm->arch.cur_xxx variables.
1404                  */
1405                 kvm->arch.cur_tsc_generation++;
1406                 kvm->arch.cur_tsc_nsec = ns;
1407                 kvm->arch.cur_tsc_write = data;
1408                 kvm->arch.cur_tsc_offset = offset;
1409                 matched = false;
1410                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1411                          kvm->arch.cur_tsc_generation, data);
1412         }
1413
1414         /*
1415          * We also track th most recent recorded KHZ, write and time to
1416          * allow the matching interval to be extended at each write.
1417          */
1418         kvm->arch.last_tsc_nsec = ns;
1419         kvm->arch.last_tsc_write = data;
1420         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1421
1422         vcpu->arch.last_guest_tsc = data;
1423
1424         /* Keep track of which generation this VCPU has synchronized to */
1425         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1426         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1427         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1428
1429         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1430                 update_ia32_tsc_adjust_msr(vcpu, offset);
1431         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1432         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1433
1434         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1435         if (!matched) {
1436                 kvm->arch.nr_vcpus_matched_tsc = 0;
1437         } else if (!already_matched) {
1438                 kvm->arch.nr_vcpus_matched_tsc++;
1439         }
1440
1441         kvm_track_tsc_matching(vcpu);
1442         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1443 }
1444
1445 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1446
1447 #ifdef CONFIG_X86_64
1448
1449 static cycle_t read_tsc(void)
1450 {
1451         cycle_t ret = (cycle_t)rdtsc_ordered();
1452         u64 last = pvclock_gtod_data.clock.cycle_last;
1453
1454         if (likely(ret >= last))
1455                 return ret;
1456
1457         /*
1458          * GCC likes to generate cmov here, but this branch is extremely
1459          * predictable (it's just a funciton of time and the likely is
1460          * very likely) and there's a data dependence, so force GCC
1461          * to generate a branch instead.  I don't barrier() because
1462          * we don't actually need a barrier, and if this function
1463          * ever gets inlined it will generate worse code.
1464          */
1465         asm volatile ("");
1466         return last;
1467 }
1468
1469 static inline u64 vgettsc(cycle_t *cycle_now)
1470 {
1471         long v;
1472         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1473
1474         *cycle_now = read_tsc();
1475
1476         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1477         return v * gtod->clock.mult;
1478 }
1479
1480 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1481 {
1482         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1483         unsigned long seq;
1484         int mode;
1485         u64 ns;
1486
1487         do {
1488                 seq = read_seqcount_begin(&gtod->seq);
1489                 mode = gtod->clock.vclock_mode;
1490                 ns = gtod->nsec_base;
1491                 ns += vgettsc(cycle_now);
1492                 ns >>= gtod->clock.shift;
1493                 ns += gtod->boot_ns;
1494         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1495         *t = ns;
1496
1497         return mode;
1498 }
1499
1500 /* returns true if host is using tsc clocksource */
1501 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1502 {
1503         /* checked again under seqlock below */
1504         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1505                 return false;
1506
1507         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1508 }
1509 #endif
1510
1511 /*
1512  *
1513  * Assuming a stable TSC across physical CPUS, and a stable TSC
1514  * across virtual CPUs, the following condition is possible.
1515  * Each numbered line represents an event visible to both
1516  * CPUs at the next numbered event.
1517  *
1518  * "timespecX" represents host monotonic time. "tscX" represents
1519  * RDTSC value.
1520  *
1521  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1522  *
1523  * 1.  read timespec0,tsc0
1524  * 2.                                   | timespec1 = timespec0 + N
1525  *                                      | tsc1 = tsc0 + M
1526  * 3. transition to guest               | transition to guest
1527  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1528  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1529  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1530  *
1531  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1532  *
1533  *      - ret0 < ret1
1534  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1535  *              ...
1536  *      - 0 < N - M => M < N
1537  *
1538  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1539  * always the case (the difference between two distinct xtime instances
1540  * might be smaller then the difference between corresponding TSC reads,
1541  * when updating guest vcpus pvclock areas).
1542  *
1543  * To avoid that problem, do not allow visibility of distinct
1544  * system_timestamp/tsc_timestamp values simultaneously: use a master
1545  * copy of host monotonic time values. Update that master copy
1546  * in lockstep.
1547  *
1548  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1549  *
1550  */
1551
1552 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1553 {
1554 #ifdef CONFIG_X86_64
1555         struct kvm_arch *ka = &kvm->arch;
1556         int vclock_mode;
1557         bool host_tsc_clocksource, vcpus_matched;
1558
1559         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1560                         atomic_read(&kvm->online_vcpus));
1561
1562         /*
1563          * If the host uses TSC clock, then passthrough TSC as stable
1564          * to the guest.
1565          */
1566         host_tsc_clocksource = kvm_get_time_and_clockread(
1567                                         &ka->master_kernel_ns,
1568                                         &ka->master_cycle_now);
1569
1570         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1571                                 && !backwards_tsc_observed
1572                                 && !ka->boot_vcpu_runs_old_kvmclock;
1573
1574         if (ka->use_master_clock)
1575                 atomic_set(&kvm_guest_has_master_clock, 1);
1576
1577         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1578         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1579                                         vcpus_matched);
1580 #endif
1581 }
1582
1583 static void kvm_gen_update_masterclock(struct kvm *kvm)
1584 {
1585 #ifdef CONFIG_X86_64
1586         int i;
1587         struct kvm_vcpu *vcpu;
1588         struct kvm_arch *ka = &kvm->arch;
1589
1590         spin_lock(&ka->pvclock_gtod_sync_lock);
1591         kvm_make_mclock_inprogress_request(kvm);
1592         /* no guest entries from this point */
1593         pvclock_update_vm_gtod_copy(kvm);
1594
1595         kvm_for_each_vcpu(i, vcpu, kvm)
1596                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1597
1598         /* guest entries allowed */
1599         kvm_for_each_vcpu(i, vcpu, kvm)
1600                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1601
1602         spin_unlock(&ka->pvclock_gtod_sync_lock);
1603 #endif
1604 }
1605
1606 static int kvm_guest_time_update(struct kvm_vcpu *v)
1607 {
1608         unsigned long flags, this_tsc_khz;
1609         struct kvm_vcpu_arch *vcpu = &v->arch;
1610         struct kvm_arch *ka = &v->kvm->arch;
1611         s64 kernel_ns;
1612         u64 tsc_timestamp, host_tsc;
1613         struct pvclock_vcpu_time_info guest_hv_clock;
1614         u8 pvclock_flags;
1615         bool use_master_clock;
1616
1617         kernel_ns = 0;
1618         host_tsc = 0;
1619
1620         /*
1621          * If the host uses TSC clock, then passthrough TSC as stable
1622          * to the guest.
1623          */
1624         spin_lock(&ka->pvclock_gtod_sync_lock);
1625         use_master_clock = ka->use_master_clock;
1626         if (use_master_clock) {
1627                 host_tsc = ka->master_cycle_now;
1628                 kernel_ns = ka->master_kernel_ns;
1629         }
1630         spin_unlock(&ka->pvclock_gtod_sync_lock);
1631
1632         /* Keep irq disabled to prevent changes to the clock */
1633         local_irq_save(flags);
1634         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1635         if (unlikely(this_tsc_khz == 0)) {
1636                 local_irq_restore(flags);
1637                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1638                 return 1;
1639         }
1640         if (!use_master_clock) {
1641                 host_tsc = rdtsc();
1642                 kernel_ns = get_kernel_ns();
1643         }
1644
1645         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1646
1647         /*
1648          * We may have to catch up the TSC to match elapsed wall clock
1649          * time for two reasons, even if kvmclock is used.
1650          *   1) CPU could have been running below the maximum TSC rate
1651          *   2) Broken TSC compensation resets the base at each VCPU
1652          *      entry to avoid unknown leaps of TSC even when running
1653          *      again on the same CPU.  This may cause apparent elapsed
1654          *      time to disappear, and the guest to stand still or run
1655          *      very slowly.
1656          */
1657         if (vcpu->tsc_catchup) {
1658                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1659                 if (tsc > tsc_timestamp) {
1660                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1661                         tsc_timestamp = tsc;
1662                 }
1663         }
1664
1665         local_irq_restore(flags);
1666
1667         if (!vcpu->pv_time_enabled)
1668                 return 0;
1669
1670         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1671                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1672                                    &vcpu->hv_clock.tsc_shift,
1673                                    &vcpu->hv_clock.tsc_to_system_mul);
1674                 vcpu->hw_tsc_khz = this_tsc_khz;
1675         }
1676
1677         /* With all the info we got, fill in the values */
1678         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1679         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1680         vcpu->last_guest_tsc = tsc_timestamp;
1681
1682         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1683                 &guest_hv_clock, sizeof(guest_hv_clock))))
1684                 return 0;
1685
1686         /* This VCPU is paused, but it's legal for a guest to read another
1687          * VCPU's kvmclock, so we really have to follow the specification where
1688          * it says that version is odd if data is being modified, and even after
1689          * it is consistent.
1690          *
1691          * Version field updates must be kept separate.  This is because
1692          * kvm_write_guest_cached might use a "rep movs" instruction, and
1693          * writes within a string instruction are weakly ordered.  So there
1694          * are three writes overall.
1695          *
1696          * As a small optimization, only write the version field in the first
1697          * and third write.  The vcpu->pv_time cache is still valid, because the
1698          * version field is the first in the struct.
1699          */
1700         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1701
1702         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1703         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1704                                 &vcpu->hv_clock,
1705                                 sizeof(vcpu->hv_clock.version));
1706
1707         smp_wmb();
1708
1709         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1710         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1711
1712         if (vcpu->pvclock_set_guest_stopped_request) {
1713                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1714                 vcpu->pvclock_set_guest_stopped_request = false;
1715         }
1716
1717         /* If the host uses TSC clocksource, then it is stable */
1718         if (use_master_clock)
1719                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1720
1721         vcpu->hv_clock.flags = pvclock_flags;
1722
1723         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1724
1725         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1726                                 &vcpu->hv_clock,
1727                                 sizeof(vcpu->hv_clock));
1728
1729         smp_wmb();
1730
1731         vcpu->hv_clock.version++;
1732         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1733                                 &vcpu->hv_clock,
1734                                 sizeof(vcpu->hv_clock.version));
1735         return 0;
1736 }
1737
1738 /*
1739  * kvmclock updates which are isolated to a given vcpu, such as
1740  * vcpu->cpu migration, should not allow system_timestamp from
1741  * the rest of the vcpus to remain static. Otherwise ntp frequency
1742  * correction applies to one vcpu's system_timestamp but not
1743  * the others.
1744  *
1745  * So in those cases, request a kvmclock update for all vcpus.
1746  * We need to rate-limit these requests though, as they can
1747  * considerably slow guests that have a large number of vcpus.
1748  * The time for a remote vcpu to update its kvmclock is bound
1749  * by the delay we use to rate-limit the updates.
1750  */
1751
1752 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1753
1754 static void kvmclock_update_fn(struct work_struct *work)
1755 {
1756         int i;
1757         struct delayed_work *dwork = to_delayed_work(work);
1758         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1759                                            kvmclock_update_work);
1760         struct kvm *kvm = container_of(ka, struct kvm, arch);
1761         struct kvm_vcpu *vcpu;
1762
1763         kvm_for_each_vcpu(i, vcpu, kvm) {
1764                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1765                 kvm_vcpu_kick(vcpu);
1766         }
1767 }
1768
1769 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1770 {
1771         struct kvm *kvm = v->kvm;
1772
1773         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1774         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1775                                         KVMCLOCK_UPDATE_DELAY);
1776 }
1777
1778 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1779
1780 static void kvmclock_sync_fn(struct work_struct *work)
1781 {
1782         struct delayed_work *dwork = to_delayed_work(work);
1783         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1784                                            kvmclock_sync_work);
1785         struct kvm *kvm = container_of(ka, struct kvm, arch);
1786
1787         if (!kvmclock_periodic_sync)
1788                 return;
1789
1790         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1791         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1792                                         KVMCLOCK_SYNC_PERIOD);
1793 }
1794
1795 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1796 {
1797         u64 mcg_cap = vcpu->arch.mcg_cap;
1798         unsigned bank_num = mcg_cap & 0xff;
1799
1800         switch (msr) {
1801         case MSR_IA32_MCG_STATUS:
1802                 vcpu->arch.mcg_status = data;
1803                 break;
1804         case MSR_IA32_MCG_CTL:
1805                 if (!(mcg_cap & MCG_CTL_P))
1806                         return 1;
1807                 if (data != 0 && data != ~(u64)0)
1808                         return -1;
1809                 vcpu->arch.mcg_ctl = data;
1810                 break;
1811         default:
1812                 if (msr >= MSR_IA32_MC0_CTL &&
1813                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1814                         u32 offset = msr - MSR_IA32_MC0_CTL;
1815                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1816                          * some Linux kernels though clear bit 10 in bank 4 to
1817                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1818                          * this to avoid an uncatched #GP in the guest
1819                          */
1820                         if ((offset & 0x3) == 0 &&
1821                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1822                                 return -1;
1823                         vcpu->arch.mce_banks[offset] = data;
1824                         break;
1825                 }
1826                 return 1;
1827         }
1828         return 0;
1829 }
1830
1831 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1832 {
1833         struct kvm *kvm = vcpu->kvm;
1834         int lm = is_long_mode(vcpu);
1835         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1836                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1837         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1838                 : kvm->arch.xen_hvm_config.blob_size_32;
1839         u32 page_num = data & ~PAGE_MASK;
1840         u64 page_addr = data & PAGE_MASK;
1841         u8 *page;
1842         int r;
1843
1844         r = -E2BIG;
1845         if (page_num >= blob_size)
1846                 goto out;
1847         r = -ENOMEM;
1848         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1849         if (IS_ERR(page)) {
1850                 r = PTR_ERR(page);
1851                 goto out;
1852         }
1853         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1854                 goto out_free;
1855         r = 0;
1856 out_free:
1857         kfree(page);
1858 out:
1859         return r;
1860 }
1861
1862 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1863 {
1864         gpa_t gpa = data & ~0x3f;
1865
1866         /* Bits 2:5 are reserved, Should be zero */
1867         if (data & 0x3c)
1868                 return 1;
1869
1870         vcpu->arch.apf.msr_val = data;
1871
1872         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1873                 kvm_clear_async_pf_completion_queue(vcpu);
1874                 kvm_async_pf_hash_reset(vcpu);
1875                 return 0;
1876         }
1877
1878         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1879                                         sizeof(u32)))
1880                 return 1;
1881
1882         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1883         kvm_async_pf_wakeup_all(vcpu);
1884         return 0;
1885 }
1886
1887 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1888 {
1889         vcpu->arch.pv_time_enabled = false;
1890 }
1891
1892 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1893 {
1894         u64 delta;
1895
1896         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1897                 return;
1898
1899         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1900         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1901         vcpu->arch.st.accum_steal = delta;
1902 }
1903
1904 static void record_steal_time(struct kvm_vcpu *vcpu)
1905 {
1906         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1907                 return;
1908
1909         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1910                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1911                 return;
1912
1913         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1914         vcpu->arch.st.steal.version += 2;
1915         vcpu->arch.st.accum_steal = 0;
1916
1917         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1918                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1919 }
1920
1921 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1922 {
1923         bool pr = false;
1924         u32 msr = msr_info->index;
1925         u64 data = msr_info->data;
1926
1927         switch (msr) {
1928         case MSR_AMD64_NB_CFG:
1929         case MSR_IA32_UCODE_REV:
1930         case MSR_IA32_UCODE_WRITE:
1931         case MSR_VM_HSAVE_PA:
1932         case MSR_AMD64_PATCH_LOADER:
1933         case MSR_AMD64_BU_CFG2:
1934                 break;
1935
1936         case MSR_EFER:
1937                 return set_efer(vcpu, data);
1938         case MSR_K7_HWCR:
1939                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1940                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1941                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1942                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1943                 if (data != 0) {
1944                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1945                                     data);
1946                         return 1;
1947                 }
1948                 break;
1949         case MSR_FAM10H_MMIO_CONF_BASE:
1950                 if (data != 0) {
1951                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1952                                     "0x%llx\n", data);
1953                         return 1;
1954                 }
1955                 break;
1956         case MSR_IA32_DEBUGCTLMSR:
1957                 if (!data) {
1958                         /* We support the non-activated case already */
1959                         break;
1960                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1961                         /* Values other than LBR and BTF are vendor-specific,
1962                            thus reserved and should throw a #GP */
1963                         return 1;
1964                 }
1965                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1966                             __func__, data);
1967                 break;
1968         case 0x200 ... 0x2ff:
1969                 return kvm_mtrr_set_msr(vcpu, msr, data);
1970         case MSR_IA32_APICBASE:
1971                 return kvm_set_apic_base(vcpu, msr_info);
1972         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1973                 return kvm_x2apic_msr_write(vcpu, msr, data);
1974         case MSR_IA32_TSCDEADLINE:
1975                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1976                 break;
1977         case MSR_IA32_TSC_ADJUST:
1978                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1979                         if (!msr_info->host_initiated) {
1980                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1981                                 adjust_tsc_offset_guest(vcpu, adj);
1982                         }
1983                         vcpu->arch.ia32_tsc_adjust_msr = data;
1984                 }
1985                 break;
1986         case MSR_IA32_MISC_ENABLE:
1987                 vcpu->arch.ia32_misc_enable_msr = data;
1988                 break;
1989         case MSR_IA32_SMBASE:
1990                 if (!msr_info->host_initiated)
1991                         return 1;
1992                 vcpu->arch.smbase = data;
1993                 break;
1994         case MSR_KVM_WALL_CLOCK_NEW:
1995         case MSR_KVM_WALL_CLOCK:
1996                 vcpu->kvm->arch.wall_clock = data;
1997                 kvm_write_wall_clock(vcpu->kvm, data);
1998                 break;
1999         case MSR_KVM_SYSTEM_TIME_NEW:
2000         case MSR_KVM_SYSTEM_TIME: {
2001                 u64 gpa_offset;
2002                 struct kvm_arch *ka = &vcpu->kvm->arch;
2003
2004                 kvmclock_reset(vcpu);
2005
2006                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2007                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2008
2009                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2010                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2011                                         &vcpu->requests);
2012
2013                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2014                 }
2015
2016                 vcpu->arch.time = data;
2017                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2018
2019                 /* we verify if the enable bit is set... */
2020                 if (!(data & 1))
2021                         break;
2022
2023                 gpa_offset = data & ~(PAGE_MASK | 1);
2024
2025                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2026                      &vcpu->arch.pv_time, data & ~1ULL,
2027                      sizeof(struct pvclock_vcpu_time_info)))
2028                         vcpu->arch.pv_time_enabled = false;
2029                 else
2030                         vcpu->arch.pv_time_enabled = true;
2031
2032                 break;
2033         }
2034         case MSR_KVM_ASYNC_PF_EN:
2035                 if (kvm_pv_enable_async_pf(vcpu, data))
2036                         return 1;
2037                 break;
2038         case MSR_KVM_STEAL_TIME:
2039
2040                 if (unlikely(!sched_info_on()))
2041                         return 1;
2042
2043                 if (data & KVM_STEAL_RESERVED_MASK)
2044                         return 1;
2045
2046                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2047                                                 data & KVM_STEAL_VALID_BITS,
2048                                                 sizeof(struct kvm_steal_time)))
2049                         return 1;
2050
2051                 vcpu->arch.st.msr_val = data;
2052
2053                 if (!(data & KVM_MSR_ENABLED))
2054                         break;
2055
2056                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2057
2058                 preempt_disable();
2059                 accumulate_steal_time(vcpu);
2060                 preempt_enable();
2061
2062                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2063
2064                 break;
2065         case MSR_KVM_PV_EOI_EN:
2066                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2067                         return 1;
2068                 break;
2069
2070         case MSR_IA32_MCG_CTL:
2071         case MSR_IA32_MCG_STATUS:
2072         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2073                 return set_msr_mce(vcpu, msr, data);
2074
2075         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2076         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2077                 pr = true; /* fall through */
2078         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2079         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2080                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2081                         return kvm_pmu_set_msr(vcpu, msr_info);
2082
2083                 if (pr || data != 0)
2084                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2085                                     "0x%x data 0x%llx\n", msr, data);
2086                 break;
2087         case MSR_K7_CLK_CTL:
2088                 /*
2089                  * Ignore all writes to this no longer documented MSR.
2090                  * Writes are only relevant for old K7 processors,
2091                  * all pre-dating SVM, but a recommended workaround from
2092                  * AMD for these chips. It is possible to specify the
2093                  * affected processor models on the command line, hence
2094                  * the need to ignore the workaround.
2095                  */
2096                 break;
2097         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2098         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2099         case HV_X64_MSR_CRASH_CTL:
2100                 return kvm_hv_set_msr_common(vcpu, msr, data,
2101                                              msr_info->host_initiated);
2102         case MSR_IA32_BBL_CR_CTL3:
2103                 /* Drop writes to this legacy MSR -- see rdmsr
2104                  * counterpart for further detail.
2105                  */
2106                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2107                 break;
2108         case MSR_AMD64_OSVW_ID_LENGTH:
2109                 if (!guest_cpuid_has_osvw(vcpu))
2110                         return 1;
2111                 vcpu->arch.osvw.length = data;
2112                 break;
2113         case MSR_AMD64_OSVW_STATUS:
2114                 if (!guest_cpuid_has_osvw(vcpu))
2115                         return 1;
2116                 vcpu->arch.osvw.status = data;
2117                 break;
2118         default:
2119                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2120                         return xen_hvm_config(vcpu, data);
2121                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2122                         return kvm_pmu_set_msr(vcpu, msr_info);
2123                 if (!ignore_msrs) {
2124                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2125                                     msr, data);
2126                         return 1;
2127                 } else {
2128                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2129                                     msr, data);
2130                         break;
2131                 }
2132         }
2133         return 0;
2134 }
2135 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2136
2137
2138 /*
2139  * Reads an msr value (of 'msr_index') into 'pdata'.
2140  * Returns 0 on success, non-0 otherwise.
2141  * Assumes vcpu_load() was already called.
2142  */
2143 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2144 {
2145         return kvm_x86_ops->get_msr(vcpu, msr);
2146 }
2147 EXPORT_SYMBOL_GPL(kvm_get_msr);
2148
2149 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2150 {
2151         u64 data;
2152         u64 mcg_cap = vcpu->arch.mcg_cap;
2153         unsigned bank_num = mcg_cap & 0xff;
2154
2155         switch (msr) {
2156         case MSR_IA32_P5_MC_ADDR:
2157         case MSR_IA32_P5_MC_TYPE:
2158                 data = 0;
2159                 break;
2160         case MSR_IA32_MCG_CAP:
2161                 data = vcpu->arch.mcg_cap;
2162                 break;
2163         case MSR_IA32_MCG_CTL:
2164                 if (!(mcg_cap & MCG_CTL_P))
2165                         return 1;
2166                 data = vcpu->arch.mcg_ctl;
2167                 break;
2168         case MSR_IA32_MCG_STATUS:
2169                 data = vcpu->arch.mcg_status;
2170                 break;
2171         default:
2172                 if (msr >= MSR_IA32_MC0_CTL &&
2173                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2174                         u32 offset = msr - MSR_IA32_MC0_CTL;
2175                         data = vcpu->arch.mce_banks[offset];
2176                         break;
2177                 }
2178                 return 1;
2179         }
2180         *pdata = data;
2181         return 0;
2182 }
2183
2184 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2185 {
2186         switch (msr_info->index) {
2187         case MSR_IA32_PLATFORM_ID:
2188         case MSR_IA32_EBL_CR_POWERON:
2189         case MSR_IA32_DEBUGCTLMSR:
2190         case MSR_IA32_LASTBRANCHFROMIP:
2191         case MSR_IA32_LASTBRANCHTOIP:
2192         case MSR_IA32_LASTINTFROMIP:
2193         case MSR_IA32_LASTINTTOIP:
2194         case MSR_K8_SYSCFG:
2195         case MSR_K8_TSEG_ADDR:
2196         case MSR_K8_TSEG_MASK:
2197         case MSR_K7_HWCR:
2198         case MSR_VM_HSAVE_PA:
2199         case MSR_K8_INT_PENDING_MSG:
2200         case MSR_AMD64_NB_CFG:
2201         case MSR_FAM10H_MMIO_CONF_BASE:
2202         case MSR_AMD64_BU_CFG2:
2203                 msr_info->data = 0;
2204                 break;
2205         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2206         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2207         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2208         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2209                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2210                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2211                 msr_info->data = 0;
2212                 break;
2213         case MSR_IA32_UCODE_REV:
2214                 msr_info->data = 0x100000000ULL;
2215                 break;
2216         case MSR_MTRRcap:
2217         case 0x200 ... 0x2ff:
2218                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2219         case 0xcd: /* fsb frequency */
2220                 msr_info->data = 3;
2221                 break;
2222                 /*
2223                  * MSR_EBC_FREQUENCY_ID
2224                  * Conservative value valid for even the basic CPU models.
2225                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2226                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2227                  * and 266MHz for model 3, or 4. Set Core Clock
2228                  * Frequency to System Bus Frequency Ratio to 1 (bits
2229                  * 31:24) even though these are only valid for CPU
2230                  * models > 2, however guests may end up dividing or
2231                  * multiplying by zero otherwise.
2232                  */
2233         case MSR_EBC_FREQUENCY_ID:
2234                 msr_info->data = 1 << 24;
2235                 break;
2236         case MSR_IA32_APICBASE:
2237                 msr_info->data = kvm_get_apic_base(vcpu);
2238                 break;
2239         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2240                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2241                 break;
2242         case MSR_IA32_TSCDEADLINE:
2243                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2244                 break;
2245         case MSR_IA32_TSC_ADJUST:
2246                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2247                 break;
2248         case MSR_IA32_MISC_ENABLE:
2249                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2250                 break;
2251         case MSR_IA32_SMBASE:
2252                 if (!msr_info->host_initiated)
2253                         return 1;
2254                 msr_info->data = vcpu->arch.smbase;
2255                 break;
2256         case MSR_IA32_PERF_STATUS:
2257                 /* TSC increment by tick */
2258                 msr_info->data = 1000ULL;
2259                 /* CPU multiplier */
2260                 msr_info->data |= (((uint64_t)4ULL) << 40);
2261                 break;
2262         case MSR_EFER:
2263                 msr_info->data = vcpu->arch.efer;
2264                 break;
2265         case MSR_KVM_WALL_CLOCK:
2266         case MSR_KVM_WALL_CLOCK_NEW:
2267                 msr_info->data = vcpu->kvm->arch.wall_clock;
2268                 break;
2269         case MSR_KVM_SYSTEM_TIME:
2270         case MSR_KVM_SYSTEM_TIME_NEW:
2271                 msr_info->data = vcpu->arch.time;
2272                 break;
2273         case MSR_KVM_ASYNC_PF_EN:
2274                 msr_info->data = vcpu->arch.apf.msr_val;
2275                 break;
2276         case MSR_KVM_STEAL_TIME:
2277                 msr_info->data = vcpu->arch.st.msr_val;
2278                 break;
2279         case MSR_KVM_PV_EOI_EN:
2280                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2281                 break;
2282         case MSR_IA32_P5_MC_ADDR:
2283         case MSR_IA32_P5_MC_TYPE:
2284         case MSR_IA32_MCG_CAP:
2285         case MSR_IA32_MCG_CTL:
2286         case MSR_IA32_MCG_STATUS:
2287         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2288                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2289         case MSR_K7_CLK_CTL:
2290                 /*
2291                  * Provide expected ramp-up count for K7. All other
2292                  * are set to zero, indicating minimum divisors for
2293                  * every field.
2294                  *
2295                  * This prevents guest kernels on AMD host with CPU
2296                  * type 6, model 8 and higher from exploding due to
2297                  * the rdmsr failing.
2298                  */
2299                 msr_info->data = 0x20000000;
2300                 break;
2301         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2302         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2303         case HV_X64_MSR_CRASH_CTL:
2304                 return kvm_hv_get_msr_common(vcpu,
2305                                              msr_info->index, &msr_info->data);
2306                 break;
2307         case MSR_IA32_BBL_CR_CTL3:
2308                 /* This legacy MSR exists but isn't fully documented in current
2309                  * silicon.  It is however accessed by winxp in very narrow
2310                  * scenarios where it sets bit #19, itself documented as
2311                  * a "reserved" bit.  Best effort attempt to source coherent
2312                  * read data here should the balance of the register be
2313                  * interpreted by the guest:
2314                  *
2315                  * L2 cache control register 3: 64GB range, 256KB size,
2316                  * enabled, latency 0x1, configured
2317                  */
2318                 msr_info->data = 0xbe702111;
2319                 break;
2320         case MSR_AMD64_OSVW_ID_LENGTH:
2321                 if (!guest_cpuid_has_osvw(vcpu))
2322                         return 1;
2323                 msr_info->data = vcpu->arch.osvw.length;
2324                 break;
2325         case MSR_AMD64_OSVW_STATUS:
2326                 if (!guest_cpuid_has_osvw(vcpu))
2327                         return 1;
2328                 msr_info->data = vcpu->arch.osvw.status;
2329                 break;
2330         default:
2331                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2332                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2333                 if (!ignore_msrs) {
2334                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2335                         return 1;
2336                 } else {
2337                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2338                         msr_info->data = 0;
2339                 }
2340                 break;
2341         }
2342         return 0;
2343 }
2344 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2345
2346 /*
2347  * Read or write a bunch of msrs. All parameters are kernel addresses.
2348  *
2349  * @return number of msrs set successfully.
2350  */
2351 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2352                     struct kvm_msr_entry *entries,
2353                     int (*do_msr)(struct kvm_vcpu *vcpu,
2354                                   unsigned index, u64 *data))
2355 {
2356         int i, idx;
2357
2358         idx = srcu_read_lock(&vcpu->kvm->srcu);
2359         for (i = 0; i < msrs->nmsrs; ++i)
2360                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2361                         break;
2362         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2363
2364         return i;
2365 }
2366
2367 /*
2368  * Read or write a bunch of msrs. Parameters are user addresses.
2369  *
2370  * @return number of msrs set successfully.
2371  */
2372 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2373                   int (*do_msr)(struct kvm_vcpu *vcpu,
2374                                 unsigned index, u64 *data),
2375                   int writeback)
2376 {
2377         struct kvm_msrs msrs;
2378         struct kvm_msr_entry *entries;
2379         int r, n;
2380         unsigned size;
2381
2382         r = -EFAULT;
2383         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2384                 goto out;
2385
2386         r = -E2BIG;
2387         if (msrs.nmsrs >= MAX_IO_MSRS)
2388                 goto out;
2389
2390         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2391         entries = memdup_user(user_msrs->entries, size);
2392         if (IS_ERR(entries)) {
2393                 r = PTR_ERR(entries);
2394                 goto out;
2395         }
2396
2397         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2398         if (r < 0)
2399                 goto out_free;
2400
2401         r = -EFAULT;
2402         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2403                 goto out_free;
2404
2405         r = n;
2406
2407 out_free:
2408         kfree(entries);
2409 out:
2410         return r;
2411 }
2412
2413 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2414 {
2415         int r;
2416
2417         switch (ext) {
2418         case KVM_CAP_IRQCHIP:
2419         case KVM_CAP_HLT:
2420         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2421         case KVM_CAP_SET_TSS_ADDR:
2422         case KVM_CAP_EXT_CPUID:
2423         case KVM_CAP_EXT_EMUL_CPUID:
2424         case KVM_CAP_CLOCKSOURCE:
2425         case KVM_CAP_PIT:
2426         case KVM_CAP_NOP_IO_DELAY:
2427         case KVM_CAP_MP_STATE:
2428         case KVM_CAP_SYNC_MMU:
2429         case KVM_CAP_USER_NMI:
2430         case KVM_CAP_REINJECT_CONTROL:
2431         case KVM_CAP_IRQ_INJECT_STATUS:
2432         case KVM_CAP_IOEVENTFD:
2433         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2434         case KVM_CAP_PIT2:
2435         case KVM_CAP_PIT_STATE2:
2436         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2437         case KVM_CAP_XEN_HVM:
2438         case KVM_CAP_ADJUST_CLOCK:
2439         case KVM_CAP_VCPU_EVENTS:
2440         case KVM_CAP_HYPERV:
2441         case KVM_CAP_HYPERV_VAPIC:
2442         case KVM_CAP_HYPERV_SPIN:
2443         case KVM_CAP_PCI_SEGMENT:
2444         case KVM_CAP_DEBUGREGS:
2445         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2446         case KVM_CAP_XSAVE:
2447         case KVM_CAP_ASYNC_PF:
2448         case KVM_CAP_GET_TSC_KHZ:
2449         case KVM_CAP_KVMCLOCK_CTRL:
2450         case KVM_CAP_READONLY_MEM:
2451         case KVM_CAP_HYPERV_TIME:
2452         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2453         case KVM_CAP_TSC_DEADLINE_TIMER:
2454         case KVM_CAP_ENABLE_CAP_VM:
2455         case KVM_CAP_DISABLE_QUIRKS:
2456         case KVM_CAP_SET_BOOT_CPU_ID:
2457         case KVM_CAP_SPLIT_IRQCHIP:
2458 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2459         case KVM_CAP_ASSIGN_DEV_IRQ:
2460         case KVM_CAP_PCI_2_3:
2461 #endif
2462                 r = 1;
2463                 break;
2464         case KVM_CAP_X86_SMM:
2465                 /* SMBASE is usually relocated above 1M on modern chipsets,
2466                  * and SMM handlers might indeed rely on 4G segment limits,
2467                  * so do not report SMM to be available if real mode is
2468                  * emulated via vm86 mode.  Still, do not go to great lengths
2469                  * to avoid userspace's usage of the feature, because it is a
2470                  * fringe case that is not enabled except via specific settings
2471                  * of the module parameters.
2472                  */
2473                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2474                 break;
2475         case KVM_CAP_COALESCED_MMIO:
2476                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2477                 break;
2478         case KVM_CAP_VAPIC:
2479                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2480                 break;
2481         case KVM_CAP_NR_VCPUS:
2482                 r = KVM_SOFT_MAX_VCPUS;
2483                 break;
2484         case KVM_CAP_MAX_VCPUS:
2485                 r = KVM_MAX_VCPUS;
2486                 break;
2487         case KVM_CAP_NR_MEMSLOTS:
2488                 r = KVM_USER_MEM_SLOTS;
2489                 break;
2490         case KVM_CAP_PV_MMU:    /* obsolete */
2491                 r = 0;
2492                 break;
2493 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2494         case KVM_CAP_IOMMU:
2495                 r = iommu_present(&pci_bus_type);
2496                 break;
2497 #endif
2498         case KVM_CAP_MCE:
2499                 r = KVM_MAX_MCE_BANKS;
2500                 break;
2501         case KVM_CAP_XCRS:
2502                 r = cpu_has_xsave;
2503                 break;
2504         case KVM_CAP_TSC_CONTROL:
2505                 r = kvm_has_tsc_control;
2506                 break;
2507         default:
2508                 r = 0;
2509                 break;
2510         }
2511         return r;
2512
2513 }
2514
2515 long kvm_arch_dev_ioctl(struct file *filp,
2516                         unsigned int ioctl, unsigned long arg)
2517 {
2518         void __user *argp = (void __user *)arg;
2519         long r;
2520
2521         switch (ioctl) {
2522         case KVM_GET_MSR_INDEX_LIST: {
2523                 struct kvm_msr_list __user *user_msr_list = argp;
2524                 struct kvm_msr_list msr_list;
2525                 unsigned n;
2526
2527                 r = -EFAULT;
2528                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2529                         goto out;
2530                 n = msr_list.nmsrs;
2531                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2532                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2533                         goto out;
2534                 r = -E2BIG;
2535                 if (n < msr_list.nmsrs)
2536                         goto out;
2537                 r = -EFAULT;
2538                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2539                                  num_msrs_to_save * sizeof(u32)))
2540                         goto out;
2541                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2542                                  &emulated_msrs,
2543                                  num_emulated_msrs * sizeof(u32)))
2544                         goto out;
2545                 r = 0;
2546                 break;
2547         }
2548         case KVM_GET_SUPPORTED_CPUID:
2549         case KVM_GET_EMULATED_CPUID: {
2550                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2551                 struct kvm_cpuid2 cpuid;
2552
2553                 r = -EFAULT;
2554                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2555                         goto out;
2556
2557                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2558                                             ioctl);
2559                 if (r)
2560                         goto out;
2561
2562                 r = -EFAULT;
2563                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2564                         goto out;
2565                 r = 0;
2566                 break;
2567         }
2568         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2569                 u64 mce_cap;
2570
2571                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2572                 r = -EFAULT;
2573                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2574                         goto out;
2575                 r = 0;
2576                 break;
2577         }
2578         default:
2579                 r = -EINVAL;
2580         }
2581 out:
2582         return r;
2583 }
2584
2585 static void wbinvd_ipi(void *garbage)
2586 {
2587         wbinvd();
2588 }
2589
2590 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2591 {
2592         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2593 }
2594
2595 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2596 {
2597         /* Address WBINVD may be executed by guest */
2598         if (need_emulate_wbinvd(vcpu)) {
2599                 if (kvm_x86_ops->has_wbinvd_exit())
2600                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2601                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2602                         smp_call_function_single(vcpu->cpu,
2603                                         wbinvd_ipi, NULL, 1);
2604         }
2605
2606         kvm_x86_ops->vcpu_load(vcpu, cpu);
2607
2608         /* Apply any externally detected TSC adjustments (due to suspend) */
2609         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2610                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2611                 vcpu->arch.tsc_offset_adjustment = 0;
2612                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2613         }
2614
2615         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2616                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2617                                 rdtsc() - vcpu->arch.last_host_tsc;
2618                 if (tsc_delta < 0)
2619                         mark_tsc_unstable("KVM discovered backwards TSC");
2620                 if (check_tsc_unstable()) {
2621                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2622                                                 vcpu->arch.last_guest_tsc);
2623                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2624                         vcpu->arch.tsc_catchup = 1;
2625                 }
2626                 /*
2627                  * On a host with synchronized TSC, there is no need to update
2628                  * kvmclock on vcpu->cpu migration
2629                  */
2630                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2631                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2632                 if (vcpu->cpu != cpu)
2633                         kvm_migrate_timers(vcpu);
2634                 vcpu->cpu = cpu;
2635         }
2636
2637         accumulate_steal_time(vcpu);
2638         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2639 }
2640
2641 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2642 {
2643         kvm_x86_ops->vcpu_put(vcpu);
2644         kvm_put_guest_fpu(vcpu);
2645         vcpu->arch.last_host_tsc = rdtsc();
2646 }
2647
2648 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2649                                     struct kvm_lapic_state *s)
2650 {
2651         kvm_x86_ops->sync_pir_to_irr(vcpu);
2652         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2653
2654         return 0;
2655 }
2656
2657 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2658                                     struct kvm_lapic_state *s)
2659 {
2660         kvm_apic_post_state_restore(vcpu, s);
2661         update_cr8_intercept(vcpu);
2662
2663         return 0;
2664 }
2665
2666 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2667                                     struct kvm_interrupt *irq)
2668 {
2669         if (irq->irq >= KVM_NR_INTERRUPTS)
2670                 return -EINVAL;
2671
2672         if (!irqchip_in_kernel(vcpu->kvm)) {
2673                 kvm_queue_interrupt(vcpu, irq->irq, false);
2674                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2675                 return 0;
2676         }
2677
2678         /*
2679          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2680          * fail for in-kernel 8259.
2681          */
2682         if (pic_in_kernel(vcpu->kvm))
2683                 return -ENXIO;
2684
2685         if (vcpu->arch.pending_external_vector != -1)
2686                 return -EEXIST;
2687
2688         vcpu->arch.pending_external_vector = irq->irq;
2689         return 0;
2690 }
2691
2692 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2693 {
2694         kvm_inject_nmi(vcpu);
2695
2696         return 0;
2697 }
2698
2699 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2700 {
2701         kvm_make_request(KVM_REQ_SMI, vcpu);
2702
2703         return 0;
2704 }
2705
2706 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2707                                            struct kvm_tpr_access_ctl *tac)
2708 {
2709         if (tac->flags)
2710                 return -EINVAL;
2711         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2712         return 0;
2713 }
2714
2715 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2716                                         u64 mcg_cap)
2717 {
2718         int r;
2719         unsigned bank_num = mcg_cap & 0xff, bank;
2720
2721         r = -EINVAL;
2722         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2723                 goto out;
2724         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2725                 goto out;
2726         r = 0;
2727         vcpu->arch.mcg_cap = mcg_cap;
2728         /* Init IA32_MCG_CTL to all 1s */
2729         if (mcg_cap & MCG_CTL_P)
2730                 vcpu->arch.mcg_ctl = ~(u64)0;
2731         /* Init IA32_MCi_CTL to all 1s */
2732         for (bank = 0; bank < bank_num; bank++)
2733                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2734 out:
2735         return r;
2736 }
2737
2738 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2739                                       struct kvm_x86_mce *mce)
2740 {
2741         u64 mcg_cap = vcpu->arch.mcg_cap;
2742         unsigned bank_num = mcg_cap & 0xff;
2743         u64 *banks = vcpu->arch.mce_banks;
2744
2745         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2746                 return -EINVAL;
2747         /*
2748          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2749          * reporting is disabled
2750          */
2751         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2752             vcpu->arch.mcg_ctl != ~(u64)0)
2753                 return 0;
2754         banks += 4 * mce->bank;
2755         /*
2756          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2757          * reporting is disabled for the bank
2758          */
2759         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2760                 return 0;
2761         if (mce->status & MCI_STATUS_UC) {
2762                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2763                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2764                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2765                         return 0;
2766                 }
2767                 if (banks[1] & MCI_STATUS_VAL)
2768                         mce->status |= MCI_STATUS_OVER;
2769                 banks[2] = mce->addr;
2770                 banks[3] = mce->misc;
2771                 vcpu->arch.mcg_status = mce->mcg_status;
2772                 banks[1] = mce->status;
2773                 kvm_queue_exception(vcpu, MC_VECTOR);
2774         } else if (!(banks[1] & MCI_STATUS_VAL)
2775                    || !(banks[1] & MCI_STATUS_UC)) {
2776                 if (banks[1] & MCI_STATUS_VAL)
2777                         mce->status |= MCI_STATUS_OVER;
2778                 banks[2] = mce->addr;
2779                 banks[3] = mce->misc;
2780                 banks[1] = mce->status;
2781         } else
2782                 banks[1] |= MCI_STATUS_OVER;
2783         return 0;
2784 }
2785
2786 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2787                                                struct kvm_vcpu_events *events)
2788 {
2789         process_nmi(vcpu);
2790         events->exception.injected =
2791                 vcpu->arch.exception.pending &&
2792                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2793         events->exception.nr = vcpu->arch.exception.nr;
2794         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2795         events->exception.pad = 0;
2796         events->exception.error_code = vcpu->arch.exception.error_code;
2797
2798         events->interrupt.injected =
2799                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2800         events->interrupt.nr = vcpu->arch.interrupt.nr;
2801         events->interrupt.soft = 0;
2802         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2803
2804         events->nmi.injected = vcpu->arch.nmi_injected;
2805         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2806         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2807         events->nmi.pad = 0;
2808
2809         events->sipi_vector = 0; /* never valid when reporting to user space */
2810
2811         events->smi.smm = is_smm(vcpu);
2812         events->smi.pending = vcpu->arch.smi_pending;
2813         events->smi.smm_inside_nmi =
2814                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2815         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2816
2817         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2818                          | KVM_VCPUEVENT_VALID_SHADOW
2819                          | KVM_VCPUEVENT_VALID_SMM);
2820         memset(&events->reserved, 0, sizeof(events->reserved));
2821 }
2822
2823 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2824                                               struct kvm_vcpu_events *events)
2825 {
2826         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2827                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2828                               | KVM_VCPUEVENT_VALID_SHADOW
2829                               | KVM_VCPUEVENT_VALID_SMM))
2830                 return -EINVAL;
2831
2832         process_nmi(vcpu);
2833         vcpu->arch.exception.pending = events->exception.injected;
2834         vcpu->arch.exception.nr = events->exception.nr;
2835         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2836         vcpu->arch.exception.error_code = events->exception.error_code;
2837
2838         vcpu->arch.interrupt.pending = events->interrupt.injected;
2839         vcpu->arch.interrupt.nr = events->interrupt.nr;
2840         vcpu->arch.interrupt.soft = events->interrupt.soft;
2841         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2842                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2843                                                   events->interrupt.shadow);
2844
2845         vcpu->arch.nmi_injected = events->nmi.injected;
2846         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2847                 vcpu->arch.nmi_pending = events->nmi.pending;
2848         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2849
2850         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2851             kvm_vcpu_has_lapic(vcpu))
2852                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2853
2854         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2855                 if (events->smi.smm)
2856                         vcpu->arch.hflags |= HF_SMM_MASK;
2857                 else
2858                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2859                 vcpu->arch.smi_pending = events->smi.pending;
2860                 if (events->smi.smm_inside_nmi)
2861                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2862                 else
2863                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2864                 if (kvm_vcpu_has_lapic(vcpu)) {
2865                         if (events->smi.latched_init)
2866                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2867                         else
2868                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2869                 }
2870         }
2871
2872         kvm_make_request(KVM_REQ_EVENT, vcpu);
2873
2874         return 0;
2875 }
2876
2877 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2878                                              struct kvm_debugregs *dbgregs)
2879 {
2880         unsigned long val;
2881
2882         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2883         kvm_get_dr(vcpu, 6, &val);
2884         dbgregs->dr6 = val;
2885         dbgregs->dr7 = vcpu->arch.dr7;
2886         dbgregs->flags = 0;
2887         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2888 }
2889
2890 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2891                                             struct kvm_debugregs *dbgregs)
2892 {
2893         if (dbgregs->flags)
2894                 return -EINVAL;
2895
2896         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2897         kvm_update_dr0123(vcpu);
2898         vcpu->arch.dr6 = dbgregs->dr6;
2899         kvm_update_dr6(vcpu);
2900         vcpu->arch.dr7 = dbgregs->dr7;
2901         kvm_update_dr7(vcpu);
2902
2903         return 0;
2904 }
2905
2906 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2907
2908 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2909 {
2910         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2911         u64 xstate_bv = xsave->header.xfeatures;
2912         u64 valid;
2913
2914         /*
2915          * Copy legacy XSAVE area, to avoid complications with CPUID
2916          * leaves 0 and 1 in the loop below.
2917          */
2918         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2919
2920         /* Set XSTATE_BV */
2921         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2922
2923         /*
2924          * Copy each region from the possibly compacted offset to the
2925          * non-compacted offset.
2926          */
2927         valid = xstate_bv & ~XSTATE_FPSSE;
2928         while (valid) {
2929                 u64 feature = valid & -valid;
2930                 int index = fls64(feature) - 1;
2931                 void *src = get_xsave_addr(xsave, feature);
2932
2933                 if (src) {
2934                         u32 size, offset, ecx, edx;
2935                         cpuid_count(XSTATE_CPUID, index,
2936                                     &size, &offset, &ecx, &edx);
2937                         memcpy(dest + offset, src, size);
2938                 }
2939
2940                 valid -= feature;
2941         }
2942 }
2943
2944 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2945 {
2946         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2947         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2948         u64 valid;
2949
2950         /*
2951          * Copy legacy XSAVE area, to avoid complications with CPUID
2952          * leaves 0 and 1 in the loop below.
2953          */
2954         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2955
2956         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2957         xsave->header.xfeatures = xstate_bv;
2958         if (cpu_has_xsaves)
2959                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2960
2961         /*
2962          * Copy each region from the non-compacted offset to the
2963          * possibly compacted offset.
2964          */
2965         valid = xstate_bv & ~XSTATE_FPSSE;
2966         while (valid) {
2967                 u64 feature = valid & -valid;
2968                 int index = fls64(feature) - 1;
2969                 void *dest = get_xsave_addr(xsave, feature);
2970
2971                 if (dest) {
2972                         u32 size, offset, ecx, edx;
2973                         cpuid_count(XSTATE_CPUID, index,
2974                                     &size, &offset, &ecx, &edx);
2975                         memcpy(dest, src + offset, size);
2976                 }
2977
2978                 valid -= feature;
2979         }
2980 }
2981
2982 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2983                                          struct kvm_xsave *guest_xsave)
2984 {
2985         if (cpu_has_xsave) {
2986                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2987                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2988         } else {
2989                 memcpy(guest_xsave->region,
2990                         &vcpu->arch.guest_fpu.state.fxsave,
2991                         sizeof(struct fxregs_state));
2992                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2993                         XSTATE_FPSSE;
2994         }
2995 }
2996
2997 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2998                                         struct kvm_xsave *guest_xsave)
2999 {
3000         u64 xstate_bv =
3001                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3002
3003         if (cpu_has_xsave) {
3004                 /*
3005                  * Here we allow setting states that are not present in
3006                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3007                  * with old userspace.
3008                  */
3009                 if (xstate_bv & ~kvm_supported_xcr0())
3010                         return -EINVAL;
3011                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3012         } else {
3013                 if (xstate_bv & ~XSTATE_FPSSE)
3014                         return -EINVAL;
3015                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3016                         guest_xsave->region, sizeof(struct fxregs_state));
3017         }
3018         return 0;
3019 }
3020
3021 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3022                                         struct kvm_xcrs *guest_xcrs)
3023 {
3024         if (!cpu_has_xsave) {
3025                 guest_xcrs->nr_xcrs = 0;
3026                 return;
3027         }
3028
3029         guest_xcrs->nr_xcrs = 1;
3030         guest_xcrs->flags = 0;
3031         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3032         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3033 }
3034
3035 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3036                                        struct kvm_xcrs *guest_xcrs)
3037 {
3038         int i, r = 0;
3039
3040         if (!cpu_has_xsave)
3041                 return -EINVAL;
3042
3043         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3044                 return -EINVAL;
3045
3046         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3047                 /* Only support XCR0 currently */
3048                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3049                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3050                                 guest_xcrs->xcrs[i].value);
3051                         break;
3052                 }
3053         if (r)
3054                 r = -EINVAL;
3055         return r;
3056 }
3057
3058 /*
3059  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3060  * stopped by the hypervisor.  This function will be called from the host only.
3061  * EINVAL is returned when the host attempts to set the flag for a guest that
3062  * does not support pv clocks.
3063  */
3064 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3065 {
3066         if (!vcpu->arch.pv_time_enabled)
3067                 return -EINVAL;
3068         vcpu->arch.pvclock_set_guest_stopped_request = true;
3069         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3070         return 0;
3071 }
3072
3073 long kvm_arch_vcpu_ioctl(struct file *filp,
3074                          unsigned int ioctl, unsigned long arg)
3075 {
3076         struct kvm_vcpu *vcpu = filp->private_data;
3077         void __user *argp = (void __user *)arg;
3078         int r;
3079         union {
3080                 struct kvm_lapic_state *lapic;
3081                 struct kvm_xsave *xsave;
3082                 struct kvm_xcrs *xcrs;
3083                 void *buffer;
3084         } u;
3085
3086         u.buffer = NULL;
3087         switch (ioctl) {
3088         case KVM_GET_LAPIC: {
3089                 r = -EINVAL;
3090                 if (!vcpu->arch.apic)
3091                         goto out;
3092                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3093
3094                 r = -ENOMEM;
3095                 if (!u.lapic)
3096                         goto out;
3097                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3098                 if (r)
3099                         goto out;
3100                 r = -EFAULT;
3101                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3102                         goto out;
3103                 r = 0;
3104                 break;
3105         }
3106         case KVM_SET_LAPIC: {
3107                 r = -EINVAL;
3108                 if (!vcpu->arch.apic)
3109                         goto out;
3110                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3111                 if (IS_ERR(u.lapic))
3112                         return PTR_ERR(u.lapic);
3113
3114                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3115                 break;
3116         }
3117         case KVM_INTERRUPT: {
3118                 struct kvm_interrupt irq;
3119
3120                 r = -EFAULT;
3121                 if (copy_from_user(&irq, argp, sizeof irq))
3122                         goto out;
3123                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3124                 break;
3125         }
3126         case KVM_NMI: {
3127                 r = kvm_vcpu_ioctl_nmi(vcpu);
3128                 break;
3129         }
3130         case KVM_SMI: {
3131                 r = kvm_vcpu_ioctl_smi(vcpu);
3132                 break;
3133         }
3134         case KVM_SET_CPUID: {
3135                 struct kvm_cpuid __user *cpuid_arg = argp;
3136                 struct kvm_cpuid cpuid;
3137
3138                 r = -EFAULT;
3139                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3140                         goto out;
3141                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3142                 break;
3143         }
3144         case KVM_SET_CPUID2: {
3145                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3146                 struct kvm_cpuid2 cpuid;
3147
3148                 r = -EFAULT;
3149                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3150                         goto out;
3151                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3152                                               cpuid_arg->entries);
3153                 break;
3154         }
3155         case KVM_GET_CPUID2: {
3156                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3157                 struct kvm_cpuid2 cpuid;
3158
3159                 r = -EFAULT;
3160                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3161                         goto out;
3162                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3163                                               cpuid_arg->entries);
3164                 if (r)
3165                         goto out;
3166                 r = -EFAULT;
3167                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3168                         goto out;
3169                 r = 0;
3170                 break;
3171         }
3172         case KVM_GET_MSRS:
3173                 r = msr_io(vcpu, argp, do_get_msr, 1);
3174                 break;
3175         case KVM_SET_MSRS:
3176                 r = msr_io(vcpu, argp, do_set_msr, 0);
3177                 break;
3178         case KVM_TPR_ACCESS_REPORTING: {
3179                 struct kvm_tpr_access_ctl tac;
3180
3181                 r = -EFAULT;
3182                 if (copy_from_user(&tac, argp, sizeof tac))
3183                         goto out;
3184                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3185                 if (r)
3186                         goto out;
3187                 r = -EFAULT;
3188                 if (copy_to_user(argp, &tac, sizeof tac))
3189                         goto out;
3190                 r = 0;
3191                 break;
3192         };
3193         case KVM_SET_VAPIC_ADDR: {
3194                 struct kvm_vapic_addr va;
3195
3196                 r = -EINVAL;
3197                 if (!lapic_in_kernel(vcpu))
3198                         goto out;
3199                 r = -EFAULT;
3200                 if (copy_from_user(&va, argp, sizeof va))
3201                         goto out;
3202                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3203                 break;
3204         }
3205         case KVM_X86_SETUP_MCE: {
3206                 u64 mcg_cap;
3207
3208                 r = -EFAULT;
3209                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3210                         goto out;
3211                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3212                 break;
3213         }
3214         case KVM_X86_SET_MCE: {
3215                 struct kvm_x86_mce mce;
3216
3217                 r = -EFAULT;
3218                 if (copy_from_user(&mce, argp, sizeof mce))
3219                         goto out;
3220                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3221                 break;
3222         }
3223         case KVM_GET_VCPU_EVENTS: {
3224                 struct kvm_vcpu_events events;
3225
3226                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3227
3228                 r = -EFAULT;
3229                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3230                         break;
3231                 r = 0;
3232                 break;
3233         }
3234         case KVM_SET_VCPU_EVENTS: {
3235                 struct kvm_vcpu_events events;
3236
3237                 r = -EFAULT;
3238                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3239                         break;
3240
3241                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3242                 break;
3243         }
3244         case KVM_GET_DEBUGREGS: {
3245                 struct kvm_debugregs dbgregs;
3246
3247                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3248
3249                 r = -EFAULT;
3250                 if (copy_to_user(argp, &dbgregs,
3251                                  sizeof(struct kvm_debugregs)))
3252                         break;
3253                 r = 0;
3254                 break;
3255         }
3256         case KVM_SET_DEBUGREGS: {
3257                 struct kvm_debugregs dbgregs;
3258
3259                 r = -EFAULT;
3260                 if (copy_from_user(&dbgregs, argp,
3261                                    sizeof(struct kvm_debugregs)))
3262                         break;
3263
3264                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3265                 break;
3266         }
3267         case KVM_GET_XSAVE: {
3268                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3269                 r = -ENOMEM;
3270                 if (!u.xsave)
3271                         break;
3272
3273                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3274
3275                 r = -EFAULT;
3276                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3277                         break;
3278                 r = 0;
3279                 break;
3280         }
3281         case KVM_SET_XSAVE: {
3282                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3283                 if (IS_ERR(u.xsave))
3284                         return PTR_ERR(u.xsave);
3285
3286                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3287                 break;
3288         }
3289         case KVM_GET_XCRS: {
3290                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3291                 r = -ENOMEM;
3292                 if (!u.xcrs)
3293                         break;
3294
3295                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3296
3297                 r = -EFAULT;
3298                 if (copy_to_user(argp, u.xcrs,
3299                                  sizeof(struct kvm_xcrs)))
3300                         break;
3301                 r = 0;
3302                 break;
3303         }
3304         case KVM_SET_XCRS: {
3305                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3306                 if (IS_ERR(u.xcrs))
3307                         return PTR_ERR(u.xcrs);
3308
3309                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3310                 break;
3311         }
3312         case KVM_SET_TSC_KHZ: {
3313                 u32 user_tsc_khz;
3314
3315                 r = -EINVAL;
3316                 user_tsc_khz = (u32)arg;
3317
3318                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3319                         goto out;
3320
3321                 if (user_tsc_khz == 0)
3322                         user_tsc_khz = tsc_khz;
3323
3324                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3325
3326                 r = 0;
3327                 goto out;
3328         }
3329         case KVM_GET_TSC_KHZ: {
3330                 r = vcpu->arch.virtual_tsc_khz;
3331                 goto out;
3332         }
3333         case KVM_KVMCLOCK_CTRL: {
3334                 r = kvm_set_guest_paused(vcpu);
3335                 goto out;
3336         }
3337         default:
3338                 r = -EINVAL;
3339         }
3340 out:
3341         kfree(u.buffer);
3342         return r;
3343 }
3344
3345 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3346 {
3347         return VM_FAULT_SIGBUS;
3348 }
3349
3350 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3351 {
3352         int ret;
3353
3354         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3355                 return -EINVAL;
3356         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3357         return ret;
3358 }
3359
3360 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3361                                               u64 ident_addr)
3362 {
3363         kvm->arch.ept_identity_map_addr = ident_addr;
3364         return 0;
3365 }
3366
3367 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3368                                           u32 kvm_nr_mmu_pages)
3369 {
3370         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3371                 return -EINVAL;
3372
3373         mutex_lock(&kvm->slots_lock);
3374
3375         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3376         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3377
3378         mutex_unlock(&kvm->slots_lock);
3379         return 0;
3380 }
3381
3382 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3383 {
3384         return kvm->arch.n_max_mmu_pages;
3385 }
3386
3387 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3388 {
3389         int r;
3390
3391         r = 0;
3392         switch (chip->chip_id) {
3393         case KVM_IRQCHIP_PIC_MASTER:
3394                 memcpy(&chip->chip.pic,
3395                         &pic_irqchip(kvm)->pics[0],
3396                         sizeof(struct kvm_pic_state));
3397                 break;
3398         case KVM_IRQCHIP_PIC_SLAVE:
3399                 memcpy(&chip->chip.pic,
3400                         &pic_irqchip(kvm)->pics[1],
3401                         sizeof(struct kvm_pic_state));
3402                 break;
3403         case KVM_IRQCHIP_IOAPIC:
3404                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3405                 break;
3406         default:
3407                 r = -EINVAL;
3408                 break;
3409         }
3410         return r;
3411 }
3412
3413 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3414 {
3415         int r;
3416
3417         r = 0;
3418         switch (chip->chip_id) {
3419         case KVM_IRQCHIP_PIC_MASTER:
3420                 spin_lock(&pic_irqchip(kvm)->lock);
3421                 memcpy(&pic_irqchip(kvm)->pics[0],
3422                         &chip->chip.pic,
3423                         sizeof(struct kvm_pic_state));
3424                 spin_unlock(&pic_irqchip(kvm)->lock);
3425                 break;
3426         case KVM_IRQCHIP_PIC_SLAVE:
3427                 spin_lock(&pic_irqchip(kvm)->lock);
3428                 memcpy(&pic_irqchip(kvm)->pics[1],
3429                         &chip->chip.pic,
3430                         sizeof(struct kvm_pic_state));
3431                 spin_unlock(&pic_irqchip(kvm)->lock);
3432                 break;
3433         case KVM_IRQCHIP_IOAPIC:
3434                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3435                 break;
3436         default:
3437                 r = -EINVAL;
3438                 break;
3439         }
3440         kvm_pic_update_irq(pic_irqchip(kvm));
3441         return r;
3442 }
3443
3444 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3445 {
3446         int r = 0;
3447
3448         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3449         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3450         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3451         return r;
3452 }
3453
3454 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3455 {
3456         int r = 0;
3457
3458         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3459         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3460         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3461         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3462         return r;
3463 }
3464
3465 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3466 {
3467         int r = 0;
3468
3469         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3470         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3471                 sizeof(ps->channels));
3472         ps->flags = kvm->arch.vpit->pit_state.flags;
3473         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3474         memset(&ps->reserved, 0, sizeof(ps->reserved));
3475         return r;
3476 }
3477
3478 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3479 {
3480         int r = 0, start = 0;
3481         u32 prev_legacy, cur_legacy;
3482         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3483         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3484         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3485         if (!prev_legacy && cur_legacy)
3486                 start = 1;
3487         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3488                sizeof(kvm->arch.vpit->pit_state.channels));
3489         kvm->arch.vpit->pit_state.flags = ps->flags;
3490         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3491         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3492         return r;
3493 }
3494
3495 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3496                                  struct kvm_reinject_control *control)
3497 {
3498         if (!kvm->arch.vpit)
3499                 return -ENXIO;
3500         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3501         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3502         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3503         return 0;
3504 }
3505
3506 /**
3507  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3508  * @kvm: kvm instance
3509  * @log: slot id and address to which we copy the log
3510  *
3511  * Steps 1-4 below provide general overview of dirty page logging. See
3512  * kvm_get_dirty_log_protect() function description for additional details.
3513  *
3514  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3515  * always flush the TLB (step 4) even if previous step failed  and the dirty
3516  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3517  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3518  * writes will be marked dirty for next log read.
3519  *
3520  *   1. Take a snapshot of the bit and clear it if needed.
3521  *   2. Write protect the corresponding page.
3522  *   3. Copy the snapshot to the userspace.
3523  *   4. Flush TLB's if needed.
3524  */
3525 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3526 {
3527         bool is_dirty = false;
3528         int r;
3529
3530         mutex_lock(&kvm->slots_lock);
3531
3532         /*
3533          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3534          */
3535         if (kvm_x86_ops->flush_log_dirty)
3536                 kvm_x86_ops->flush_log_dirty(kvm);
3537
3538         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3539
3540         /*
3541          * All the TLBs can be flushed out of mmu lock, see the comments in
3542          * kvm_mmu_slot_remove_write_access().
3543          */
3544         lockdep_assert_held(&kvm->slots_lock);
3545         if (is_dirty)
3546                 kvm_flush_remote_tlbs(kvm);
3547
3548         mutex_unlock(&kvm->slots_lock);
3549         return r;
3550 }
3551
3552 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3553                         bool line_status)
3554 {
3555         if (!irqchip_in_kernel(kvm))
3556                 return -ENXIO;
3557
3558         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3559                                         irq_event->irq, irq_event->level,
3560                                         line_status);
3561         return 0;
3562 }
3563
3564 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3565                                    struct kvm_enable_cap *cap)
3566 {
3567         int r;
3568
3569         if (cap->flags)
3570                 return -EINVAL;
3571
3572         switch (cap->cap) {
3573         case KVM_CAP_DISABLE_QUIRKS:
3574                 kvm->arch.disabled_quirks = cap->args[0];
3575                 r = 0;
3576                 break;
3577         case KVM_CAP_SPLIT_IRQCHIP: {
3578                 mutex_lock(&kvm->lock);
3579                 r = -EINVAL;
3580                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3581                         goto split_irqchip_unlock;
3582                 r = -EEXIST;
3583                 if (irqchip_in_kernel(kvm))
3584                         goto split_irqchip_unlock;
3585                 if (atomic_read(&kvm->online_vcpus))
3586                         goto split_irqchip_unlock;
3587                 r = kvm_setup_empty_irq_routing(kvm);
3588                 if (r)
3589                         goto split_irqchip_unlock;
3590                 /* Pairs with irqchip_in_kernel. */
3591                 smp_wmb();
3592                 kvm->arch.irqchip_split = true;
3593                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3594                 r = 0;
3595 split_irqchip_unlock:
3596                 mutex_unlock(&kvm->lock);
3597                 break;
3598         }
3599         default:
3600                 r = -EINVAL;
3601                 break;
3602         }
3603         return r;
3604 }
3605
3606 long kvm_arch_vm_ioctl(struct file *filp,
3607                        unsigned int ioctl, unsigned long arg)
3608 {
3609         struct kvm *kvm = filp->private_data;
3610         void __user *argp = (void __user *)arg;
3611         int r = -ENOTTY;
3612         /*
3613          * This union makes it completely explicit to gcc-3.x
3614          * that these two variables' stack usage should be
3615          * combined, not added together.
3616          */
3617         union {
3618                 struct kvm_pit_state ps;
3619                 struct kvm_pit_state2 ps2;
3620                 struct kvm_pit_config pit_config;
3621         } u;
3622
3623         switch (ioctl) {
3624         case KVM_SET_TSS_ADDR:
3625                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3626                 break;
3627         case KVM_SET_IDENTITY_MAP_ADDR: {
3628                 u64 ident_addr;
3629
3630                 r = -EFAULT;
3631                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3632                         goto out;
3633                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3634                 break;
3635         }
3636         case KVM_SET_NR_MMU_PAGES:
3637                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3638                 break;
3639         case KVM_GET_NR_MMU_PAGES:
3640                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3641                 break;
3642         case KVM_CREATE_IRQCHIP: {
3643                 struct kvm_pic *vpic;
3644
3645                 mutex_lock(&kvm->lock);
3646                 r = -EEXIST;
3647                 if (kvm->arch.vpic)
3648                         goto create_irqchip_unlock;
3649                 r = -EINVAL;
3650                 if (atomic_read(&kvm->online_vcpus))
3651                         goto create_irqchip_unlock;
3652                 r = -ENOMEM;
3653                 vpic = kvm_create_pic(kvm);
3654                 if (vpic) {
3655                         r = kvm_ioapic_init(kvm);
3656                         if (r) {
3657                                 mutex_lock(&kvm->slots_lock);
3658                                 kvm_destroy_pic(vpic);
3659                                 mutex_unlock(&kvm->slots_lock);
3660                                 goto create_irqchip_unlock;
3661                         }
3662                 } else
3663                         goto create_irqchip_unlock;
3664                 r = kvm_setup_default_irq_routing(kvm);
3665                 if (r) {
3666                         mutex_lock(&kvm->slots_lock);
3667                         mutex_lock(&kvm->irq_lock);
3668                         kvm_ioapic_destroy(kvm);
3669                         kvm_destroy_pic(vpic);
3670                         mutex_unlock(&kvm->irq_lock);
3671                         mutex_unlock(&kvm->slots_lock);
3672                         goto create_irqchip_unlock;
3673                 }
3674                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3675                 smp_wmb();
3676                 kvm->arch.vpic = vpic;
3677         create_irqchip_unlock:
3678                 mutex_unlock(&kvm->lock);
3679                 break;
3680         }
3681         case KVM_CREATE_PIT:
3682                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3683                 goto create_pit;
3684         case KVM_CREATE_PIT2:
3685                 r = -EFAULT;
3686                 if (copy_from_user(&u.pit_config, argp,
3687                                    sizeof(struct kvm_pit_config)))
3688                         goto out;
3689         create_pit:
3690                 mutex_lock(&kvm->slots_lock);
3691                 r = -EEXIST;
3692                 if (kvm->arch.vpit)
3693                         goto create_pit_unlock;
3694                 r = -ENOMEM;
3695                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3696                 if (kvm->arch.vpit)
3697                         r = 0;
3698         create_pit_unlock:
3699                 mutex_unlock(&kvm->slots_lock);
3700                 break;
3701         case KVM_GET_IRQCHIP: {
3702                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3703                 struct kvm_irqchip *chip;
3704
3705                 chip = memdup_user(argp, sizeof(*chip));
3706                 if (IS_ERR(chip)) {
3707                         r = PTR_ERR(chip);
3708                         goto out;
3709                 }
3710
3711                 r = -ENXIO;
3712                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3713                         goto get_irqchip_out;
3714                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3715                 if (r)
3716                         goto get_irqchip_out;
3717                 r = -EFAULT;
3718                 if (copy_to_user(argp, chip, sizeof *chip))
3719                         goto get_irqchip_out;
3720                 r = 0;
3721         get_irqchip_out:
3722                 kfree(chip);
3723                 break;
3724         }
3725         case KVM_SET_IRQCHIP: {
3726                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3727                 struct kvm_irqchip *chip;
3728
3729                 chip = memdup_user(argp, sizeof(*chip));
3730                 if (IS_ERR(chip)) {
3731                         r = PTR_ERR(chip);
3732                         goto out;
3733                 }
3734
3735                 r = -ENXIO;
3736                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3737                         goto set_irqchip_out;
3738                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3739                 if (r)
3740                         goto set_irqchip_out;
3741                 r = 0;
3742         set_irqchip_out:
3743                 kfree(chip);
3744                 break;
3745         }
3746         case KVM_GET_PIT: {
3747                 r = -EFAULT;
3748                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3749                         goto out;
3750                 r = -ENXIO;
3751                 if (!kvm->arch.vpit)
3752                         goto out;
3753                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3754                 if (r)
3755                         goto out;
3756                 r = -EFAULT;
3757                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3758                         goto out;
3759                 r = 0;
3760                 break;
3761         }
3762         case KVM_SET_PIT: {
3763                 r = -EFAULT;
3764                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3765                         goto out;
3766                 r = -ENXIO;
3767                 if (!kvm->arch.vpit)
3768                         goto out;
3769                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3770                 break;
3771         }
3772         case KVM_GET_PIT2: {
3773                 r = -ENXIO;
3774                 if (!kvm->arch.vpit)
3775                         goto out;
3776                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3777                 if (r)
3778                         goto out;
3779                 r = -EFAULT;
3780                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3781                         goto out;
3782                 r = 0;
3783                 break;
3784         }
3785         case KVM_SET_PIT2: {
3786                 r = -EFAULT;
3787                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3788                         goto out;
3789                 r = -ENXIO;
3790                 if (!kvm->arch.vpit)
3791                         goto out;
3792                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3793                 break;
3794         }
3795         case KVM_REINJECT_CONTROL: {
3796                 struct kvm_reinject_control control;
3797                 r =  -EFAULT;
3798                 if (copy_from_user(&control, argp, sizeof(control)))
3799                         goto out;
3800                 r = kvm_vm_ioctl_reinject(kvm, &control);
3801                 break;
3802         }
3803         case KVM_SET_BOOT_CPU_ID:
3804                 r = 0;
3805                 mutex_lock(&kvm->lock);
3806                 if (atomic_read(&kvm->online_vcpus) != 0)
3807                         r = -EBUSY;
3808                 else
3809                         kvm->arch.bsp_vcpu_id = arg;
3810                 mutex_unlock(&kvm->lock);
3811                 break;
3812         case KVM_XEN_HVM_CONFIG: {
3813                 r = -EFAULT;
3814                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3815                                    sizeof(struct kvm_xen_hvm_config)))
3816                         goto out;
3817                 r = -EINVAL;
3818                 if (kvm->arch.xen_hvm_config.flags)
3819                         goto out;
3820                 r = 0;
3821                 break;
3822         }
3823         case KVM_SET_CLOCK: {
3824                 struct kvm_clock_data user_ns;
3825                 u64 now_ns;
3826                 s64 delta;
3827
3828                 r = -EFAULT;
3829                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3830                         goto out;
3831
3832                 r = -EINVAL;
3833                 if (user_ns.flags)
3834                         goto out;
3835
3836                 r = 0;
3837                 local_irq_disable();
3838                 now_ns = get_kernel_ns();
3839                 delta = user_ns.clock - now_ns;
3840                 local_irq_enable();
3841                 kvm->arch.kvmclock_offset = delta;
3842                 kvm_gen_update_masterclock(kvm);
3843                 break;
3844         }
3845         case KVM_GET_CLOCK: {
3846                 struct kvm_clock_data user_ns;
3847                 u64 now_ns;
3848
3849                 local_irq_disable();
3850                 now_ns = get_kernel_ns();
3851                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3852                 local_irq_enable();
3853                 user_ns.flags = 0;
3854                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3855
3856                 r = -EFAULT;
3857                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3858                         goto out;
3859                 r = 0;
3860                 break;
3861         }
3862         case KVM_ENABLE_CAP: {
3863                 struct kvm_enable_cap cap;
3864
3865                 r = -EFAULT;
3866                 if (copy_from_user(&cap, argp, sizeof(cap)))
3867                         goto out;
3868                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3869                 break;
3870         }
3871         default:
3872                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3873         }
3874 out:
3875         return r;
3876 }
3877
3878 static void kvm_init_msr_list(void)
3879 {
3880         u32 dummy[2];
3881         unsigned i, j;
3882
3883         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3884                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3885                         continue;
3886
3887                 /*
3888                  * Even MSRs that are valid in the host may not be exposed
3889                  * to the guests in some cases.  We could work around this
3890                  * in VMX with the generic MSR save/load machinery, but it
3891                  * is not really worthwhile since it will really only
3892                  * happen with nested virtualization.
3893                  */
3894                 switch (msrs_to_save[i]) {
3895                 case MSR_IA32_BNDCFGS:
3896                         if (!kvm_x86_ops->mpx_supported())
3897                                 continue;
3898                         break;
3899                 default:
3900                         break;
3901                 }
3902
3903                 if (j < i)
3904                         msrs_to_save[j] = msrs_to_save[i];
3905                 j++;
3906         }
3907         num_msrs_to_save = j;
3908
3909         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3910                 switch (emulated_msrs[i]) {
3911                 case MSR_IA32_SMBASE:
3912                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3913                                 continue;
3914                         break;
3915                 default:
3916                         break;
3917                 }
3918
3919                 if (j < i)
3920                         emulated_msrs[j] = emulated_msrs[i];
3921                 j++;
3922         }
3923         num_emulated_msrs = j;
3924 }
3925
3926 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3927                            const void *v)
3928 {
3929         int handled = 0;
3930         int n;
3931
3932         do {
3933                 n = min(len, 8);
3934                 if (!(vcpu->arch.apic &&
3935                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3936                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3937                         break;
3938                 handled += n;
3939                 addr += n;
3940                 len -= n;
3941                 v += n;
3942         } while (len);
3943
3944         return handled;
3945 }
3946
3947 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3948 {
3949         int handled = 0;
3950         int n;
3951
3952         do {
3953                 n = min(len, 8);
3954                 if (!(vcpu->arch.apic &&
3955                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3956                                          addr, n, v))
3957                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3958                         break;
3959                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3960                 handled += n;
3961                 addr += n;
3962                 len -= n;
3963                 v += n;
3964         } while (len);
3965
3966         return handled;
3967 }
3968
3969 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3970                         struct kvm_segment *var, int seg)
3971 {
3972         kvm_x86_ops->set_segment(vcpu, var, seg);
3973 }
3974
3975 void kvm_get_segment(struct kvm_vcpu *vcpu,
3976                      struct kvm_segment *var, int seg)
3977 {
3978         kvm_x86_ops->get_segment(vcpu, var, seg);
3979 }
3980
3981 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3982                            struct x86_exception *exception)
3983 {
3984         gpa_t t_gpa;
3985
3986         BUG_ON(!mmu_is_nested(vcpu));
3987
3988         /* NPT walks are always user-walks */
3989         access |= PFERR_USER_MASK;
3990         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3991
3992         return t_gpa;
3993 }
3994
3995 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3996                               struct x86_exception *exception)
3997 {
3998         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3999         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4000 }
4001
4002  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4003                                 struct x86_exception *exception)
4004 {
4005         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4006         access |= PFERR_FETCH_MASK;
4007         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4008 }
4009
4010 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4011                                struct x86_exception *exception)
4012 {
4013         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4014         access |= PFERR_WRITE_MASK;
4015         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4016 }
4017
4018 /* uses this to access any guest's mapped memory without checking CPL */
4019 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4020                                 struct x86_exception *exception)
4021 {
4022         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4023 }
4024
4025 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4026                                       struct kvm_vcpu *vcpu, u32 access,
4027                                       struct x86_exception *exception)
4028 {
4029         void *data = val;
4030         int r = X86EMUL_CONTINUE;
4031
4032         while (bytes) {
4033                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4034                                                             exception);
4035                 unsigned offset = addr & (PAGE_SIZE-1);
4036                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4037                 int ret;
4038
4039                 if (gpa == UNMAPPED_GVA)
4040                         return X86EMUL_PROPAGATE_FAULT;
4041                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4042                                                offset, toread);
4043                 if (ret < 0) {
4044                         r = X86EMUL_IO_NEEDED;
4045                         goto out;
4046                 }
4047
4048                 bytes -= toread;
4049                 data += toread;
4050                 addr += toread;
4051         }
4052 out:
4053         return r;
4054 }
4055
4056 /* used for instruction fetching */
4057 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4058                                 gva_t addr, void *val, unsigned int bytes,
4059                                 struct x86_exception *exception)
4060 {
4061         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4062         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4063         unsigned offset;
4064         int ret;
4065
4066         /* Inline kvm_read_guest_virt_helper for speed.  */
4067         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4068                                                     exception);
4069         if (unlikely(gpa == UNMAPPED_GVA))
4070                 return X86EMUL_PROPAGATE_FAULT;
4071
4072         offset = addr & (PAGE_SIZE-1);
4073         if (WARN_ON(offset + bytes > PAGE_SIZE))
4074                 bytes = (unsigned)PAGE_SIZE - offset;
4075         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4076                                        offset, bytes);
4077         if (unlikely(ret < 0))
4078                 return X86EMUL_IO_NEEDED;
4079
4080         return X86EMUL_CONTINUE;
4081 }
4082
4083 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4084                                gva_t addr, void *val, unsigned int bytes,
4085                                struct x86_exception *exception)
4086 {
4087         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4088         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4089
4090         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4091                                           exception);
4092 }
4093 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4094
4095 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4096                                       gva_t addr, void *val, unsigned int bytes,
4097                                       struct x86_exception *exception)
4098 {
4099         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4100         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4101 }
4102
4103 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4104                                        gva_t addr, void *val,
4105                                        unsigned int bytes,
4106                                        struct x86_exception *exception)
4107 {
4108         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4109         void *data = val;
4110         int r = X86EMUL_CONTINUE;
4111
4112         while (bytes) {
4113                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4114                                                              PFERR_WRITE_MASK,
4115                                                              exception);
4116                 unsigned offset = addr & (PAGE_SIZE-1);
4117                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4118                 int ret;
4119
4120                 if (gpa == UNMAPPED_GVA)
4121                         return X86EMUL_PROPAGATE_FAULT;
4122                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4123                 if (ret < 0) {
4124                         r = X86EMUL_IO_NEEDED;
4125                         goto out;
4126                 }
4127
4128                 bytes -= towrite;
4129                 data += towrite;
4130                 addr += towrite;
4131         }
4132 out:
4133         return r;
4134 }
4135 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4136
4137 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4138                                 gpa_t *gpa, struct x86_exception *exception,
4139                                 bool write)
4140 {
4141         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4142                 | (write ? PFERR_WRITE_MASK : 0);
4143
4144         if (vcpu_match_mmio_gva(vcpu, gva)
4145             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4146                                  vcpu->arch.access, access)) {
4147                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4148                                         (gva & (PAGE_SIZE - 1));
4149                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4150                 return 1;
4151         }
4152
4153         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4154
4155         if (*gpa == UNMAPPED_GVA)
4156                 return -1;
4157
4158         /* For APIC access vmexit */
4159         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4160                 return 1;
4161
4162         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4163                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4164                 return 1;
4165         }
4166
4167         return 0;
4168 }
4169
4170 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4171                         const void *val, int bytes)
4172 {
4173         int ret;
4174
4175         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4176         if (ret < 0)
4177                 return 0;
4178         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4179         return 1;
4180 }
4181
4182 struct read_write_emulator_ops {
4183         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4184                                   int bytes);
4185         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4186                                   void *val, int bytes);
4187         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4188                                int bytes, void *val);
4189         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4190                                     void *val, int bytes);
4191         bool write;
4192 };
4193
4194 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4195 {
4196         if (vcpu->mmio_read_completed) {
4197                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4198                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4199                 vcpu->mmio_read_completed = 0;
4200                 return 1;
4201         }
4202
4203         return 0;
4204 }
4205
4206 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4207                         void *val, int bytes)
4208 {
4209         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4210 }
4211
4212 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4213                          void *val, int bytes)
4214 {
4215         return emulator_write_phys(vcpu, gpa, val, bytes);
4216 }
4217
4218 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4219 {
4220         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4221         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4222 }
4223
4224 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4225                           void *val, int bytes)
4226 {
4227         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4228         return X86EMUL_IO_NEEDED;
4229 }
4230
4231 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4232                            void *val, int bytes)
4233 {
4234         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4235
4236         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4237         return X86EMUL_CONTINUE;
4238 }
4239
4240 static const struct read_write_emulator_ops read_emultor = {
4241         .read_write_prepare = read_prepare,
4242         .read_write_emulate = read_emulate,
4243         .read_write_mmio = vcpu_mmio_read,
4244         .read_write_exit_mmio = read_exit_mmio,
4245 };
4246
4247 static const struct read_write_emulator_ops write_emultor = {
4248         .read_write_emulate = write_emulate,
4249         .read_write_mmio = write_mmio,
4250         .read_write_exit_mmio = write_exit_mmio,
4251         .write = true,
4252 };
4253
4254 static int emulator_read_write_onepage(unsigned long addr, void *val,
4255                                        unsigned int bytes,
4256                                        struct x86_exception *exception,
4257                                        struct kvm_vcpu *vcpu,
4258                                        const struct read_write_emulator_ops *ops)
4259 {
4260         gpa_t gpa;
4261         int handled, ret;
4262         bool write = ops->write;
4263         struct kvm_mmio_fragment *frag;
4264
4265         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4266
4267         if (ret < 0)
4268                 return X86EMUL_PROPAGATE_FAULT;
4269
4270         /* For APIC access vmexit */
4271         if (ret)
4272                 goto mmio;
4273
4274         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4275                 return X86EMUL_CONTINUE;
4276
4277 mmio:
4278         /*
4279          * Is this MMIO handled locally?
4280          */
4281         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4282         if (handled == bytes)
4283                 return X86EMUL_CONTINUE;
4284
4285         gpa += handled;
4286         bytes -= handled;
4287         val += handled;
4288
4289         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4290         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4291         frag->gpa = gpa;
4292         frag->data = val;
4293         frag->len = bytes;
4294         return X86EMUL_CONTINUE;
4295 }
4296
4297 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4298                         unsigned long addr,
4299                         void *val, unsigned int bytes,
4300                         struct x86_exception *exception,
4301                         const struct read_write_emulator_ops *ops)
4302 {
4303         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4304         gpa_t gpa;
4305         int rc;
4306
4307         if (ops->read_write_prepare &&
4308                   ops->read_write_prepare(vcpu, val, bytes))
4309                 return X86EMUL_CONTINUE;
4310
4311         vcpu->mmio_nr_fragments = 0;
4312
4313         /* Crossing a page boundary? */
4314         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4315                 int now;
4316
4317                 now = -addr & ~PAGE_MASK;
4318                 rc = emulator_read_write_onepage(addr, val, now, exception,
4319                                                  vcpu, ops);
4320
4321                 if (rc != X86EMUL_CONTINUE)
4322                         return rc;
4323                 addr += now;
4324                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4325                         addr = (u32)addr;
4326                 val += now;
4327                 bytes -= now;
4328         }
4329
4330         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4331                                          vcpu, ops);
4332         if (rc != X86EMUL_CONTINUE)
4333                 return rc;
4334
4335         if (!vcpu->mmio_nr_fragments)
4336                 return rc;
4337
4338         gpa = vcpu->mmio_fragments[0].gpa;
4339
4340         vcpu->mmio_needed = 1;
4341         vcpu->mmio_cur_fragment = 0;
4342
4343         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4344         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4345         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4346         vcpu->run->mmio.phys_addr = gpa;
4347
4348         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4349 }
4350
4351 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4352                                   unsigned long addr,
4353                                   void *val,
4354                                   unsigned int bytes,
4355                                   struct x86_exception *exception)
4356 {
4357         return emulator_read_write(ctxt, addr, val, bytes,
4358                                    exception, &read_emultor);
4359 }
4360
4361 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4362                             unsigned long addr,
4363                             const void *val,
4364                             unsigned int bytes,
4365                             struct x86_exception *exception)
4366 {
4367         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4368                                    exception, &write_emultor);
4369 }
4370
4371 #define CMPXCHG_TYPE(t, ptr, old, new) \
4372         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4373
4374 #ifdef CONFIG_X86_64
4375 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4376 #else
4377 #  define CMPXCHG64(ptr, old, new) \
4378         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4379 #endif
4380
4381 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4382                                      unsigned long addr,
4383                                      const void *old,
4384                                      const void *new,
4385                                      unsigned int bytes,
4386                                      struct x86_exception *exception)
4387 {
4388         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4389         gpa_t gpa;
4390         struct page *page;
4391         char *kaddr;
4392         bool exchanged;
4393
4394         /* guests cmpxchg8b have to be emulated atomically */
4395         if (bytes > 8 || (bytes & (bytes - 1)))
4396                 goto emul_write;
4397
4398         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4399
4400         if (gpa == UNMAPPED_GVA ||
4401             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4402                 goto emul_write;
4403
4404         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4405                 goto emul_write;
4406
4407         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4408         if (is_error_page(page))
4409                 goto emul_write;
4410
4411         kaddr = kmap_atomic(page);
4412         kaddr += offset_in_page(gpa);
4413         switch (bytes) {
4414         case 1:
4415                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4416                 break;
4417         case 2:
4418                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4419                 break;
4420         case 4:
4421                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4422                 break;
4423         case 8:
4424                 exchanged = CMPXCHG64(kaddr, old, new);
4425                 break;
4426         default:
4427                 BUG();
4428         }
4429         kunmap_atomic(kaddr);
4430         kvm_release_page_dirty(page);
4431
4432         if (!exchanged)
4433                 return X86EMUL_CMPXCHG_FAILED;
4434
4435         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4436         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4437
4438         return X86EMUL_CONTINUE;
4439
4440 emul_write:
4441         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4442
4443         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4444 }
4445
4446 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4447 {
4448         /* TODO: String I/O for in kernel device */
4449         int r;
4450
4451         if (vcpu->arch.pio.in)
4452                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4453                                     vcpu->arch.pio.size, pd);
4454         else
4455                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4456                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4457                                      pd);
4458         return r;
4459 }
4460
4461 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4462                                unsigned short port, void *val,
4463                                unsigned int count, bool in)
4464 {
4465         vcpu->arch.pio.port = port;
4466         vcpu->arch.pio.in = in;
4467         vcpu->arch.pio.count  = count;
4468         vcpu->arch.pio.size = size;
4469
4470         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4471                 vcpu->arch.pio.count = 0;
4472                 return 1;
4473         }
4474
4475         vcpu->run->exit_reason = KVM_EXIT_IO;
4476         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4477         vcpu->run->io.size = size;
4478         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4479         vcpu->run->io.count = count;
4480         vcpu->run->io.port = port;
4481
4482         return 0;
4483 }
4484
4485 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4486                                     int size, unsigned short port, void *val,
4487                                     unsigned int count)
4488 {
4489         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4490         int ret;
4491
4492         if (vcpu->arch.pio.count)
4493                 goto data_avail;
4494
4495         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4496         if (ret) {
4497 data_avail:
4498                 memcpy(val, vcpu->arch.pio_data, size * count);
4499                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4500                 vcpu->arch.pio.count = 0;
4501                 return 1;
4502         }
4503
4504         return 0;
4505 }
4506
4507 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4508                                      int size, unsigned short port,
4509                                      const void *val, unsigned int count)
4510 {
4511         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4512
4513         memcpy(vcpu->arch.pio_data, val, size * count);
4514         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4515         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4516 }
4517
4518 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4519 {
4520         return kvm_x86_ops->get_segment_base(vcpu, seg);
4521 }
4522
4523 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4524 {
4525         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4526 }
4527
4528 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4529 {
4530         if (!need_emulate_wbinvd(vcpu))
4531                 return X86EMUL_CONTINUE;
4532
4533         if (kvm_x86_ops->has_wbinvd_exit()) {
4534                 int cpu = get_cpu();
4535
4536                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4537                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4538                                 wbinvd_ipi, NULL, 1);
4539                 put_cpu();
4540                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4541         } else
4542                 wbinvd();
4543         return X86EMUL_CONTINUE;
4544 }
4545
4546 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4547 {
4548         kvm_x86_ops->skip_emulated_instruction(vcpu);
4549         return kvm_emulate_wbinvd_noskip(vcpu);
4550 }
4551 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4552
4553
4554
4555 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4556 {
4557         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4558 }
4559
4560 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4561                            unsigned long *dest)
4562 {
4563         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4564 }
4565
4566 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4567                            unsigned long value)
4568 {
4569
4570         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4571 }
4572
4573 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4574 {
4575         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4576 }
4577
4578 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4579 {
4580         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4581         unsigned long value;
4582
4583         switch (cr) {
4584         case 0:
4585                 value = kvm_read_cr0(vcpu);
4586                 break;
4587         case 2:
4588                 value = vcpu->arch.cr2;
4589                 break;
4590         case 3:
4591                 value = kvm_read_cr3(vcpu);
4592                 break;
4593         case 4:
4594                 value = kvm_read_cr4(vcpu);
4595                 break;
4596         case 8:
4597                 value = kvm_get_cr8(vcpu);
4598                 break;
4599         default:
4600                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4601                 return 0;
4602         }
4603
4604         return value;
4605 }
4606
4607 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4608 {
4609         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4610         int res = 0;
4611
4612         switch (cr) {
4613         case 0:
4614                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4615                 break;
4616         case 2:
4617                 vcpu->arch.cr2 = val;
4618                 break;
4619         case 3:
4620                 res = kvm_set_cr3(vcpu, val);
4621                 break;
4622         case 4:
4623                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4624                 break;
4625         case 8:
4626                 res = kvm_set_cr8(vcpu, val);
4627                 break;
4628         default:
4629                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4630                 res = -1;
4631         }
4632
4633         return res;
4634 }
4635
4636 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4637 {
4638         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4639 }
4640
4641 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4642 {
4643         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4644 }
4645
4646 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4647 {
4648         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4649 }
4650
4651 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4652 {
4653         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4654 }
4655
4656 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4657 {
4658         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4659 }
4660
4661 static unsigned long emulator_get_cached_segment_base(
4662         struct x86_emulate_ctxt *ctxt, int seg)
4663 {
4664         return get_segment_base(emul_to_vcpu(ctxt), seg);
4665 }
4666
4667 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4668                                  struct desc_struct *desc, u32 *base3,
4669                                  int seg)
4670 {
4671         struct kvm_segment var;
4672
4673         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4674         *selector = var.selector;
4675
4676         if (var.unusable) {
4677                 memset(desc, 0, sizeof(*desc));
4678                 return false;
4679         }
4680
4681         if (var.g)
4682                 var.limit >>= 12;
4683         set_desc_limit(desc, var.limit);
4684         set_desc_base(desc, (unsigned long)var.base);
4685 #ifdef CONFIG_X86_64
4686         if (base3)
4687                 *base3 = var.base >> 32;
4688 #endif
4689         desc->type = var.type;
4690         desc->s = var.s;
4691         desc->dpl = var.dpl;
4692         desc->p = var.present;
4693         desc->avl = var.avl;
4694         desc->l = var.l;
4695         desc->d = var.db;
4696         desc->g = var.g;
4697
4698         return true;
4699 }
4700
4701 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4702                                  struct desc_struct *desc, u32 base3,
4703                                  int seg)
4704 {
4705         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4706         struct kvm_segment var;
4707
4708         var.selector = selector;
4709         var.base = get_desc_base(desc);
4710 #ifdef CONFIG_X86_64
4711         var.base |= ((u64)base3) << 32;
4712 #endif
4713         var.limit = get_desc_limit(desc);
4714         if (desc->g)
4715                 var.limit = (var.limit << 12) | 0xfff;
4716         var.type = desc->type;
4717         var.dpl = desc->dpl;
4718         var.db = desc->d;
4719         var.s = desc->s;
4720         var.l = desc->l;
4721         var.g = desc->g;
4722         var.avl = desc->avl;
4723         var.present = desc->p;
4724         var.unusable = !var.present;
4725         var.padding = 0;
4726
4727         kvm_set_segment(vcpu, &var, seg);
4728         return;
4729 }
4730
4731 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4732                             u32 msr_index, u64 *pdata)
4733 {
4734         struct msr_data msr;
4735         int r;
4736
4737         msr.index = msr_index;
4738         msr.host_initiated = false;
4739         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4740         if (r)
4741                 return r;
4742
4743         *pdata = msr.data;
4744         return 0;
4745 }
4746
4747 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4748                             u32 msr_index, u64 data)
4749 {
4750         struct msr_data msr;
4751
4752         msr.data = data;
4753         msr.index = msr_index;
4754         msr.host_initiated = false;
4755         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4756 }
4757
4758 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4759 {
4760         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4761
4762         return vcpu->arch.smbase;
4763 }
4764
4765 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4766 {
4767         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4768
4769         vcpu->arch.smbase = smbase;
4770 }
4771
4772 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4773                               u32 pmc)
4774 {
4775         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4776 }
4777
4778 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4779                              u32 pmc, u64 *pdata)
4780 {
4781         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4782 }
4783
4784 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4785 {
4786         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4787 }
4788
4789 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4790 {
4791         preempt_disable();
4792         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4793         /*
4794          * CR0.TS may reference the host fpu state, not the guest fpu state,
4795          * so it may be clear at this point.
4796          */
4797         clts();
4798 }
4799
4800 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4801 {
4802         preempt_enable();
4803 }
4804
4805 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4806                               struct x86_instruction_info *info,
4807                               enum x86_intercept_stage stage)
4808 {
4809         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4810 }
4811
4812 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4813                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4814 {
4815         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4816 }
4817
4818 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4819 {
4820         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4821 }
4822
4823 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4824 {
4825         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4826 }
4827
4828 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4829 {
4830         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4831 }
4832
4833 static const struct x86_emulate_ops emulate_ops = {
4834         .read_gpr            = emulator_read_gpr,
4835         .write_gpr           = emulator_write_gpr,
4836         .read_std            = kvm_read_guest_virt_system,
4837         .write_std           = kvm_write_guest_virt_system,
4838         .fetch               = kvm_fetch_guest_virt,
4839         .read_emulated       = emulator_read_emulated,
4840         .write_emulated      = emulator_write_emulated,
4841         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4842         .invlpg              = emulator_invlpg,
4843         .pio_in_emulated     = emulator_pio_in_emulated,
4844         .pio_out_emulated    = emulator_pio_out_emulated,
4845         .get_segment         = emulator_get_segment,
4846         .set_segment         = emulator_set_segment,
4847         .get_cached_segment_base = emulator_get_cached_segment_base,
4848         .get_gdt             = emulator_get_gdt,
4849         .get_idt             = emulator_get_idt,
4850         .set_gdt             = emulator_set_gdt,
4851         .set_idt             = emulator_set_idt,
4852         .get_cr              = emulator_get_cr,
4853         .set_cr              = emulator_set_cr,
4854         .cpl                 = emulator_get_cpl,
4855         .get_dr              = emulator_get_dr,
4856         .set_dr              = emulator_set_dr,
4857         .get_smbase          = emulator_get_smbase,
4858         .set_smbase          = emulator_set_smbase,
4859         .set_msr             = emulator_set_msr,
4860         .get_msr             = emulator_get_msr,
4861         .check_pmc           = emulator_check_pmc,
4862         .read_pmc            = emulator_read_pmc,
4863         .halt                = emulator_halt,
4864         .wbinvd              = emulator_wbinvd,
4865         .fix_hypercall       = emulator_fix_hypercall,
4866         .get_fpu             = emulator_get_fpu,
4867         .put_fpu             = emulator_put_fpu,
4868         .intercept           = emulator_intercept,
4869         .get_cpuid           = emulator_get_cpuid,
4870         .set_nmi_mask        = emulator_set_nmi_mask,
4871 };
4872
4873 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4874 {
4875         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4876         /*
4877          * an sti; sti; sequence only disable interrupts for the first
4878          * instruction. So, if the last instruction, be it emulated or
4879          * not, left the system with the INT_STI flag enabled, it
4880          * means that the last instruction is an sti. We should not
4881          * leave the flag on in this case. The same goes for mov ss
4882          */
4883         if (int_shadow & mask)
4884                 mask = 0;
4885         if (unlikely(int_shadow || mask)) {
4886                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4887                 if (!mask)
4888                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4889         }
4890 }
4891
4892 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4893 {
4894         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4895         if (ctxt->exception.vector == PF_VECTOR)
4896                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4897
4898         if (ctxt->exception.error_code_valid)
4899                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4900                                       ctxt->exception.error_code);
4901         else
4902                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4903         return false;
4904 }
4905
4906 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4907 {
4908         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4909         int cs_db, cs_l;
4910
4911         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4912
4913         ctxt->eflags = kvm_get_rflags(vcpu);
4914         ctxt->eip = kvm_rip_read(vcpu);
4915         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4916                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4917                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4918                      cs_db                              ? X86EMUL_MODE_PROT32 :
4919                                                           X86EMUL_MODE_PROT16;
4920         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4921         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4922         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4923         ctxt->emul_flags = vcpu->arch.hflags;
4924
4925         init_decode_cache(ctxt);
4926         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4927 }
4928
4929 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4930 {
4931         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4932         int ret;
4933
4934         init_emulate_ctxt(vcpu);
4935
4936         ctxt->op_bytes = 2;
4937         ctxt->ad_bytes = 2;
4938         ctxt->_eip = ctxt->eip + inc_eip;
4939         ret = emulate_int_real(ctxt, irq);
4940
4941         if (ret != X86EMUL_CONTINUE)
4942                 return EMULATE_FAIL;
4943
4944         ctxt->eip = ctxt->_eip;
4945         kvm_rip_write(vcpu, ctxt->eip);
4946         kvm_set_rflags(vcpu, ctxt->eflags);
4947
4948         if (irq == NMI_VECTOR)
4949                 vcpu->arch.nmi_pending = 0;
4950         else
4951                 vcpu->arch.interrupt.pending = false;
4952
4953         return EMULATE_DONE;
4954 }
4955 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4956
4957 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4958 {
4959         int r = EMULATE_DONE;
4960
4961         ++vcpu->stat.insn_emulation_fail;
4962         trace_kvm_emulate_insn_failed(vcpu);
4963         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4964                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4965                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4966                 vcpu->run->internal.ndata = 0;
4967                 r = EMULATE_FAIL;
4968         }
4969         kvm_queue_exception(vcpu, UD_VECTOR);
4970
4971         return r;
4972 }
4973
4974 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4975                                   bool write_fault_to_shadow_pgtable,
4976                                   int emulation_type)
4977 {
4978         gpa_t gpa = cr2;
4979         pfn_t pfn;
4980
4981         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4982                 return false;
4983
4984         if (!vcpu->arch.mmu.direct_map) {
4985                 /*
4986                  * Write permission should be allowed since only
4987                  * write access need to be emulated.
4988                  */
4989                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4990
4991                 /*
4992                  * If the mapping is invalid in guest, let cpu retry
4993                  * it to generate fault.
4994                  */
4995                 if (gpa == UNMAPPED_GVA)
4996                         return true;
4997         }
4998
4999         /*
5000          * Do not retry the unhandleable instruction if it faults on the
5001          * readonly host memory, otherwise it will goto a infinite loop:
5002          * retry instruction -> write #PF -> emulation fail -> retry
5003          * instruction -> ...
5004          */
5005         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5006
5007         /*
5008          * If the instruction failed on the error pfn, it can not be fixed,
5009          * report the error to userspace.
5010          */
5011         if (is_error_noslot_pfn(pfn))
5012                 return false;
5013
5014         kvm_release_pfn_clean(pfn);
5015
5016         /* The instructions are well-emulated on direct mmu. */
5017         if (vcpu->arch.mmu.direct_map) {
5018                 unsigned int indirect_shadow_pages;
5019
5020                 spin_lock(&vcpu->kvm->mmu_lock);
5021                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5022                 spin_unlock(&vcpu->kvm->mmu_lock);
5023
5024                 if (indirect_shadow_pages)
5025                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5026
5027                 return true;
5028         }
5029
5030         /*
5031          * if emulation was due to access to shadowed page table
5032          * and it failed try to unshadow page and re-enter the
5033          * guest to let CPU execute the instruction.
5034          */
5035         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5036
5037         /*
5038          * If the access faults on its page table, it can not
5039          * be fixed by unprotecting shadow page and it should
5040          * be reported to userspace.
5041          */
5042         return !write_fault_to_shadow_pgtable;
5043 }
5044
5045 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5046                               unsigned long cr2,  int emulation_type)
5047 {
5048         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5049         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5050
5051         last_retry_eip = vcpu->arch.last_retry_eip;
5052         last_retry_addr = vcpu->arch.last_retry_addr;
5053
5054         /*
5055          * If the emulation is caused by #PF and it is non-page_table
5056          * writing instruction, it means the VM-EXIT is caused by shadow
5057          * page protected, we can zap the shadow page and retry this
5058          * instruction directly.
5059          *
5060          * Note: if the guest uses a non-page-table modifying instruction
5061          * on the PDE that points to the instruction, then we will unmap
5062          * the instruction and go to an infinite loop. So, we cache the
5063          * last retried eip and the last fault address, if we meet the eip
5064          * and the address again, we can break out of the potential infinite
5065          * loop.
5066          */
5067         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5068
5069         if (!(emulation_type & EMULTYPE_RETRY))
5070                 return false;
5071
5072         if (x86_page_table_writing_insn(ctxt))
5073                 return false;
5074
5075         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5076                 return false;
5077
5078         vcpu->arch.last_retry_eip = ctxt->eip;
5079         vcpu->arch.last_retry_addr = cr2;
5080
5081         if (!vcpu->arch.mmu.direct_map)
5082                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5083
5084         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5085
5086         return true;
5087 }
5088
5089 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5090 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5091
5092 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5093 {
5094         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5095                 /* This is a good place to trace that we are exiting SMM.  */
5096                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5097
5098                 if (unlikely(vcpu->arch.smi_pending)) {
5099                         kvm_make_request(KVM_REQ_SMI, vcpu);
5100                         vcpu->arch.smi_pending = 0;
5101                 } else {
5102                         /* Process a latched INIT, if any.  */
5103                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5104                 }
5105         }
5106
5107         kvm_mmu_reset_context(vcpu);
5108 }
5109
5110 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5111 {
5112         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5113
5114         vcpu->arch.hflags = emul_flags;
5115
5116         if (changed & HF_SMM_MASK)
5117                 kvm_smm_changed(vcpu);
5118 }
5119
5120 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5121                                 unsigned long *db)
5122 {
5123         u32 dr6 = 0;
5124         int i;
5125         u32 enable, rwlen;
5126
5127         enable = dr7;
5128         rwlen = dr7 >> 16;
5129         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5130                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5131                         dr6 |= (1 << i);
5132         return dr6;
5133 }
5134
5135 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5136 {
5137         struct kvm_run *kvm_run = vcpu->run;
5138
5139         /*
5140          * rflags is the old, "raw" value of the flags.  The new value has
5141          * not been saved yet.
5142          *
5143          * This is correct even for TF set by the guest, because "the
5144          * processor will not generate this exception after the instruction
5145          * that sets the TF flag".
5146          */
5147         if (unlikely(rflags & X86_EFLAGS_TF)) {
5148                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5149                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5150                                                   DR6_RTM;
5151                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5152                         kvm_run->debug.arch.exception = DB_VECTOR;
5153                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5154                         *r = EMULATE_USER_EXIT;
5155                 } else {
5156                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5157                         /*
5158                          * "Certain debug exceptions may clear bit 0-3.  The
5159                          * remaining contents of the DR6 register are never
5160                          * cleared by the processor".
5161                          */
5162                         vcpu->arch.dr6 &= ~15;
5163                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5164                         kvm_queue_exception(vcpu, DB_VECTOR);
5165                 }
5166         }
5167 }
5168
5169 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5170 {
5171         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5172             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5173                 struct kvm_run *kvm_run = vcpu->run;
5174                 unsigned long eip = kvm_get_linear_rip(vcpu);
5175                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5176                                            vcpu->arch.guest_debug_dr7,
5177                                            vcpu->arch.eff_db);
5178
5179                 if (dr6 != 0) {
5180                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5181                         kvm_run->debug.arch.pc = eip;
5182                         kvm_run->debug.arch.exception = DB_VECTOR;
5183                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5184                         *r = EMULATE_USER_EXIT;
5185                         return true;
5186                 }
5187         }
5188
5189         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5190             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5191                 unsigned long eip = kvm_get_linear_rip(vcpu);
5192                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5193                                            vcpu->arch.dr7,
5194                                            vcpu->arch.db);
5195
5196                 if (dr6 != 0) {
5197                         vcpu->arch.dr6 &= ~15;
5198                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5199                         kvm_queue_exception(vcpu, DB_VECTOR);
5200                         *r = EMULATE_DONE;
5201                         return true;
5202                 }
5203         }
5204
5205         return false;
5206 }
5207
5208 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5209                             unsigned long cr2,
5210                             int emulation_type,
5211                             void *insn,
5212                             int insn_len)
5213 {
5214         int r;
5215         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5216         bool writeback = true;
5217         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5218
5219         /*
5220          * Clear write_fault_to_shadow_pgtable here to ensure it is
5221          * never reused.
5222          */
5223         vcpu->arch.write_fault_to_shadow_pgtable = false;
5224         kvm_clear_exception_queue(vcpu);
5225
5226         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5227                 init_emulate_ctxt(vcpu);
5228
5229                 /*
5230                  * We will reenter on the same instruction since
5231                  * we do not set complete_userspace_io.  This does not
5232                  * handle watchpoints yet, those would be handled in
5233                  * the emulate_ops.
5234                  */
5235                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5236                         return r;
5237
5238                 ctxt->interruptibility = 0;
5239                 ctxt->have_exception = false;
5240                 ctxt->exception.vector = -1;
5241                 ctxt->perm_ok = false;
5242
5243                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5244
5245                 r = x86_decode_insn(ctxt, insn, insn_len);
5246
5247                 trace_kvm_emulate_insn_start(vcpu);
5248                 ++vcpu->stat.insn_emulation;
5249                 if (r != EMULATION_OK)  {
5250                         if (emulation_type & EMULTYPE_TRAP_UD)
5251                                 return EMULATE_FAIL;
5252                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5253                                                 emulation_type))
5254                                 return EMULATE_DONE;
5255                         if (emulation_type & EMULTYPE_SKIP)
5256                                 return EMULATE_FAIL;
5257                         return handle_emulation_failure(vcpu);
5258                 }
5259         }
5260
5261         if (emulation_type & EMULTYPE_SKIP) {
5262                 kvm_rip_write(vcpu, ctxt->_eip);
5263                 if (ctxt->eflags & X86_EFLAGS_RF)
5264                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5265                 return EMULATE_DONE;
5266         }
5267
5268         if (retry_instruction(ctxt, cr2, emulation_type))
5269                 return EMULATE_DONE;
5270
5271         /* this is needed for vmware backdoor interface to work since it
5272            changes registers values  during IO operation */
5273         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5274                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5275                 emulator_invalidate_register_cache(ctxt);
5276         }
5277
5278 restart:
5279         r = x86_emulate_insn(ctxt);
5280
5281         if (r == EMULATION_INTERCEPTED)
5282                 return EMULATE_DONE;
5283
5284         if (r == EMULATION_FAILED) {
5285                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5286                                         emulation_type))
5287                         return EMULATE_DONE;
5288
5289                 return handle_emulation_failure(vcpu);
5290         }
5291
5292         if (ctxt->have_exception) {
5293                 r = EMULATE_DONE;
5294                 if (inject_emulated_exception(vcpu))
5295                         return r;
5296         } else if (vcpu->arch.pio.count) {
5297                 if (!vcpu->arch.pio.in) {
5298                         /* FIXME: return into emulator if single-stepping.  */
5299                         vcpu->arch.pio.count = 0;
5300                 } else {
5301                         writeback = false;
5302                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5303                 }
5304                 r = EMULATE_USER_EXIT;
5305         } else if (vcpu->mmio_needed) {
5306                 if (!vcpu->mmio_is_write)
5307                         writeback = false;
5308                 r = EMULATE_USER_EXIT;
5309                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5310         } else if (r == EMULATION_RESTART)
5311                 goto restart;
5312         else
5313                 r = EMULATE_DONE;
5314
5315         if (writeback) {
5316                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5317                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5318                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5319                 if (vcpu->arch.hflags != ctxt->emul_flags)
5320                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5321                 kvm_rip_write(vcpu, ctxt->eip);
5322                 if (r == EMULATE_DONE)
5323                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5324                 if (!ctxt->have_exception ||
5325                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5326                         __kvm_set_rflags(vcpu, ctxt->eflags);
5327
5328                 /*
5329                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5330                  * do nothing, and it will be requested again as soon as
5331                  * the shadow expires.  But we still need to check here,
5332                  * because POPF has no interrupt shadow.
5333                  */
5334                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5335                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5336         } else
5337                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5338
5339         return r;
5340 }
5341 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5342
5343 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5344 {
5345         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5346         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5347                                             size, port, &val, 1);
5348         /* do not return to emulator after return from userspace */
5349         vcpu->arch.pio.count = 0;
5350         return ret;
5351 }
5352 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5353
5354 static void tsc_bad(void *info)
5355 {
5356         __this_cpu_write(cpu_tsc_khz, 0);
5357 }
5358
5359 static void tsc_khz_changed(void *data)
5360 {
5361         struct cpufreq_freqs *freq = data;
5362         unsigned long khz = 0;
5363
5364         if (data)
5365                 khz = freq->new;
5366         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5367                 khz = cpufreq_quick_get(raw_smp_processor_id());
5368         if (!khz)
5369                 khz = tsc_khz;
5370         __this_cpu_write(cpu_tsc_khz, khz);
5371 }
5372
5373 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5374                                      void *data)
5375 {
5376         struct cpufreq_freqs *freq = data;
5377         struct kvm *kvm;
5378         struct kvm_vcpu *vcpu;
5379         int i, send_ipi = 0;
5380
5381         /*
5382          * We allow guests to temporarily run on slowing clocks,
5383          * provided we notify them after, or to run on accelerating
5384          * clocks, provided we notify them before.  Thus time never
5385          * goes backwards.
5386          *
5387          * However, we have a problem.  We can't atomically update
5388          * the frequency of a given CPU from this function; it is
5389          * merely a notifier, which can be called from any CPU.
5390          * Changing the TSC frequency at arbitrary points in time
5391          * requires a recomputation of local variables related to
5392          * the TSC for each VCPU.  We must flag these local variables
5393          * to be updated and be sure the update takes place with the
5394          * new frequency before any guests proceed.
5395          *
5396          * Unfortunately, the combination of hotplug CPU and frequency
5397          * change creates an intractable locking scenario; the order
5398          * of when these callouts happen is undefined with respect to
5399          * CPU hotplug, and they can race with each other.  As such,
5400          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5401          * undefined; you can actually have a CPU frequency change take
5402          * place in between the computation of X and the setting of the
5403          * variable.  To protect against this problem, all updates of
5404          * the per_cpu tsc_khz variable are done in an interrupt
5405          * protected IPI, and all callers wishing to update the value
5406          * must wait for a synchronous IPI to complete (which is trivial
5407          * if the caller is on the CPU already).  This establishes the
5408          * necessary total order on variable updates.
5409          *
5410          * Note that because a guest time update may take place
5411          * anytime after the setting of the VCPU's request bit, the
5412          * correct TSC value must be set before the request.  However,
5413          * to ensure the update actually makes it to any guest which
5414          * starts running in hardware virtualization between the set
5415          * and the acquisition of the spinlock, we must also ping the
5416          * CPU after setting the request bit.
5417          *
5418          */
5419
5420         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5421                 return 0;
5422         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5423                 return 0;
5424
5425         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5426
5427         spin_lock(&kvm_lock);
5428         list_for_each_entry(kvm, &vm_list, vm_list) {
5429                 kvm_for_each_vcpu(i, vcpu, kvm) {
5430                         if (vcpu->cpu != freq->cpu)
5431                                 continue;
5432                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5433                         if (vcpu->cpu != smp_processor_id())
5434                                 send_ipi = 1;
5435                 }
5436         }
5437         spin_unlock(&kvm_lock);
5438
5439         if (freq->old < freq->new && send_ipi) {
5440                 /*
5441                  * We upscale the frequency.  Must make the guest
5442                  * doesn't see old kvmclock values while running with
5443                  * the new frequency, otherwise we risk the guest sees
5444                  * time go backwards.
5445                  *
5446                  * In case we update the frequency for another cpu
5447                  * (which might be in guest context) send an interrupt
5448                  * to kick the cpu out of guest context.  Next time
5449                  * guest context is entered kvmclock will be updated,
5450                  * so the guest will not see stale values.
5451                  */
5452                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5453         }
5454         return 0;
5455 }
5456
5457 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5458         .notifier_call  = kvmclock_cpufreq_notifier
5459 };
5460
5461 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5462                                         unsigned long action, void *hcpu)
5463 {
5464         unsigned int cpu = (unsigned long)hcpu;
5465
5466         switch (action) {
5467                 case CPU_ONLINE:
5468                 case CPU_DOWN_FAILED:
5469                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5470                         break;
5471                 case CPU_DOWN_PREPARE:
5472                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5473                         break;
5474         }
5475         return NOTIFY_OK;
5476 }
5477
5478 static struct notifier_block kvmclock_cpu_notifier_block = {
5479         .notifier_call  = kvmclock_cpu_notifier,
5480         .priority = -INT_MAX
5481 };
5482
5483 static void kvm_timer_init(void)
5484 {
5485         int cpu;
5486
5487         max_tsc_khz = tsc_khz;
5488
5489         cpu_notifier_register_begin();
5490         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5491 #ifdef CONFIG_CPU_FREQ
5492                 struct cpufreq_policy policy;
5493                 memset(&policy, 0, sizeof(policy));
5494                 cpu = get_cpu();
5495                 cpufreq_get_policy(&policy, cpu);
5496                 if (policy.cpuinfo.max_freq)
5497                         max_tsc_khz = policy.cpuinfo.max_freq;
5498                 put_cpu();
5499 #endif
5500                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5501                                           CPUFREQ_TRANSITION_NOTIFIER);
5502         }
5503         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5504         for_each_online_cpu(cpu)
5505                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5506
5507         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5508         cpu_notifier_register_done();
5509
5510 }
5511
5512 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5513
5514 int kvm_is_in_guest(void)
5515 {
5516         return __this_cpu_read(current_vcpu) != NULL;
5517 }
5518
5519 static int kvm_is_user_mode(void)
5520 {
5521         int user_mode = 3;
5522
5523         if (__this_cpu_read(current_vcpu))
5524                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5525
5526         return user_mode != 0;
5527 }
5528
5529 static unsigned long kvm_get_guest_ip(void)
5530 {
5531         unsigned long ip = 0;
5532
5533         if (__this_cpu_read(current_vcpu))
5534                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5535
5536         return ip;
5537 }
5538
5539 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5540         .is_in_guest            = kvm_is_in_guest,
5541         .is_user_mode           = kvm_is_user_mode,
5542         .get_guest_ip           = kvm_get_guest_ip,
5543 };
5544
5545 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5546 {
5547         __this_cpu_write(current_vcpu, vcpu);
5548 }
5549 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5550
5551 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5552 {
5553         __this_cpu_write(current_vcpu, NULL);
5554 }
5555 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5556
5557 static void kvm_set_mmio_spte_mask(void)
5558 {
5559         u64 mask;
5560         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5561
5562         /*
5563          * Set the reserved bits and the present bit of an paging-structure
5564          * entry to generate page fault with PFER.RSV = 1.
5565          */
5566          /* Mask the reserved physical address bits. */
5567         mask = rsvd_bits(maxphyaddr, 51);
5568
5569         /* Bit 62 is always reserved for 32bit host. */
5570         mask |= 0x3ull << 62;
5571
5572         /* Set the present bit. */
5573         mask |= 1ull;
5574
5575 #ifdef CONFIG_X86_64
5576         /*
5577          * If reserved bit is not supported, clear the present bit to disable
5578          * mmio page fault.
5579          */
5580         if (maxphyaddr == 52)
5581                 mask &= ~1ull;
5582 #endif
5583
5584         kvm_mmu_set_mmio_spte_mask(mask);
5585 }
5586
5587 #ifdef CONFIG_X86_64
5588 static void pvclock_gtod_update_fn(struct work_struct *work)
5589 {
5590         struct kvm *kvm;
5591
5592         struct kvm_vcpu *vcpu;
5593         int i;
5594
5595         spin_lock(&kvm_lock);
5596         list_for_each_entry(kvm, &vm_list, vm_list)
5597                 kvm_for_each_vcpu(i, vcpu, kvm)
5598                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5599         atomic_set(&kvm_guest_has_master_clock, 0);
5600         spin_unlock(&kvm_lock);
5601 }
5602
5603 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5604
5605 /*
5606  * Notification about pvclock gtod data update.
5607  */
5608 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5609                                void *priv)
5610 {
5611         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5612         struct timekeeper *tk = priv;
5613
5614         update_pvclock_gtod(tk);
5615
5616         /* disable master clock if host does not trust, or does not
5617          * use, TSC clocksource
5618          */
5619         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5620             atomic_read(&kvm_guest_has_master_clock) != 0)
5621                 queue_work(system_long_wq, &pvclock_gtod_work);
5622
5623         return 0;
5624 }
5625
5626 static struct notifier_block pvclock_gtod_notifier = {
5627         .notifier_call = pvclock_gtod_notify,
5628 };
5629 #endif
5630
5631 int kvm_arch_init(void *opaque)
5632 {
5633         int r;
5634         struct kvm_x86_ops *ops = opaque;
5635
5636         if (kvm_x86_ops) {
5637                 printk(KERN_ERR "kvm: already loaded the other module\n");
5638                 r = -EEXIST;
5639                 goto out;
5640         }
5641
5642         if (!ops->cpu_has_kvm_support()) {
5643                 printk(KERN_ERR "kvm: no hardware support\n");
5644                 r = -EOPNOTSUPP;
5645                 goto out;
5646         }
5647         if (ops->disabled_by_bios()) {
5648                 printk(KERN_ERR "kvm: disabled by bios\n");
5649                 r = -EOPNOTSUPP;
5650                 goto out;
5651         }
5652
5653         r = -ENOMEM;
5654         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5655         if (!shared_msrs) {
5656                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5657                 goto out;
5658         }
5659
5660         r = kvm_mmu_module_init();
5661         if (r)
5662                 goto out_free_percpu;
5663
5664         kvm_set_mmio_spte_mask();
5665
5666         kvm_x86_ops = ops;
5667
5668         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5669                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5670
5671         kvm_timer_init();
5672
5673         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5674
5675         if (cpu_has_xsave)
5676                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5677
5678         kvm_lapic_init();
5679 #ifdef CONFIG_X86_64
5680         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5681 #endif
5682
5683         return 0;
5684
5685 out_free_percpu:
5686         free_percpu(shared_msrs);
5687 out:
5688         return r;
5689 }
5690
5691 void kvm_arch_exit(void)
5692 {
5693         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5694
5695         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5696                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5697                                             CPUFREQ_TRANSITION_NOTIFIER);
5698         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5699 #ifdef CONFIG_X86_64
5700         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5701 #endif
5702         kvm_x86_ops = NULL;
5703         kvm_mmu_module_exit();
5704         free_percpu(shared_msrs);
5705 }
5706
5707 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5708 {
5709         ++vcpu->stat.halt_exits;
5710         if (lapic_in_kernel(vcpu)) {
5711                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5712                 return 1;
5713         } else {
5714                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5715                 return 0;
5716         }
5717 }
5718 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5719
5720 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5721 {
5722         kvm_x86_ops->skip_emulated_instruction(vcpu);
5723         return kvm_vcpu_halt(vcpu);
5724 }
5725 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5726
5727 /*
5728  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5729  *
5730  * @apicid - apicid of vcpu to be kicked.
5731  */
5732 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5733 {
5734         struct kvm_lapic_irq lapic_irq;
5735
5736         lapic_irq.shorthand = 0;
5737         lapic_irq.dest_mode = 0;
5738         lapic_irq.dest_id = apicid;
5739         lapic_irq.msi_redir_hint = false;
5740
5741         lapic_irq.delivery_mode = APIC_DM_REMRD;
5742         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5743 }
5744
5745 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5746 {
5747         unsigned long nr, a0, a1, a2, a3, ret;
5748         int op_64_bit, r = 1;
5749
5750         kvm_x86_ops->skip_emulated_instruction(vcpu);
5751
5752         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5753                 return kvm_hv_hypercall(vcpu);
5754
5755         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5756         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5757         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5758         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5759         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5760
5761         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5762
5763         op_64_bit = is_64_bit_mode(vcpu);
5764         if (!op_64_bit) {
5765                 nr &= 0xFFFFFFFF;
5766                 a0 &= 0xFFFFFFFF;
5767                 a1 &= 0xFFFFFFFF;
5768                 a2 &= 0xFFFFFFFF;
5769                 a3 &= 0xFFFFFFFF;
5770         }
5771
5772         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5773                 ret = -KVM_EPERM;
5774                 goto out;
5775         }
5776
5777         switch (nr) {
5778         case KVM_HC_VAPIC_POLL_IRQ:
5779                 ret = 0;
5780                 break;
5781         case KVM_HC_KICK_CPU:
5782                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5783                 ret = 0;
5784                 break;
5785         default:
5786                 ret = -KVM_ENOSYS;
5787                 break;
5788         }
5789 out:
5790         if (!op_64_bit)
5791                 ret = (u32)ret;
5792         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5793         ++vcpu->stat.hypercalls;
5794         return r;
5795 }
5796 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5797
5798 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5799 {
5800         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5801         char instruction[3];
5802         unsigned long rip = kvm_rip_read(vcpu);
5803
5804         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5805
5806         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5807 }
5808
5809 /*
5810  * Check if userspace requested an interrupt window, and that the
5811  * interrupt window is open.
5812  *
5813  * No need to exit to userspace if we already have an interrupt queued.
5814  */
5815 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5816 {
5817         if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5818                 return false;
5819
5820         if (kvm_cpu_has_interrupt(vcpu))
5821                 return false;
5822
5823         return (irqchip_split(vcpu->kvm)
5824                 ? kvm_apic_accept_pic_intr(vcpu)
5825                 : kvm_arch_interrupt_allowed(vcpu));
5826 }
5827
5828 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5829 {
5830         struct kvm_run *kvm_run = vcpu->run;
5831
5832         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5833         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5834         kvm_run->cr8 = kvm_get_cr8(vcpu);
5835         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5836         if (!irqchip_in_kernel(vcpu->kvm))
5837                 kvm_run->ready_for_interrupt_injection =
5838                         kvm_arch_interrupt_allowed(vcpu) &&
5839                         !kvm_cpu_has_interrupt(vcpu) &&
5840                         !kvm_event_needs_reinjection(vcpu);
5841         else if (!pic_in_kernel(vcpu->kvm))
5842                 kvm_run->ready_for_interrupt_injection =
5843                         kvm_apic_accept_pic_intr(vcpu) &&
5844                         !kvm_cpu_has_interrupt(vcpu);
5845         else
5846                 kvm_run->ready_for_interrupt_injection = 1;
5847 }
5848
5849 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5850 {
5851         int max_irr, tpr;
5852
5853         if (!kvm_x86_ops->update_cr8_intercept)
5854                 return;
5855
5856         if (!vcpu->arch.apic)
5857                 return;
5858
5859         if (!vcpu->arch.apic->vapic_addr)
5860                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5861         else
5862                 max_irr = -1;
5863
5864         if (max_irr != -1)
5865                 max_irr >>= 4;
5866
5867         tpr = kvm_lapic_get_cr8(vcpu);
5868
5869         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5870 }
5871
5872 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5873 {
5874         int r;
5875
5876         /* try to reinject previous events if any */
5877         if (vcpu->arch.exception.pending) {
5878                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5879                                         vcpu->arch.exception.has_error_code,
5880                                         vcpu->arch.exception.error_code);
5881
5882                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5883                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5884                                              X86_EFLAGS_RF);
5885
5886                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5887                     (vcpu->arch.dr7 & DR7_GD)) {
5888                         vcpu->arch.dr7 &= ~DR7_GD;
5889                         kvm_update_dr7(vcpu);
5890                 }
5891
5892                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5893                                           vcpu->arch.exception.has_error_code,
5894                                           vcpu->arch.exception.error_code,
5895                                           vcpu->arch.exception.reinject);
5896                 return 0;
5897         }
5898
5899         if (vcpu->arch.nmi_injected) {
5900                 kvm_x86_ops->set_nmi(vcpu);
5901                 return 0;
5902         }
5903
5904         if (vcpu->arch.interrupt.pending) {
5905                 kvm_x86_ops->set_irq(vcpu);
5906                 return 0;
5907         }
5908
5909         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5910                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5911                 if (r != 0)
5912                         return r;
5913         }
5914
5915         /* try to inject new event if pending */
5916         if (vcpu->arch.nmi_pending) {
5917                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5918                         --vcpu->arch.nmi_pending;
5919                         vcpu->arch.nmi_injected = true;
5920                         kvm_x86_ops->set_nmi(vcpu);
5921                 }
5922         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5923                 /*
5924                  * Because interrupts can be injected asynchronously, we are
5925                  * calling check_nested_events again here to avoid a race condition.
5926                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5927                  * proposal and current concerns.  Perhaps we should be setting
5928                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5929                  */
5930                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5931                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5932                         if (r != 0)
5933                                 return r;
5934                 }
5935                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5936                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5937                                             false);
5938                         kvm_x86_ops->set_irq(vcpu);
5939                 }
5940         }
5941         return 0;
5942 }
5943
5944 static void process_nmi(struct kvm_vcpu *vcpu)
5945 {
5946         unsigned limit = 2;
5947
5948         /*
5949          * x86 is limited to one NMI running, and one NMI pending after it.
5950          * If an NMI is already in progress, limit further NMIs to just one.
5951          * Otherwise, allow two (and we'll inject the first one immediately).
5952          */
5953         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5954                 limit = 1;
5955
5956         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5957         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5958         kvm_make_request(KVM_REQ_EVENT, vcpu);
5959 }
5960
5961 #define put_smstate(type, buf, offset, val)                       \
5962         *(type *)((buf) + (offset) - 0x7e00) = val
5963
5964 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5965 {
5966         u32 flags = 0;
5967         flags |= seg->g       << 23;
5968         flags |= seg->db      << 22;
5969         flags |= seg->l       << 21;
5970         flags |= seg->avl     << 20;
5971         flags |= seg->present << 15;
5972         flags |= seg->dpl     << 13;
5973         flags |= seg->s       << 12;
5974         flags |= seg->type    << 8;
5975         return flags;
5976 }
5977
5978 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5979 {
5980         struct kvm_segment seg;
5981         int offset;
5982
5983         kvm_get_segment(vcpu, &seg, n);
5984         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5985
5986         if (n < 3)
5987                 offset = 0x7f84 + n * 12;
5988         else
5989                 offset = 0x7f2c + (n - 3) * 12;
5990
5991         put_smstate(u32, buf, offset + 8, seg.base);
5992         put_smstate(u32, buf, offset + 4, seg.limit);
5993         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5994 }
5995
5996 #ifdef CONFIG_X86_64
5997 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5998 {
5999         struct kvm_segment seg;
6000         int offset;
6001         u16 flags;
6002
6003         kvm_get_segment(vcpu, &seg, n);
6004         offset = 0x7e00 + n * 16;
6005
6006         flags = process_smi_get_segment_flags(&seg) >> 8;
6007         put_smstate(u16, buf, offset, seg.selector);
6008         put_smstate(u16, buf, offset + 2, flags);
6009         put_smstate(u32, buf, offset + 4, seg.limit);
6010         put_smstate(u64, buf, offset + 8, seg.base);
6011 }
6012 #endif
6013
6014 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6015 {
6016         struct desc_ptr dt;
6017         struct kvm_segment seg;
6018         unsigned long val;
6019         int i;
6020
6021         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6022         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6023         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6024         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6025
6026         for (i = 0; i < 8; i++)
6027                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6028
6029         kvm_get_dr(vcpu, 6, &val);
6030         put_smstate(u32, buf, 0x7fcc, (u32)val);
6031         kvm_get_dr(vcpu, 7, &val);
6032         put_smstate(u32, buf, 0x7fc8, (u32)val);
6033
6034         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6035         put_smstate(u32, buf, 0x7fc4, seg.selector);
6036         put_smstate(u32, buf, 0x7f64, seg.base);
6037         put_smstate(u32, buf, 0x7f60, seg.limit);
6038         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6039
6040         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6041         put_smstate(u32, buf, 0x7fc0, seg.selector);
6042         put_smstate(u32, buf, 0x7f80, seg.base);
6043         put_smstate(u32, buf, 0x7f7c, seg.limit);
6044         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6045
6046         kvm_x86_ops->get_gdt(vcpu, &dt);
6047         put_smstate(u32, buf, 0x7f74, dt.address);
6048         put_smstate(u32, buf, 0x7f70, dt.size);
6049
6050         kvm_x86_ops->get_idt(vcpu, &dt);
6051         put_smstate(u32, buf, 0x7f58, dt.address);
6052         put_smstate(u32, buf, 0x7f54, dt.size);
6053
6054         for (i = 0; i < 6; i++)
6055                 process_smi_save_seg_32(vcpu, buf, i);
6056
6057         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6058
6059         /* revision id */
6060         put_smstate(u32, buf, 0x7efc, 0x00020000);
6061         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6062 }
6063
6064 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6065 {
6066 #ifdef CONFIG_X86_64
6067         struct desc_ptr dt;
6068         struct kvm_segment seg;
6069         unsigned long val;
6070         int i;
6071
6072         for (i = 0; i < 16; i++)
6073                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6074
6075         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6076         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6077
6078         kvm_get_dr(vcpu, 6, &val);
6079         put_smstate(u64, buf, 0x7f68, val);
6080         kvm_get_dr(vcpu, 7, &val);
6081         put_smstate(u64, buf, 0x7f60, val);
6082
6083         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6084         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6085         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6086
6087         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6088
6089         /* revision id */
6090         put_smstate(u32, buf, 0x7efc, 0x00020064);
6091
6092         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6093
6094         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6095         put_smstate(u16, buf, 0x7e90, seg.selector);
6096         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6097         put_smstate(u32, buf, 0x7e94, seg.limit);
6098         put_smstate(u64, buf, 0x7e98, seg.base);
6099
6100         kvm_x86_ops->get_idt(vcpu, &dt);
6101         put_smstate(u32, buf, 0x7e84, dt.size);
6102         put_smstate(u64, buf, 0x7e88, dt.address);
6103
6104         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6105         put_smstate(u16, buf, 0x7e70, seg.selector);
6106         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6107         put_smstate(u32, buf, 0x7e74, seg.limit);
6108         put_smstate(u64, buf, 0x7e78, seg.base);
6109
6110         kvm_x86_ops->get_gdt(vcpu, &dt);
6111         put_smstate(u32, buf, 0x7e64, dt.size);
6112         put_smstate(u64, buf, 0x7e68, dt.address);
6113
6114         for (i = 0; i < 6; i++)
6115                 process_smi_save_seg_64(vcpu, buf, i);
6116 #else
6117         WARN_ON_ONCE(1);
6118 #endif
6119 }
6120
6121 static void process_smi(struct kvm_vcpu *vcpu)
6122 {
6123         struct kvm_segment cs, ds;
6124         struct desc_ptr dt;
6125         char buf[512];
6126         u32 cr0;
6127
6128         if (is_smm(vcpu)) {
6129                 vcpu->arch.smi_pending = true;
6130                 return;
6131         }
6132
6133         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6134         vcpu->arch.hflags |= HF_SMM_MASK;
6135         memset(buf, 0, 512);
6136         if (guest_cpuid_has_longmode(vcpu))
6137                 process_smi_save_state_64(vcpu, buf);
6138         else
6139                 process_smi_save_state_32(vcpu, buf);
6140
6141         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6142
6143         if (kvm_x86_ops->get_nmi_mask(vcpu))
6144                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6145         else
6146                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6147
6148         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6149         kvm_rip_write(vcpu, 0x8000);
6150
6151         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6152         kvm_x86_ops->set_cr0(vcpu, cr0);
6153         vcpu->arch.cr0 = cr0;
6154
6155         kvm_x86_ops->set_cr4(vcpu, 0);
6156
6157         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6158         dt.address = dt.size = 0;
6159         kvm_x86_ops->set_idt(vcpu, &dt);
6160
6161         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6162
6163         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6164         cs.base = vcpu->arch.smbase;
6165
6166         ds.selector = 0;
6167         ds.base = 0;
6168
6169         cs.limit    = ds.limit = 0xffffffff;
6170         cs.type     = ds.type = 0x3;
6171         cs.dpl      = ds.dpl = 0;
6172         cs.db       = ds.db = 0;
6173         cs.s        = ds.s = 1;
6174         cs.l        = ds.l = 0;
6175         cs.g        = ds.g = 1;
6176         cs.avl      = ds.avl = 0;
6177         cs.present  = ds.present = 1;
6178         cs.unusable = ds.unusable = 0;
6179         cs.padding  = ds.padding = 0;
6180
6181         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6182         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6183         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6184         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6185         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6186         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6187
6188         if (guest_cpuid_has_longmode(vcpu))
6189                 kvm_x86_ops->set_efer(vcpu, 0);
6190
6191         kvm_update_cpuid(vcpu);
6192         kvm_mmu_reset_context(vcpu);
6193 }
6194
6195 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6196 {
6197         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6198                 return;
6199
6200         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6201
6202         if (irqchip_split(vcpu->kvm))
6203                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6204         else
6205                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6206         kvm_x86_ops->load_eoi_exitmap(vcpu);
6207 }
6208
6209 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6210 {
6211         ++vcpu->stat.tlb_flush;
6212         kvm_x86_ops->tlb_flush(vcpu);
6213 }
6214
6215 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6216 {
6217         struct page *page = NULL;
6218
6219         if (!lapic_in_kernel(vcpu))
6220                 return;
6221
6222         if (!kvm_x86_ops->set_apic_access_page_addr)
6223                 return;
6224
6225         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6226         if (is_error_page(page))
6227                 return;
6228         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6229
6230         /*
6231          * Do not pin apic access page in memory, the MMU notifier
6232          * will call us again if it is migrated or swapped out.
6233          */
6234         put_page(page);
6235 }
6236 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6237
6238 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6239                                            unsigned long address)
6240 {
6241         /*
6242          * The physical address of apic access page is stored in the VMCS.
6243          * Update it when it becomes invalid.
6244          */
6245         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6246                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6247 }
6248
6249 /*
6250  * Returns 1 to let vcpu_run() continue the guest execution loop without
6251  * exiting to the userspace.  Otherwise, the value will be returned to the
6252  * userspace.
6253  */
6254 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6255 {
6256         int r;
6257         bool req_int_win = !lapic_in_kernel(vcpu) &&
6258                 vcpu->run->request_interrupt_window;
6259         bool req_immediate_exit = false;
6260
6261         if (vcpu->requests) {
6262                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6263                         kvm_mmu_unload(vcpu);
6264                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6265                         __kvm_migrate_timers(vcpu);
6266                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6267                         kvm_gen_update_masterclock(vcpu->kvm);
6268                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6269                         kvm_gen_kvmclock_update(vcpu);
6270                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6271                         r = kvm_guest_time_update(vcpu);
6272                         if (unlikely(r))
6273                                 goto out;
6274                 }
6275                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6276                         kvm_mmu_sync_roots(vcpu);
6277                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6278                         kvm_vcpu_flush_tlb(vcpu);
6279                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6280                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6281                         r = 0;
6282                         goto out;
6283                 }
6284                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6285                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6286                         r = 0;
6287                         goto out;
6288                 }
6289                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6290                         vcpu->fpu_active = 0;
6291                         kvm_x86_ops->fpu_deactivate(vcpu);
6292                 }
6293                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6294                         /* Page is swapped out. Do synthetic halt */
6295                         vcpu->arch.apf.halted = true;
6296                         r = 1;
6297                         goto out;
6298                 }
6299                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6300                         record_steal_time(vcpu);
6301                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6302                         process_smi(vcpu);
6303                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6304                         process_nmi(vcpu);
6305                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6306                         kvm_pmu_handle_event(vcpu);
6307                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6308                         kvm_pmu_deliver_pmi(vcpu);
6309                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6310                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6311                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6312                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6313                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6314                                 vcpu->run->eoi.vector =
6315                                                 vcpu->arch.pending_ioapic_eoi;
6316                                 r = 0;
6317                                 goto out;
6318                         }
6319                 }
6320                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6321                         vcpu_scan_ioapic(vcpu);
6322                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6323                         kvm_vcpu_reload_apic_access_page(vcpu);
6324                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6325                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6326                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6327                         r = 0;
6328                         goto out;
6329                 }
6330                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6331                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6332                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6333                         r = 0;
6334                         goto out;
6335                 }
6336         }
6337
6338         /*
6339          * KVM_REQ_EVENT is not set when posted interrupts are set by
6340          * VT-d hardware, so we have to update RVI unconditionally.
6341          */
6342         if (kvm_lapic_enabled(vcpu)) {
6343                 /*
6344                  * Update architecture specific hints for APIC
6345                  * virtual interrupt delivery.
6346                  */
6347                 if (kvm_x86_ops->hwapic_irr_update)
6348                         kvm_x86_ops->hwapic_irr_update(vcpu,
6349                                 kvm_lapic_find_highest_irr(vcpu));
6350         }
6351
6352         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6353                 kvm_apic_accept_events(vcpu);
6354                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6355                         r = 1;
6356                         goto out;
6357                 }
6358
6359                 if (inject_pending_event(vcpu, req_int_win) != 0)
6360                         req_immediate_exit = true;
6361                 /* enable NMI/IRQ window open exits if needed */
6362                 else if (vcpu->arch.nmi_pending)
6363                         kvm_x86_ops->enable_nmi_window(vcpu);
6364                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6365                         kvm_x86_ops->enable_irq_window(vcpu);
6366
6367                 if (kvm_lapic_enabled(vcpu)) {
6368                         update_cr8_intercept(vcpu);
6369                         kvm_lapic_sync_to_vapic(vcpu);
6370                 }
6371         }
6372
6373         r = kvm_mmu_reload(vcpu);
6374         if (unlikely(r)) {
6375                 goto cancel_injection;
6376         }
6377
6378         preempt_disable();
6379
6380         kvm_x86_ops->prepare_guest_switch(vcpu);
6381         if (vcpu->fpu_active)
6382                 kvm_load_guest_fpu(vcpu);
6383         kvm_load_guest_xcr0(vcpu);
6384
6385         vcpu->mode = IN_GUEST_MODE;
6386
6387         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6388
6389         /* We should set ->mode before check ->requests,
6390          * see the comment in make_all_cpus_request.
6391          */
6392         smp_mb__after_srcu_read_unlock();
6393
6394         local_irq_disable();
6395
6396         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6397             || need_resched() || signal_pending(current)) {
6398                 vcpu->mode = OUTSIDE_GUEST_MODE;
6399                 smp_wmb();
6400                 local_irq_enable();
6401                 preempt_enable();
6402                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6403                 r = 1;
6404                 goto cancel_injection;
6405         }
6406
6407         if (req_immediate_exit)
6408                 smp_send_reschedule(vcpu->cpu);
6409
6410         __kvm_guest_enter();
6411
6412         if (unlikely(vcpu->arch.switch_db_regs)) {
6413                 set_debugreg(0, 7);
6414                 set_debugreg(vcpu->arch.eff_db[0], 0);
6415                 set_debugreg(vcpu->arch.eff_db[1], 1);
6416                 set_debugreg(vcpu->arch.eff_db[2], 2);
6417                 set_debugreg(vcpu->arch.eff_db[3], 3);
6418                 set_debugreg(vcpu->arch.dr6, 6);
6419                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6420         }
6421
6422         trace_kvm_entry(vcpu->vcpu_id);
6423         wait_lapic_expire(vcpu);
6424         kvm_x86_ops->run(vcpu);
6425
6426         /*
6427          * Do this here before restoring debug registers on the host.  And
6428          * since we do this before handling the vmexit, a DR access vmexit
6429          * can (a) read the correct value of the debug registers, (b) set
6430          * KVM_DEBUGREG_WONT_EXIT again.
6431          */
6432         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6433                 int i;
6434
6435                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6436                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6437                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6438                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6439         }
6440
6441         /*
6442          * If the guest has used debug registers, at least dr7
6443          * will be disabled while returning to the host.
6444          * If we don't have active breakpoints in the host, we don't
6445          * care about the messed up debug address registers. But if
6446          * we have some of them active, restore the old state.
6447          */
6448         if (hw_breakpoint_active())
6449                 hw_breakpoint_restore();
6450
6451         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6452                                                            rdtsc());
6453
6454         vcpu->mode = OUTSIDE_GUEST_MODE;
6455         smp_wmb();
6456
6457         /* Interrupt is enabled by handle_external_intr() */
6458         kvm_x86_ops->handle_external_intr(vcpu);
6459
6460         ++vcpu->stat.exits;
6461
6462         /*
6463          * We must have an instruction between local_irq_enable() and
6464          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6465          * the interrupt shadow.  The stat.exits increment will do nicely.
6466          * But we need to prevent reordering, hence this barrier():
6467          */
6468         barrier();
6469
6470         kvm_guest_exit();
6471
6472         preempt_enable();
6473
6474         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6475
6476         /*
6477          * Profile KVM exit RIPs:
6478          */
6479         if (unlikely(prof_on == KVM_PROFILING)) {
6480                 unsigned long rip = kvm_rip_read(vcpu);
6481                 profile_hit(KVM_PROFILING, (void *)rip);
6482         }
6483
6484         if (unlikely(vcpu->arch.tsc_always_catchup))
6485                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6486
6487         if (vcpu->arch.apic_attention)
6488                 kvm_lapic_sync_from_vapic(vcpu);
6489
6490         r = kvm_x86_ops->handle_exit(vcpu);
6491         return r;
6492
6493 cancel_injection:
6494         kvm_x86_ops->cancel_injection(vcpu);
6495         if (unlikely(vcpu->arch.apic_attention))
6496                 kvm_lapic_sync_from_vapic(vcpu);
6497 out:
6498         return r;
6499 }
6500
6501 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6502 {
6503         if (!kvm_arch_vcpu_runnable(vcpu) &&
6504             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6505                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6506                 kvm_vcpu_block(vcpu);
6507                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6508
6509                 if (kvm_x86_ops->post_block)
6510                         kvm_x86_ops->post_block(vcpu);
6511
6512                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6513                         return 1;
6514         }
6515
6516         kvm_apic_accept_events(vcpu);
6517         switch(vcpu->arch.mp_state) {
6518         case KVM_MP_STATE_HALTED:
6519                 vcpu->arch.pv.pv_unhalted = false;
6520                 vcpu->arch.mp_state =
6521                         KVM_MP_STATE_RUNNABLE;
6522         case KVM_MP_STATE_RUNNABLE:
6523                 vcpu->arch.apf.halted = false;
6524                 break;
6525         case KVM_MP_STATE_INIT_RECEIVED:
6526                 break;
6527         default:
6528                 return -EINTR;
6529                 break;
6530         }
6531         return 1;
6532 }
6533
6534 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6535 {
6536         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6537                 !vcpu->arch.apf.halted);
6538 }
6539
6540 static int vcpu_run(struct kvm_vcpu *vcpu)
6541 {
6542         int r;
6543         struct kvm *kvm = vcpu->kvm;
6544
6545         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6546
6547         for (;;) {
6548                 if (kvm_vcpu_running(vcpu)) {
6549                         r = vcpu_enter_guest(vcpu);
6550                 } else {
6551                         r = vcpu_block(kvm, vcpu);
6552                 }
6553
6554                 if (r <= 0)
6555                         break;
6556
6557                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6558                 if (kvm_cpu_has_pending_timer(vcpu))
6559                         kvm_inject_pending_timer_irqs(vcpu);
6560
6561                 if (dm_request_for_irq_injection(vcpu)) {
6562                         r = 0;
6563                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6564                         ++vcpu->stat.request_irq_exits;
6565                         break;
6566                 }
6567
6568                 kvm_check_async_pf_completion(vcpu);
6569
6570                 if (signal_pending(current)) {
6571                         r = -EINTR;
6572                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6573                         ++vcpu->stat.signal_exits;
6574                         break;
6575                 }
6576                 if (need_resched()) {
6577                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6578                         cond_resched();
6579                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6580                 }
6581         }
6582
6583         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6584
6585         return r;
6586 }
6587
6588 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6589 {
6590         int r;
6591         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6592         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6593         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6594         if (r != EMULATE_DONE)
6595                 return 0;
6596         return 1;
6597 }
6598
6599 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6600 {
6601         BUG_ON(!vcpu->arch.pio.count);
6602
6603         return complete_emulated_io(vcpu);
6604 }
6605
6606 /*
6607  * Implements the following, as a state machine:
6608  *
6609  * read:
6610  *   for each fragment
6611  *     for each mmio piece in the fragment
6612  *       write gpa, len
6613  *       exit
6614  *       copy data
6615  *   execute insn
6616  *
6617  * write:
6618  *   for each fragment
6619  *     for each mmio piece in the fragment
6620  *       write gpa, len
6621  *       copy data
6622  *       exit
6623  */
6624 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6625 {
6626         struct kvm_run *run = vcpu->run;
6627         struct kvm_mmio_fragment *frag;
6628         unsigned len;
6629
6630         BUG_ON(!vcpu->mmio_needed);
6631
6632         /* Complete previous fragment */
6633         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6634         len = min(8u, frag->len);
6635         if (!vcpu->mmio_is_write)
6636                 memcpy(frag->data, run->mmio.data, len);
6637
6638         if (frag->len <= 8) {
6639                 /* Switch to the next fragment. */
6640                 frag++;
6641                 vcpu->mmio_cur_fragment++;
6642         } else {
6643                 /* Go forward to the next mmio piece. */
6644                 frag->data += len;
6645                 frag->gpa += len;
6646                 frag->len -= len;
6647         }
6648
6649         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6650                 vcpu->mmio_needed = 0;
6651
6652                 /* FIXME: return into emulator if single-stepping.  */
6653                 if (vcpu->mmio_is_write)
6654                         return 1;
6655                 vcpu->mmio_read_completed = 1;
6656                 return complete_emulated_io(vcpu);
6657         }
6658
6659         run->exit_reason = KVM_EXIT_MMIO;
6660         run->mmio.phys_addr = frag->gpa;
6661         if (vcpu->mmio_is_write)
6662                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6663         run->mmio.len = min(8u, frag->len);
6664         run->mmio.is_write = vcpu->mmio_is_write;
6665         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6666         return 0;
6667 }
6668
6669
6670 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6671 {
6672         struct fpu *fpu = &current->thread.fpu;
6673         int r;
6674         sigset_t sigsaved;
6675
6676         fpu__activate_curr(fpu);
6677
6678         if (vcpu->sigset_active)
6679                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6680
6681         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6682                 kvm_vcpu_block(vcpu);
6683                 kvm_apic_accept_events(vcpu);
6684                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6685                 r = -EAGAIN;
6686                 goto out;
6687         }
6688
6689         /* re-sync apic's tpr */
6690         if (!lapic_in_kernel(vcpu)) {
6691                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6692                         r = -EINVAL;
6693                         goto out;
6694                 }
6695         }
6696
6697         if (unlikely(vcpu->arch.complete_userspace_io)) {
6698                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6699                 vcpu->arch.complete_userspace_io = NULL;
6700                 r = cui(vcpu);
6701                 if (r <= 0)
6702                         goto out;
6703         } else
6704                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6705
6706         r = vcpu_run(vcpu);
6707
6708 out:
6709         post_kvm_run_save(vcpu);
6710         if (vcpu->sigset_active)
6711                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6712
6713         return r;
6714 }
6715
6716 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6717 {
6718         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6719                 /*
6720                  * We are here if userspace calls get_regs() in the middle of
6721                  * instruction emulation. Registers state needs to be copied
6722                  * back from emulation context to vcpu. Userspace shouldn't do
6723                  * that usually, but some bad designed PV devices (vmware
6724                  * backdoor interface) need this to work
6725                  */
6726                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6727                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6728         }
6729         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6730         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6731         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6732         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6733         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6734         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6735         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6736         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6737 #ifdef CONFIG_X86_64
6738         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6739         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6740         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6741         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6742         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6743         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6744         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6745         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6746 #endif
6747
6748         regs->rip = kvm_rip_read(vcpu);
6749         regs->rflags = kvm_get_rflags(vcpu);
6750
6751         return 0;
6752 }
6753
6754 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6755 {
6756         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6757         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6758
6759         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6760         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6761         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6762         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6763         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6764         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6765         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6766         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6767 #ifdef CONFIG_X86_64
6768         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6769         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6770         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6771         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6772         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6773         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6774         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6775         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6776 #endif
6777
6778         kvm_rip_write(vcpu, regs->rip);
6779         kvm_set_rflags(vcpu, regs->rflags);
6780
6781         vcpu->arch.exception.pending = false;
6782
6783         kvm_make_request(KVM_REQ_EVENT, vcpu);
6784
6785         return 0;
6786 }
6787
6788 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6789 {
6790         struct kvm_segment cs;
6791
6792         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6793         *db = cs.db;
6794         *l = cs.l;
6795 }
6796 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6797
6798 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6799                                   struct kvm_sregs *sregs)
6800 {
6801         struct desc_ptr dt;
6802
6803         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6804         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6805         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6806         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6807         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6808         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6809
6810         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6811         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6812
6813         kvm_x86_ops->get_idt(vcpu, &dt);
6814         sregs->idt.limit = dt.size;
6815         sregs->idt.base = dt.address;
6816         kvm_x86_ops->get_gdt(vcpu, &dt);
6817         sregs->gdt.limit = dt.size;
6818         sregs->gdt.base = dt.address;
6819
6820         sregs->cr0 = kvm_read_cr0(vcpu);
6821         sregs->cr2 = vcpu->arch.cr2;
6822         sregs->cr3 = kvm_read_cr3(vcpu);
6823         sregs->cr4 = kvm_read_cr4(vcpu);
6824         sregs->cr8 = kvm_get_cr8(vcpu);
6825         sregs->efer = vcpu->arch.efer;
6826         sregs->apic_base = kvm_get_apic_base(vcpu);
6827
6828         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6829
6830         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6831                 set_bit(vcpu->arch.interrupt.nr,
6832                         (unsigned long *)sregs->interrupt_bitmap);
6833
6834         return 0;
6835 }
6836
6837 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6838                                     struct kvm_mp_state *mp_state)
6839 {
6840         kvm_apic_accept_events(vcpu);
6841         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6842                                         vcpu->arch.pv.pv_unhalted)
6843                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6844         else
6845                 mp_state->mp_state = vcpu->arch.mp_state;
6846
6847         return 0;
6848 }
6849
6850 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6851                                     struct kvm_mp_state *mp_state)
6852 {
6853         if (!kvm_vcpu_has_lapic(vcpu) &&
6854             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6855                 return -EINVAL;
6856
6857         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6858                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6859                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6860         } else
6861                 vcpu->arch.mp_state = mp_state->mp_state;
6862         kvm_make_request(KVM_REQ_EVENT, vcpu);
6863         return 0;
6864 }
6865
6866 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6867                     int reason, bool has_error_code, u32 error_code)
6868 {
6869         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6870         int ret;
6871
6872         init_emulate_ctxt(vcpu);
6873
6874         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6875                                    has_error_code, error_code);
6876
6877         if (ret)
6878                 return EMULATE_FAIL;
6879
6880         kvm_rip_write(vcpu, ctxt->eip);
6881         kvm_set_rflags(vcpu, ctxt->eflags);
6882         kvm_make_request(KVM_REQ_EVENT, vcpu);
6883         return EMULATE_DONE;
6884 }
6885 EXPORT_SYMBOL_GPL(kvm_task_switch);
6886
6887 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6888                                   struct kvm_sregs *sregs)
6889 {
6890         struct msr_data apic_base_msr;
6891         int mmu_reset_needed = 0;
6892         int pending_vec, max_bits, idx;
6893         struct desc_ptr dt;
6894
6895         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6896                 return -EINVAL;
6897
6898         dt.size = sregs->idt.limit;
6899         dt.address = sregs->idt.base;
6900         kvm_x86_ops->set_idt(vcpu, &dt);
6901         dt.size = sregs->gdt.limit;
6902         dt.address = sregs->gdt.base;
6903         kvm_x86_ops->set_gdt(vcpu, &dt);
6904
6905         vcpu->arch.cr2 = sregs->cr2;
6906         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6907         vcpu->arch.cr3 = sregs->cr3;
6908         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6909
6910         kvm_set_cr8(vcpu, sregs->cr8);
6911
6912         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6913         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6914         apic_base_msr.data = sregs->apic_base;
6915         apic_base_msr.host_initiated = true;
6916         kvm_set_apic_base(vcpu, &apic_base_msr);
6917
6918         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6919         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6920         vcpu->arch.cr0 = sregs->cr0;
6921
6922         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6923         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6924         if (sregs->cr4 & X86_CR4_OSXSAVE)
6925                 kvm_update_cpuid(vcpu);
6926
6927         idx = srcu_read_lock(&vcpu->kvm->srcu);
6928         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6929                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6930                 mmu_reset_needed = 1;
6931         }
6932         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6933
6934         if (mmu_reset_needed)
6935                 kvm_mmu_reset_context(vcpu);
6936
6937         max_bits = KVM_NR_INTERRUPTS;
6938         pending_vec = find_first_bit(
6939                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6940         if (pending_vec < max_bits) {
6941                 kvm_queue_interrupt(vcpu, pending_vec, false);
6942                 pr_debug("Set back pending irq %d\n", pending_vec);
6943         }
6944
6945         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6946         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6947         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6948         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6949         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6950         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6951
6952         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6953         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6954
6955         update_cr8_intercept(vcpu);
6956
6957         /* Older userspace won't unhalt the vcpu on reset. */
6958         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6959             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6960             !is_protmode(vcpu))
6961                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6962
6963         kvm_make_request(KVM_REQ_EVENT, vcpu);
6964
6965         return 0;
6966 }
6967
6968 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6969                                         struct kvm_guest_debug *dbg)
6970 {
6971         unsigned long rflags;
6972         int i, r;
6973
6974         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6975                 r = -EBUSY;
6976                 if (vcpu->arch.exception.pending)
6977                         goto out;
6978                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6979                         kvm_queue_exception(vcpu, DB_VECTOR);
6980                 else
6981                         kvm_queue_exception(vcpu, BP_VECTOR);
6982         }
6983
6984         /*
6985          * Read rflags as long as potentially injected trace flags are still
6986          * filtered out.
6987          */
6988         rflags = kvm_get_rflags(vcpu);
6989
6990         vcpu->guest_debug = dbg->control;
6991         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6992                 vcpu->guest_debug = 0;
6993
6994         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6995                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6996                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6997                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6998         } else {
6999                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7000                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7001         }
7002         kvm_update_dr7(vcpu);
7003
7004         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7005                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7006                         get_segment_base(vcpu, VCPU_SREG_CS);
7007
7008         /*
7009          * Trigger an rflags update that will inject or remove the trace
7010          * flags.
7011          */
7012         kvm_set_rflags(vcpu, rflags);
7013
7014         kvm_x86_ops->update_db_bp_intercept(vcpu);
7015
7016         r = 0;
7017
7018 out:
7019
7020         return r;
7021 }
7022
7023 /*
7024  * Translate a guest virtual address to a guest physical address.
7025  */
7026 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7027                                     struct kvm_translation *tr)
7028 {
7029         unsigned long vaddr = tr->linear_address;
7030         gpa_t gpa;
7031         int idx;
7032
7033         idx = srcu_read_lock(&vcpu->kvm->srcu);
7034         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7035         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7036         tr->physical_address = gpa;
7037         tr->valid = gpa != UNMAPPED_GVA;
7038         tr->writeable = 1;
7039         tr->usermode = 0;
7040
7041         return 0;
7042 }
7043
7044 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7045 {
7046         struct fxregs_state *fxsave =
7047                         &vcpu->arch.guest_fpu.state.fxsave;
7048
7049         memcpy(fpu->fpr, fxsave->st_space, 128);
7050         fpu->fcw = fxsave->cwd;
7051         fpu->fsw = fxsave->swd;
7052         fpu->ftwx = fxsave->twd;
7053         fpu->last_opcode = fxsave->fop;
7054         fpu->last_ip = fxsave->rip;
7055         fpu->last_dp = fxsave->rdp;
7056         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7057
7058         return 0;
7059 }
7060
7061 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7062 {
7063         struct fxregs_state *fxsave =
7064                         &vcpu->arch.guest_fpu.state.fxsave;
7065
7066         memcpy(fxsave->st_space, fpu->fpr, 128);
7067         fxsave->cwd = fpu->fcw;
7068         fxsave->swd = fpu->fsw;
7069         fxsave->twd = fpu->ftwx;
7070         fxsave->fop = fpu->last_opcode;
7071         fxsave->rip = fpu->last_ip;
7072         fxsave->rdp = fpu->last_dp;
7073         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7074
7075         return 0;
7076 }
7077
7078 static void fx_init(struct kvm_vcpu *vcpu)
7079 {
7080         fpstate_init(&vcpu->arch.guest_fpu.state);
7081         if (cpu_has_xsaves)
7082                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7083                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7084
7085         /*
7086          * Ensure guest xcr0 is valid for loading
7087          */
7088         vcpu->arch.xcr0 = XSTATE_FP;
7089
7090         vcpu->arch.cr0 |= X86_CR0_ET;
7091 }
7092
7093 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7094 {
7095         if (vcpu->guest_fpu_loaded)
7096                 return;
7097
7098         /*
7099          * Restore all possible states in the guest,
7100          * and assume host would use all available bits.
7101          * Guest xcr0 would be loaded later.
7102          */
7103         kvm_put_guest_xcr0(vcpu);
7104         vcpu->guest_fpu_loaded = 1;
7105         __kernel_fpu_begin();
7106         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7107         trace_kvm_fpu(1);
7108 }
7109
7110 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7111 {
7112         kvm_put_guest_xcr0(vcpu);
7113
7114         if (!vcpu->guest_fpu_loaded) {
7115                 vcpu->fpu_counter = 0;
7116                 return;
7117         }
7118
7119         vcpu->guest_fpu_loaded = 0;
7120         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7121         __kernel_fpu_end();
7122         ++vcpu->stat.fpu_reload;
7123         /*
7124          * If using eager FPU mode, or if the guest is a frequent user
7125          * of the FPU, just leave the FPU active for next time.
7126          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7127          * the FPU in bursts will revert to loading it on demand.
7128          */
7129         if (!vcpu->arch.eager_fpu) {
7130                 if (++vcpu->fpu_counter < 5)
7131                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7132         }
7133         trace_kvm_fpu(0);
7134 }
7135
7136 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7137 {
7138         kvmclock_reset(vcpu);
7139
7140         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7141         kvm_x86_ops->vcpu_free(vcpu);
7142 }
7143
7144 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7145                                                 unsigned int id)
7146 {
7147         struct kvm_vcpu *vcpu;
7148
7149         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7150                 printk_once(KERN_WARNING
7151                 "kvm: SMP vm created on host with unstable TSC; "
7152                 "guest TSC will not be reliable\n");
7153
7154         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7155
7156         return vcpu;
7157 }
7158
7159 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7160 {
7161         int r;
7162
7163         kvm_vcpu_mtrr_init(vcpu);
7164         r = vcpu_load(vcpu);
7165         if (r)
7166                 return r;
7167         kvm_vcpu_reset(vcpu, false);
7168         kvm_mmu_setup(vcpu);
7169         vcpu_put(vcpu);
7170         return r;
7171 }
7172
7173 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7174 {
7175         struct msr_data msr;
7176         struct kvm *kvm = vcpu->kvm;
7177
7178         if (vcpu_load(vcpu))
7179                 return;
7180         msr.data = 0x0;
7181         msr.index = MSR_IA32_TSC;
7182         msr.host_initiated = true;
7183         kvm_write_tsc(vcpu, &msr);
7184         vcpu_put(vcpu);
7185
7186         if (!kvmclock_periodic_sync)
7187                 return;
7188
7189         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7190                                         KVMCLOCK_SYNC_PERIOD);
7191 }
7192
7193 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7194 {
7195         int r;
7196         vcpu->arch.apf.msr_val = 0;
7197
7198         r = vcpu_load(vcpu);
7199         BUG_ON(r);
7200         kvm_mmu_unload(vcpu);
7201         vcpu_put(vcpu);
7202
7203         kvm_x86_ops->vcpu_free(vcpu);
7204 }
7205
7206 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7207 {
7208         vcpu->arch.hflags = 0;
7209
7210         atomic_set(&vcpu->arch.nmi_queued, 0);
7211         vcpu->arch.nmi_pending = 0;
7212         vcpu->arch.nmi_injected = false;
7213         kvm_clear_interrupt_queue(vcpu);
7214         kvm_clear_exception_queue(vcpu);
7215
7216         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7217         kvm_update_dr0123(vcpu);
7218         vcpu->arch.dr6 = DR6_INIT;
7219         kvm_update_dr6(vcpu);
7220         vcpu->arch.dr7 = DR7_FIXED_1;
7221         kvm_update_dr7(vcpu);
7222
7223         vcpu->arch.cr2 = 0;
7224
7225         kvm_make_request(KVM_REQ_EVENT, vcpu);
7226         vcpu->arch.apf.msr_val = 0;
7227         vcpu->arch.st.msr_val = 0;
7228
7229         kvmclock_reset(vcpu);
7230
7231         kvm_clear_async_pf_completion_queue(vcpu);
7232         kvm_async_pf_hash_reset(vcpu);
7233         vcpu->arch.apf.halted = false;
7234
7235         if (!init_event) {
7236                 kvm_pmu_reset(vcpu);
7237                 vcpu->arch.smbase = 0x30000;
7238         }
7239
7240         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7241         vcpu->arch.regs_avail = ~0;
7242         vcpu->arch.regs_dirty = ~0;
7243
7244         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7245 }
7246
7247 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7248 {
7249         struct kvm_segment cs;
7250
7251         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7252         cs.selector = vector << 8;
7253         cs.base = vector << 12;
7254         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7255         kvm_rip_write(vcpu, 0);
7256 }
7257
7258 int kvm_arch_hardware_enable(void)
7259 {
7260         struct kvm *kvm;
7261         struct kvm_vcpu *vcpu;
7262         int i;
7263         int ret;
7264         u64 local_tsc;
7265         u64 max_tsc = 0;
7266         bool stable, backwards_tsc = false;
7267
7268         kvm_shared_msr_cpu_online();
7269         ret = kvm_x86_ops->hardware_enable();
7270         if (ret != 0)
7271                 return ret;
7272
7273         local_tsc = rdtsc();
7274         stable = !check_tsc_unstable();
7275         list_for_each_entry(kvm, &vm_list, vm_list) {
7276                 kvm_for_each_vcpu(i, vcpu, kvm) {
7277                         if (!stable && vcpu->cpu == smp_processor_id())
7278                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7279                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7280                                 backwards_tsc = true;
7281                                 if (vcpu->arch.last_host_tsc > max_tsc)
7282                                         max_tsc = vcpu->arch.last_host_tsc;
7283                         }
7284                 }
7285         }
7286
7287         /*
7288          * Sometimes, even reliable TSCs go backwards.  This happens on
7289          * platforms that reset TSC during suspend or hibernate actions, but
7290          * maintain synchronization.  We must compensate.  Fortunately, we can
7291          * detect that condition here, which happens early in CPU bringup,
7292          * before any KVM threads can be running.  Unfortunately, we can't
7293          * bring the TSCs fully up to date with real time, as we aren't yet far
7294          * enough into CPU bringup that we know how much real time has actually
7295          * elapsed; our helper function, get_kernel_ns() will be using boot
7296          * variables that haven't been updated yet.
7297          *
7298          * So we simply find the maximum observed TSC above, then record the
7299          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7300          * the adjustment will be applied.  Note that we accumulate
7301          * adjustments, in case multiple suspend cycles happen before some VCPU
7302          * gets a chance to run again.  In the event that no KVM threads get a
7303          * chance to run, we will miss the entire elapsed period, as we'll have
7304          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7305          * loose cycle time.  This isn't too big a deal, since the loss will be
7306          * uniform across all VCPUs (not to mention the scenario is extremely
7307          * unlikely). It is possible that a second hibernate recovery happens
7308          * much faster than a first, causing the observed TSC here to be
7309          * smaller; this would require additional padding adjustment, which is
7310          * why we set last_host_tsc to the local tsc observed here.
7311          *
7312          * N.B. - this code below runs only on platforms with reliable TSC,
7313          * as that is the only way backwards_tsc is set above.  Also note
7314          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7315          * have the same delta_cyc adjustment applied if backwards_tsc
7316          * is detected.  Note further, this adjustment is only done once,
7317          * as we reset last_host_tsc on all VCPUs to stop this from being
7318          * called multiple times (one for each physical CPU bringup).
7319          *
7320          * Platforms with unreliable TSCs don't have to deal with this, they
7321          * will be compensated by the logic in vcpu_load, which sets the TSC to
7322          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7323          * guarantee that they stay in perfect synchronization.
7324          */
7325         if (backwards_tsc) {
7326                 u64 delta_cyc = max_tsc - local_tsc;
7327                 backwards_tsc_observed = true;
7328                 list_for_each_entry(kvm, &vm_list, vm_list) {
7329                         kvm_for_each_vcpu(i, vcpu, kvm) {
7330                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7331                                 vcpu->arch.last_host_tsc = local_tsc;
7332                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7333                         }
7334
7335                         /*
7336                          * We have to disable TSC offset matching.. if you were
7337                          * booting a VM while issuing an S4 host suspend....
7338                          * you may have some problem.  Solving this issue is
7339                          * left as an exercise to the reader.
7340                          */
7341                         kvm->arch.last_tsc_nsec = 0;
7342                         kvm->arch.last_tsc_write = 0;
7343                 }
7344
7345         }
7346         return 0;
7347 }
7348
7349 void kvm_arch_hardware_disable(void)
7350 {
7351         kvm_x86_ops->hardware_disable();
7352         drop_user_return_notifiers();
7353 }
7354
7355 int kvm_arch_hardware_setup(void)
7356 {
7357         int r;
7358
7359         r = kvm_x86_ops->hardware_setup();
7360         if (r != 0)
7361                 return r;
7362
7363         kvm_init_msr_list();
7364         return 0;
7365 }
7366
7367 void kvm_arch_hardware_unsetup(void)
7368 {
7369         kvm_x86_ops->hardware_unsetup();
7370 }
7371
7372 void kvm_arch_check_processor_compat(void *rtn)
7373 {
7374         kvm_x86_ops->check_processor_compatibility(rtn);
7375 }
7376
7377 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7378 {
7379         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7380 }
7381 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7382
7383 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7384 {
7385         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7386 }
7387
7388 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7389 {
7390         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7391 }
7392
7393 struct static_key kvm_no_apic_vcpu __read_mostly;
7394
7395 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7396 {
7397         struct page *page;
7398         struct kvm *kvm;
7399         int r;
7400
7401         BUG_ON(vcpu->kvm == NULL);
7402         kvm = vcpu->kvm;
7403
7404         vcpu->arch.pv.pv_unhalted = false;
7405         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7406         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7407                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7408         else
7409                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7410
7411         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7412         if (!page) {
7413                 r = -ENOMEM;
7414                 goto fail;
7415         }
7416         vcpu->arch.pio_data = page_address(page);
7417
7418         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7419
7420         r = kvm_mmu_create(vcpu);
7421         if (r < 0)
7422                 goto fail_free_pio_data;
7423
7424         if (irqchip_in_kernel(kvm)) {
7425                 r = kvm_create_lapic(vcpu);
7426                 if (r < 0)
7427                         goto fail_mmu_destroy;
7428         } else
7429                 static_key_slow_inc(&kvm_no_apic_vcpu);
7430
7431         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7432                                        GFP_KERNEL);
7433         if (!vcpu->arch.mce_banks) {
7434                 r = -ENOMEM;
7435                 goto fail_free_lapic;
7436         }
7437         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7438
7439         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7440                 r = -ENOMEM;
7441                 goto fail_free_mce_banks;
7442         }
7443
7444         fx_init(vcpu);
7445
7446         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7447         vcpu->arch.pv_time_enabled = false;
7448
7449         vcpu->arch.guest_supported_xcr0 = 0;
7450         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7451
7452         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7453
7454         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7455
7456         kvm_async_pf_hash_reset(vcpu);
7457         kvm_pmu_init(vcpu);
7458
7459         vcpu->arch.pending_external_vector = -1;
7460
7461         return 0;
7462
7463 fail_free_mce_banks:
7464         kfree(vcpu->arch.mce_banks);
7465 fail_free_lapic:
7466         kvm_free_lapic(vcpu);
7467 fail_mmu_destroy:
7468         kvm_mmu_destroy(vcpu);
7469 fail_free_pio_data:
7470         free_page((unsigned long)vcpu->arch.pio_data);
7471 fail:
7472         return r;
7473 }
7474
7475 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7476 {
7477         int idx;
7478
7479         kvm_pmu_destroy(vcpu);
7480         kfree(vcpu->arch.mce_banks);
7481         kvm_free_lapic(vcpu);
7482         idx = srcu_read_lock(&vcpu->kvm->srcu);
7483         kvm_mmu_destroy(vcpu);
7484         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7485         free_page((unsigned long)vcpu->arch.pio_data);
7486         if (!lapic_in_kernel(vcpu))
7487                 static_key_slow_dec(&kvm_no_apic_vcpu);
7488 }
7489
7490 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7491 {
7492         kvm_x86_ops->sched_in(vcpu, cpu);
7493 }
7494
7495 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7496 {
7497         if (type)
7498                 return -EINVAL;
7499
7500         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7501         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7502         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7503         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7504         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7505
7506         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7507         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7508         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7509         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7510                 &kvm->arch.irq_sources_bitmap);
7511
7512         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7513         mutex_init(&kvm->arch.apic_map_lock);
7514         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7515
7516         pvclock_update_vm_gtod_copy(kvm);
7517
7518         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7519         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7520
7521         return 0;
7522 }
7523
7524 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7525 {
7526         int r;
7527         r = vcpu_load(vcpu);
7528         BUG_ON(r);
7529         kvm_mmu_unload(vcpu);
7530         vcpu_put(vcpu);
7531 }
7532
7533 static void kvm_free_vcpus(struct kvm *kvm)
7534 {
7535         unsigned int i;
7536         struct kvm_vcpu *vcpu;
7537
7538         /*
7539          * Unpin any mmu pages first.
7540          */
7541         kvm_for_each_vcpu(i, vcpu, kvm) {
7542                 kvm_clear_async_pf_completion_queue(vcpu);
7543                 kvm_unload_vcpu_mmu(vcpu);
7544         }
7545         kvm_for_each_vcpu(i, vcpu, kvm)
7546                 kvm_arch_vcpu_free(vcpu);
7547
7548         mutex_lock(&kvm->lock);
7549         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7550                 kvm->vcpus[i] = NULL;
7551
7552         atomic_set(&kvm->online_vcpus, 0);
7553         mutex_unlock(&kvm->lock);
7554 }
7555
7556 void kvm_arch_sync_events(struct kvm *kvm)
7557 {
7558         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7559         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7560         kvm_free_all_assigned_devices(kvm);
7561         kvm_free_pit(kvm);
7562 }
7563
7564 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7565 {
7566         int i, r;
7567         u64 hva;
7568         struct kvm_memslots *slots = kvm_memslots(kvm);
7569         struct kvm_memory_slot *slot, old;
7570
7571         /* Called with kvm->slots_lock held.  */
7572         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7573                 return -EINVAL;
7574
7575         slot = id_to_memslot(slots, id);
7576         if (size) {
7577                 if (WARN_ON(slot->npages))
7578                         return -EEXIST;
7579
7580                 /*
7581                  * MAP_SHARED to prevent internal slot pages from being moved
7582                  * by fork()/COW.
7583                  */
7584                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7585                               MAP_SHARED | MAP_ANONYMOUS, 0);
7586                 if (IS_ERR((void *)hva))
7587                         return PTR_ERR((void *)hva);
7588         } else {
7589                 if (!slot->npages)
7590                         return 0;
7591
7592                 hva = 0;
7593         }
7594
7595         old = *slot;
7596         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7597                 struct kvm_userspace_memory_region m;
7598
7599                 m.slot = id | (i << 16);
7600                 m.flags = 0;
7601                 m.guest_phys_addr = gpa;
7602                 m.userspace_addr = hva;
7603                 m.memory_size = size;
7604                 r = __kvm_set_memory_region(kvm, &m);
7605                 if (r < 0)
7606                         return r;
7607         }
7608
7609         if (!size) {
7610                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7611                 WARN_ON(r < 0);
7612         }
7613
7614         return 0;
7615 }
7616 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7617
7618 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7619 {
7620         int r;
7621
7622         mutex_lock(&kvm->slots_lock);
7623         r = __x86_set_memory_region(kvm, id, gpa, size);
7624         mutex_unlock(&kvm->slots_lock);
7625
7626         return r;
7627 }
7628 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7629
7630 void kvm_arch_destroy_vm(struct kvm *kvm)
7631 {
7632         if (current->mm == kvm->mm) {
7633                 /*
7634                  * Free memory regions allocated on behalf of userspace,
7635                  * unless the the memory map has changed due to process exit
7636                  * or fd copying.
7637                  */
7638                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7639                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7640                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7641         }
7642         kvm_iommu_unmap_guest(kvm);
7643         kfree(kvm->arch.vpic);
7644         kfree(kvm->arch.vioapic);
7645         kvm_free_vcpus(kvm);
7646         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7647 }
7648
7649 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7650                            struct kvm_memory_slot *dont)
7651 {
7652         int i;
7653
7654         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7655                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7656                         kvfree(free->arch.rmap[i]);
7657                         free->arch.rmap[i] = NULL;
7658                 }
7659                 if (i == 0)
7660                         continue;
7661
7662                 if (!dont || free->arch.lpage_info[i - 1] !=
7663                              dont->arch.lpage_info[i - 1]) {
7664                         kvfree(free->arch.lpage_info[i - 1]);
7665                         free->arch.lpage_info[i - 1] = NULL;
7666                 }
7667         }
7668 }
7669
7670 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7671                             unsigned long npages)
7672 {
7673         int i;
7674
7675         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7676                 unsigned long ugfn;
7677                 int lpages;
7678                 int level = i + 1;
7679
7680                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7681                                       slot->base_gfn, level) + 1;
7682
7683                 slot->arch.rmap[i] =
7684                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7685                 if (!slot->arch.rmap[i])
7686                         goto out_free;
7687                 if (i == 0)
7688                         continue;
7689
7690                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7691                                         sizeof(*slot->arch.lpage_info[i - 1]));
7692                 if (!slot->arch.lpage_info[i - 1])
7693                         goto out_free;
7694
7695                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7696                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7697                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7698                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7699                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7700                 /*
7701                  * If the gfn and userspace address are not aligned wrt each
7702                  * other, or if explicitly asked to, disable large page
7703                  * support for this slot
7704                  */
7705                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7706                     !kvm_largepages_enabled()) {
7707                         unsigned long j;
7708
7709                         for (j = 0; j < lpages; ++j)
7710                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7711                 }
7712         }
7713
7714         return 0;
7715
7716 out_free:
7717         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7718                 kvfree(slot->arch.rmap[i]);
7719                 slot->arch.rmap[i] = NULL;
7720                 if (i == 0)
7721                         continue;
7722
7723                 kvfree(slot->arch.lpage_info[i - 1]);
7724                 slot->arch.lpage_info[i - 1] = NULL;
7725         }
7726         return -ENOMEM;
7727 }
7728
7729 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7730 {
7731         /*
7732          * memslots->generation has been incremented.
7733          * mmio generation may have reached its maximum value.
7734          */
7735         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7736 }
7737
7738 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7739                                 struct kvm_memory_slot *memslot,
7740                                 const struct kvm_userspace_memory_region *mem,
7741                                 enum kvm_mr_change change)
7742 {
7743         return 0;
7744 }
7745
7746 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7747                                      struct kvm_memory_slot *new)
7748 {
7749         /* Still write protect RO slot */
7750         if (new->flags & KVM_MEM_READONLY) {
7751                 kvm_mmu_slot_remove_write_access(kvm, new);
7752                 return;
7753         }
7754
7755         /*
7756          * Call kvm_x86_ops dirty logging hooks when they are valid.
7757          *
7758          * kvm_x86_ops->slot_disable_log_dirty is called when:
7759          *
7760          *  - KVM_MR_CREATE with dirty logging is disabled
7761          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7762          *
7763          * The reason is, in case of PML, we need to set D-bit for any slots
7764          * with dirty logging disabled in order to eliminate unnecessary GPA
7765          * logging in PML buffer (and potential PML buffer full VMEXT). This
7766          * guarantees leaving PML enabled during guest's lifetime won't have
7767          * any additonal overhead from PML when guest is running with dirty
7768          * logging disabled for memory slots.
7769          *
7770          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7771          * to dirty logging mode.
7772          *
7773          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7774          *
7775          * In case of write protect:
7776          *
7777          * Write protect all pages for dirty logging.
7778          *
7779          * All the sptes including the large sptes which point to this
7780          * slot are set to readonly. We can not create any new large
7781          * spte on this slot until the end of the logging.
7782          *
7783          * See the comments in fast_page_fault().
7784          */
7785         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7786                 if (kvm_x86_ops->slot_enable_log_dirty)
7787                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7788                 else
7789                         kvm_mmu_slot_remove_write_access(kvm, new);
7790         } else {
7791                 if (kvm_x86_ops->slot_disable_log_dirty)
7792                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7793         }
7794 }
7795
7796 void kvm_arch_commit_memory_region(struct kvm *kvm,
7797                                 const struct kvm_userspace_memory_region *mem,
7798                                 const struct kvm_memory_slot *old,
7799                                 const struct kvm_memory_slot *new,
7800                                 enum kvm_mr_change change)
7801 {
7802         int nr_mmu_pages = 0;
7803
7804         if (!kvm->arch.n_requested_mmu_pages)
7805                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7806
7807         if (nr_mmu_pages)
7808                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7809
7810         /*
7811          * Dirty logging tracks sptes in 4k granularity, meaning that large
7812          * sptes have to be split.  If live migration is successful, the guest
7813          * in the source machine will be destroyed and large sptes will be
7814          * created in the destination. However, if the guest continues to run
7815          * in the source machine (for example if live migration fails), small
7816          * sptes will remain around and cause bad performance.
7817          *
7818          * Scan sptes if dirty logging has been stopped, dropping those
7819          * which can be collapsed into a single large-page spte.  Later
7820          * page faults will create the large-page sptes.
7821          */
7822         if ((change != KVM_MR_DELETE) &&
7823                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7824                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7825                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7826
7827         /*
7828          * Set up write protection and/or dirty logging for the new slot.
7829          *
7830          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7831          * been zapped so no dirty logging staff is needed for old slot. For
7832          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7833          * new and it's also covered when dealing with the new slot.
7834          *
7835          * FIXME: const-ify all uses of struct kvm_memory_slot.
7836          */
7837         if (change != KVM_MR_DELETE)
7838                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7839 }
7840
7841 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7842 {
7843         kvm_mmu_invalidate_zap_all_pages(kvm);
7844 }
7845
7846 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7847                                    struct kvm_memory_slot *slot)
7848 {
7849         kvm_mmu_invalidate_zap_all_pages(kvm);
7850 }
7851
7852 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7853 {
7854         if (!list_empty_careful(&vcpu->async_pf.done))
7855                 return true;
7856
7857         if (kvm_apic_has_events(vcpu))
7858                 return true;
7859
7860         if (vcpu->arch.pv.pv_unhalted)
7861                 return true;
7862
7863         if (atomic_read(&vcpu->arch.nmi_queued))
7864                 return true;
7865
7866         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
7867                 return true;
7868
7869         if (kvm_arch_interrupt_allowed(vcpu) &&
7870             kvm_cpu_has_interrupt(vcpu))
7871                 return true;
7872
7873         return false;
7874 }
7875
7876 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7877 {
7878         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7879                 kvm_x86_ops->check_nested_events(vcpu, false);
7880
7881         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
7882 }
7883
7884 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7885 {
7886         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7887 }
7888
7889 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7890 {
7891         return kvm_x86_ops->interrupt_allowed(vcpu);
7892 }
7893
7894 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7895 {
7896         if (is_64_bit_mode(vcpu))
7897                 return kvm_rip_read(vcpu);
7898         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7899                      kvm_rip_read(vcpu));
7900 }
7901 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7902
7903 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7904 {
7905         return kvm_get_linear_rip(vcpu) == linear_rip;
7906 }
7907 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7908
7909 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7910 {
7911         unsigned long rflags;
7912
7913         rflags = kvm_x86_ops->get_rflags(vcpu);
7914         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7915                 rflags &= ~X86_EFLAGS_TF;
7916         return rflags;
7917 }
7918 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7919
7920 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7921 {
7922         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7923             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7924                 rflags |= X86_EFLAGS_TF;
7925         kvm_x86_ops->set_rflags(vcpu, rflags);
7926 }
7927
7928 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7929 {
7930         __kvm_set_rflags(vcpu, rflags);
7931         kvm_make_request(KVM_REQ_EVENT, vcpu);
7932 }
7933 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7934
7935 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7936 {
7937         int r;
7938
7939         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7940               work->wakeup_all)
7941                 return;
7942
7943         r = kvm_mmu_reload(vcpu);
7944         if (unlikely(r))
7945                 return;
7946
7947         if (!vcpu->arch.mmu.direct_map &&
7948               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7949                 return;
7950
7951         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7952 }
7953
7954 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7955 {
7956         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7957 }
7958
7959 static inline u32 kvm_async_pf_next_probe(u32 key)
7960 {
7961         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7962 }
7963
7964 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7965 {
7966         u32 key = kvm_async_pf_hash_fn(gfn);
7967
7968         while (vcpu->arch.apf.gfns[key] != ~0)
7969                 key = kvm_async_pf_next_probe(key);
7970
7971         vcpu->arch.apf.gfns[key] = gfn;
7972 }
7973
7974 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7975 {
7976         int i;
7977         u32 key = kvm_async_pf_hash_fn(gfn);
7978
7979         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7980                      (vcpu->arch.apf.gfns[key] != gfn &&
7981                       vcpu->arch.apf.gfns[key] != ~0); i++)
7982                 key = kvm_async_pf_next_probe(key);
7983
7984         return key;
7985 }
7986
7987 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7988 {
7989         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7990 }
7991
7992 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7993 {
7994         u32 i, j, k;
7995
7996         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7997         while (true) {
7998                 vcpu->arch.apf.gfns[i] = ~0;
7999                 do {
8000                         j = kvm_async_pf_next_probe(j);
8001                         if (vcpu->arch.apf.gfns[j] == ~0)
8002                                 return;
8003                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8004                         /*
8005                          * k lies cyclically in ]i,j]
8006                          * |    i.k.j |
8007                          * |....j i.k.| or  |.k..j i...|
8008                          */
8009                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8010                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8011                 i = j;
8012         }
8013 }
8014
8015 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8016 {
8017
8018         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8019                                       sizeof(val));
8020 }
8021
8022 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8023                                      struct kvm_async_pf *work)
8024 {
8025         struct x86_exception fault;
8026
8027         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8028         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8029
8030         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8031             (vcpu->arch.apf.send_user_only &&
8032              kvm_x86_ops->get_cpl(vcpu) == 0))
8033                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8034         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8035                 fault.vector = PF_VECTOR;
8036                 fault.error_code_valid = true;
8037                 fault.error_code = 0;
8038                 fault.nested_page_fault = false;
8039                 fault.address = work->arch.token;
8040                 kvm_inject_page_fault(vcpu, &fault);
8041         }
8042 }
8043
8044 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8045                                  struct kvm_async_pf *work)
8046 {
8047         struct x86_exception fault;
8048
8049         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8050         if (work->wakeup_all)
8051                 work->arch.token = ~0; /* broadcast wakeup */
8052         else
8053                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8054
8055         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8056             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8057                 fault.vector = PF_VECTOR;
8058                 fault.error_code_valid = true;
8059                 fault.error_code = 0;
8060                 fault.nested_page_fault = false;
8061                 fault.address = work->arch.token;
8062                 kvm_inject_page_fault(vcpu, &fault);
8063         }
8064         vcpu->arch.apf.halted = false;
8065         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8066 }
8067
8068 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8069 {
8070         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8071                 return true;
8072         else
8073                 return !kvm_event_needs_reinjection(vcpu) &&
8074                         kvm_x86_ops->interrupt_allowed(vcpu);
8075 }
8076
8077 void kvm_arch_start_assignment(struct kvm *kvm)
8078 {
8079         atomic_inc(&kvm->arch.assigned_device_count);
8080 }
8081 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8082
8083 void kvm_arch_end_assignment(struct kvm *kvm)
8084 {
8085         atomic_dec(&kvm->arch.assigned_device_count);
8086 }
8087 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8088
8089 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8090 {
8091         return atomic_read(&kvm->arch.assigned_device_count);
8092 }
8093 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8094
8095 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8096 {
8097         atomic_inc(&kvm->arch.noncoherent_dma_count);
8098 }
8099 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8100
8101 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8102 {
8103         atomic_dec(&kvm->arch.noncoherent_dma_count);
8104 }
8105 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8106
8107 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8108 {
8109         return atomic_read(&kvm->arch.noncoherent_dma_count);
8110 }
8111 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8112
8113 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8114                                       struct irq_bypass_producer *prod)
8115 {
8116         struct kvm_kernel_irqfd *irqfd =
8117                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8118
8119         if (kvm_x86_ops->update_pi_irte) {
8120                 irqfd->producer = prod;
8121                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8122                                 prod->irq, irqfd->gsi, 1);
8123         }
8124
8125         return -EINVAL;
8126 }
8127
8128 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8129                                       struct irq_bypass_producer *prod)
8130 {
8131         int ret;
8132         struct kvm_kernel_irqfd *irqfd =
8133                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8134
8135         if (!kvm_x86_ops->update_pi_irte) {
8136                 WARN_ON(irqfd->producer != NULL);
8137                 return;
8138         }
8139
8140         WARN_ON(irqfd->producer != prod);
8141         irqfd->producer = NULL;
8142
8143         /*
8144          * When producer of consumer is unregistered, we change back to
8145          * remapped mode, so we can re-use the current implementation
8146          * when the irq is masked/disabed or the consumer side (KVM
8147          * int this case doesn't want to receive the interrupts.
8148         */
8149         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8150         if (ret)
8151                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8152                        " fails: %d\n", irqfd->consumer.token, ret);
8153 }
8154
8155 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8156                                    uint32_t guest_irq, bool set)
8157 {
8158         if (!kvm_x86_ops->update_pi_irte)
8159                 return -EINVAL;
8160
8161         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8162 }
8163
8164 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8165 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8166 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8167 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8168 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8169 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8170 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8171 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8172 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8173 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8174 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8175 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8176 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8177 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8179 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8180 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);