2 * Handle caching attributes in page tables (PAT)
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
7 * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
10 #include <linux/seq_file.h>
11 #include <linux/bootmem.h>
12 #include <linux/debugfs.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
18 #include <linux/rbtree.h>
20 #include <asm/cacheflush.h>
21 #include <asm/processor.h>
22 #include <asm/tlbflush.h>
23 #include <asm/x86_init.h>
24 #include <asm/pgtable.h>
25 #include <asm/fcntl.h>
33 #include "pat_internal.h"
34 #include "mm_internal.h"
37 #define pr_fmt(fmt) "" fmt
39 static bool boot_cpu_done;
41 static int __read_mostly __pat_enabled = IS_ENABLED(CONFIG_X86_PAT);
43 static inline void pat_disable(const char *reason)
46 pr_info("x86/PAT: %s\n", reason);
49 static int __init nopat(char *str)
51 pat_disable("PAT support disabled.");
54 early_param("nopat", nopat);
56 bool pat_enabled(void)
58 return !!__pat_enabled;
60 EXPORT_SYMBOL_GPL(pat_enabled);
64 static int __init pat_debug_setup(char *str)
69 __setup("debugpat", pat_debug_setup);
73 * X86 PAT uses page flags WC and Uncached together to keep track of
74 * memory type of pages that have backing page struct. X86 PAT supports 3
75 * different memory types, _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC and
76 * _PAGE_CACHE_MODE_UC_MINUS and fourth state where page's memory type has not
77 * been changed from its default (value of -1 used to denote this).
78 * Note we do not support _PAGE_CACHE_MODE_UC here.
81 #define _PGMT_DEFAULT 0
82 #define _PGMT_WC (1UL << PG_arch_1)
83 #define _PGMT_UC_MINUS (1UL << PG_uncached)
84 #define _PGMT_WB (1UL << PG_uncached | 1UL << PG_arch_1)
85 #define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1)
86 #define _PGMT_CLEAR_MASK (~_PGMT_MASK)
88 static inline enum page_cache_mode get_page_memtype(struct page *pg)
90 unsigned long pg_flags = pg->flags & _PGMT_MASK;
92 if (pg_flags == _PGMT_DEFAULT)
94 else if (pg_flags == _PGMT_WC)
95 return _PAGE_CACHE_MODE_WC;
96 else if (pg_flags == _PGMT_UC_MINUS)
97 return _PAGE_CACHE_MODE_UC_MINUS;
99 return _PAGE_CACHE_MODE_WB;
102 static inline void set_page_memtype(struct page *pg,
103 enum page_cache_mode memtype)
105 unsigned long memtype_flags;
106 unsigned long old_flags;
107 unsigned long new_flags;
110 case _PAGE_CACHE_MODE_WC:
111 memtype_flags = _PGMT_WC;
113 case _PAGE_CACHE_MODE_UC_MINUS:
114 memtype_flags = _PGMT_UC_MINUS;
116 case _PAGE_CACHE_MODE_WB:
117 memtype_flags = _PGMT_WB;
120 memtype_flags = _PGMT_DEFAULT;
125 old_flags = pg->flags;
126 new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags;
127 } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags);
130 static inline enum page_cache_mode get_page_memtype(struct page *pg)
134 static inline void set_page_memtype(struct page *pg,
135 enum page_cache_mode memtype)
141 PAT_UC = 0, /* uncached */
142 PAT_WC = 1, /* Write combining */
143 PAT_WT = 4, /* Write Through */
144 PAT_WP = 5, /* Write Protected */
145 PAT_WB = 6, /* Write Back (default) */
146 PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */
149 #define CM(c) (_PAGE_CACHE_MODE_ ## c)
151 static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg)
153 enum page_cache_mode cache;
157 case PAT_UC: cache = CM(UC); cache_mode = "UC "; break;
158 case PAT_WC: cache = CM(WC); cache_mode = "WC "; break;
159 case PAT_WT: cache = CM(WT); cache_mode = "WT "; break;
160 case PAT_WP: cache = CM(WP); cache_mode = "WP "; break;
161 case PAT_WB: cache = CM(WB); cache_mode = "WB "; break;
162 case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break;
163 default: cache = CM(WB); cache_mode = "WB "; break;
166 memcpy(msg, cache_mode, 4);
174 * Update the cache mode to pgprot translation tables according to PAT
176 * Using lower indices is preferred, so we start with highest index.
178 void pat_init_cache_modes(u64 pat)
180 enum page_cache_mode cache;
185 for (i = 7; i >= 0; i--) {
186 cache = pat_get_cache_mode((pat >> (i * 8)) & 7,
188 update_cache_mode_entry(i, cache);
190 pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);
193 #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
195 static void pat_bsp_init(u64 pat)
200 pat_disable("PAT not supported by CPU.");
207 rdmsrl(MSR_IA32_CR_PAT, tmp_pat);
209 pat_disable("PAT MSR is 0, disabled.");
213 wrmsrl(MSR_IA32_CR_PAT, pat);
216 pat_init_cache_modes(pat);
219 static void pat_ap_init(u64 pat)
226 * If this happens we are on a secondary CPU, but switched to
227 * PAT on the boot CPU. We have no way to undo PAT.
229 panic("x86/PAT: PAT enabled, but not supported by secondary CPU\n");
232 wrmsrl(MSR_IA32_CR_PAT, pat);
238 struct cpuinfo_x86 *c = &boot_cpu_data;
240 if (!pat_enabled()) {
242 * No PAT. Emulate the PAT table that corresponds to the two
243 * cache bits, PWT (Write Through) and PCD (Cache Disable). This
244 * setup is the same as the BIOS default setup when the system
245 * has PAT but the "nopat" boot option has been specified. This
246 * emulated PAT table is used when MSR_IA32_CR_PAT returns 0.
253 * 00 0 WB : _PAGE_CACHE_MODE_WB
254 * 01 1 WT : _PAGE_CACHE_MODE_WT
255 * 10 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
256 * 11 3 UC : _PAGE_CACHE_MODE_UC
258 * NOTE: When WC or WP is used, it is redirected to UC- per
259 * the default setup in __cachemode2pte_tbl[].
261 pat = PAT(0, WB) | PAT(1, WT) | PAT(2, UC_MINUS) | PAT(3, UC) |
262 PAT(4, WB) | PAT(5, WT) | PAT(6, UC_MINUS) | PAT(7, UC);
264 } else if ((c->x86_vendor == X86_VENDOR_INTEL) &&
265 (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||
266 ((c->x86 == 0xf) && (c->x86_model <= 0x6)))) {
268 * PAT support with the lower four entries. Intel Pentium 2,
269 * 3, M, and 4 are affected by PAT errata, which makes the
270 * upper four entries unusable. To be on the safe side, we don't
278 * 000 0 WB : _PAGE_CACHE_MODE_WB
279 * 001 1 WC : _PAGE_CACHE_MODE_WC
280 * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
281 * 011 3 UC : _PAGE_CACHE_MODE_UC
284 * NOTE: When WT or WP is used, it is redirected to UC- per
285 * the default setup in __cachemode2pte_tbl[].
287 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
288 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
291 * Full PAT support. We put WT in slot 7 to improve
292 * robustness in the presence of errata that might cause
293 * the high PAT bit to be ignored. This way, a buggy slot 7
294 * access will hit slot 3, and slot 3 is UC, so at worst
295 * we lose performance without causing a correctness issue.
296 * Pentium 4 erratum N46 is an example for such an erratum,
297 * although we try not to use PAT at all on affected CPUs.
304 * 000 0 WB : _PAGE_CACHE_MODE_WB
305 * 001 1 WC : _PAGE_CACHE_MODE_WC
306 * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
307 * 011 3 UC : _PAGE_CACHE_MODE_UC
308 * 100 4 WB : Reserved
309 * 101 5 WC : Reserved
310 * 110 6 UC-: Reserved
311 * 111 7 WT : _PAGE_CACHE_MODE_WT
313 * The reserved slots are unused, but mapped to their
314 * corresponding types in the presence of PAT errata.
316 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
317 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT);
320 if (!boot_cpu_done) {
322 boot_cpu_done = true;
330 static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */
333 * Does intersection of PAT memory type and MTRR memory type and returns
334 * the resulting memory type as PAT understands it.
335 * (Type in pat and mtrr will not have same value)
336 * The intersection is based on "Effective Memory Type" tables in IA-32
339 static unsigned long pat_x_mtrr_type(u64 start, u64 end,
340 enum page_cache_mode req_type)
343 * Look for MTRR hint to get the effective type in case where PAT
346 if (req_type == _PAGE_CACHE_MODE_WB) {
347 u8 mtrr_type, uniform;
349 mtrr_type = mtrr_type_lookup(start, end, &uniform);
350 if (mtrr_type != MTRR_TYPE_WRBACK)
351 return _PAGE_CACHE_MODE_UC_MINUS;
353 return _PAGE_CACHE_MODE_WB;
359 struct pagerange_state {
360 unsigned long cur_pfn;
366 pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg)
368 struct pagerange_state *state = arg;
370 state->not_ram |= initial_pfn > state->cur_pfn;
371 state->ram |= total_nr_pages > 0;
372 state->cur_pfn = initial_pfn + total_nr_pages;
374 return state->ram && state->not_ram;
377 static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)
380 unsigned long start_pfn = start >> PAGE_SHIFT;
381 unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
382 struct pagerange_state state = {start_pfn, 0, 0};
385 * For legacy reasons, physical address range in the legacy ISA
386 * region is tracked as non-RAM. This will allow users of
387 * /dev/mem to map portions of legacy ISA region, even when
388 * some of those portions are listed(or not even listed) with
389 * different e820 types(RAM/reserved/..)
391 if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT)
392 start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT;
394 if (start_pfn < end_pfn) {
395 ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn,
396 &state, pagerange_is_ram_callback);
399 return (ret > 0) ? -1 : (state.ram ? 1 : 0);
403 * For RAM pages, we use page flags to mark the pages with appropriate type.
404 * Here we do two pass:
405 * - Find the memtype of all the pages in the range, look for any conflicts
406 * - In case of no conflicts, set the new memtype for pages in the range
408 static int reserve_ram_pages_type(u64 start, u64 end,
409 enum page_cache_mode req_type,
410 enum page_cache_mode *new_type)
415 if (req_type == _PAGE_CACHE_MODE_UC) {
416 /* We do not support strong UC */
418 req_type = _PAGE_CACHE_MODE_UC_MINUS;
421 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
422 enum page_cache_mode type;
424 page = pfn_to_page(pfn);
425 type = get_page_memtype(page);
427 pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",
428 start, end - 1, type, req_type);
437 *new_type = req_type;
439 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
440 page = pfn_to_page(pfn);
441 set_page_memtype(page, req_type);
446 static int free_ram_pages_type(u64 start, u64 end)
451 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
452 page = pfn_to_page(pfn);
453 set_page_memtype(page, -1);
459 * req_type typically has one of the:
460 * - _PAGE_CACHE_MODE_WB
461 * - _PAGE_CACHE_MODE_WC
462 * - _PAGE_CACHE_MODE_UC_MINUS
463 * - _PAGE_CACHE_MODE_UC
465 * If new_type is NULL, function will return an error if it cannot reserve the
466 * region with req_type. If new_type is non-NULL, function will return
467 * available type in new_type in case of no error. In case of any error
468 * it will return a negative return value.
470 int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type,
471 enum page_cache_mode *new_type)
474 enum page_cache_mode actual_type;
478 BUG_ON(start >= end); /* end is exclusive */
480 if (!pat_enabled()) {
481 /* This is identical to page table setting without PAT */
483 *new_type = req_type;
487 /* Low ISA region is always mapped WB in page table. No need to track */
488 if (x86_platform.is_untracked_pat_range(start, end)) {
490 *new_type = _PAGE_CACHE_MODE_WB;
495 * Call mtrr_lookup to get the type hint. This is an
496 * optimization for /dev/mem mmap'ers into WB memory (BIOS
497 * tools and ACPI tools). Use WB request for WB memory and use
498 * UC_MINUS otherwise.
500 actual_type = pat_x_mtrr_type(start, end, req_type);
503 *new_type = actual_type;
505 is_range_ram = pat_pagerange_is_ram(start, end);
506 if (is_range_ram == 1) {
508 err = reserve_ram_pages_type(start, end, req_type, new_type);
511 } else if (is_range_ram < 0) {
515 new = kzalloc(sizeof(struct memtype), GFP_KERNEL);
521 new->type = actual_type;
523 spin_lock(&memtype_lock);
525 err = rbt_memtype_check_insert(new, new_type);
527 pr_info("x86/PAT: reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n",
529 cattr_name(new->type), cattr_name(req_type));
531 spin_unlock(&memtype_lock);
536 spin_unlock(&memtype_lock);
538 dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n",
539 start, end - 1, cattr_name(new->type), cattr_name(req_type),
540 new_type ? cattr_name(*new_type) : "-");
545 int free_memtype(u64 start, u64 end)
549 struct memtype *entry;
554 /* Low ISA region is always mapped WB. No need to track */
555 if (x86_platform.is_untracked_pat_range(start, end))
558 is_range_ram = pat_pagerange_is_ram(start, end);
559 if (is_range_ram == 1) {
561 err = free_ram_pages_type(start, end);
564 } else if (is_range_ram < 0) {
568 spin_lock(&memtype_lock);
569 entry = rbt_memtype_erase(start, end);
570 spin_unlock(&memtype_lock);
573 pr_info("x86/PAT: %s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n",
574 current->comm, current->pid, start, end - 1);
580 dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1);
587 * lookup_memtype - Looksup the memory type for a physical address
588 * @paddr: physical address of which memory type needs to be looked up
590 * Only to be called when PAT is enabled
592 * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS
593 * or _PAGE_CACHE_MODE_UC
595 static enum page_cache_mode lookup_memtype(u64 paddr)
597 enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB;
598 struct memtype *entry;
600 if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE))
603 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {
605 page = pfn_to_page(paddr >> PAGE_SHIFT);
606 rettype = get_page_memtype(page);
608 * -1 from get_page_memtype() implies RAM page is in its
609 * default state and not reserved, and hence of type WB
612 rettype = _PAGE_CACHE_MODE_WB;
617 spin_lock(&memtype_lock);
619 entry = rbt_memtype_lookup(paddr);
621 rettype = entry->type;
623 rettype = _PAGE_CACHE_MODE_UC_MINUS;
625 spin_unlock(&memtype_lock);
630 * io_reserve_memtype - Request a memory type mapping for a region of memory
631 * @start: start (physical address) of the region
632 * @end: end (physical address) of the region
633 * @type: A pointer to memtype, with requested type. On success, requested
634 * or any other compatible type that was available for the region is returned
636 * On success, returns 0
637 * On failure, returns non-zero
639 int io_reserve_memtype(resource_size_t start, resource_size_t end,
640 enum page_cache_mode *type)
642 resource_size_t size = end - start;
643 enum page_cache_mode req_type = *type;
644 enum page_cache_mode new_type;
647 WARN_ON_ONCE(iomem_map_sanity_check(start, size));
649 ret = reserve_memtype(start, end, req_type, &new_type);
653 if (!is_new_memtype_allowed(start, size, req_type, new_type))
656 if (kernel_map_sync_memtype(start, size, new_type) < 0)
663 free_memtype(start, end);
670 * io_free_memtype - Release a memory type mapping for a region of memory
671 * @start: start (physical address) of the region
672 * @end: end (physical address) of the region
674 void io_free_memtype(resource_size_t start, resource_size_t end)
676 free_memtype(start, end);
679 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
680 unsigned long size, pgprot_t vma_prot)
685 #ifdef CONFIG_STRICT_DEVMEM
686 /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */
687 static inline int range_is_allowed(unsigned long pfn, unsigned long size)
692 /* This check is needed to avoid cache aliasing when PAT is enabled */
693 static inline int range_is_allowed(unsigned long pfn, unsigned long size)
695 u64 from = ((u64)pfn) << PAGE_SHIFT;
696 u64 to = from + size;
702 while (cursor < to) {
703 if (!devmem_is_allowed(pfn)) {
704 pr_info("x86/PAT: Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n",
705 current->comm, from, to - 1);
713 #endif /* CONFIG_STRICT_DEVMEM */
715 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
716 unsigned long size, pgprot_t *vma_prot)
718 enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB;
720 if (!range_is_allowed(pfn, size))
723 if (file->f_flags & O_DSYNC)
724 pcm = _PAGE_CACHE_MODE_UC_MINUS;
728 * On the PPro and successors, the MTRRs are used to set
729 * memory types for physical addresses outside main memory,
730 * so blindly setting UC or PWT on those pages is wrong.
731 * For Pentiums and earlier, the surround logic should disable
732 * caching for the high addresses through the KEN pin, but
733 * we maintain the tradition of paranoia in this code.
735 if (!pat_enabled() &&
736 !(boot_cpu_has(X86_FEATURE_MTRR) ||
737 boot_cpu_has(X86_FEATURE_K6_MTRR) ||
738 boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||
739 boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) &&
740 (pfn << PAGE_SHIFT) >= __pa(high_memory)) {
741 pcm = _PAGE_CACHE_MODE_UC;
745 *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) |
746 cachemode2protval(pcm));
751 * Change the memory type for the physial address range in kernel identity
752 * mapping space if that range is a part of identity map.
754 int kernel_map_sync_memtype(u64 base, unsigned long size,
755 enum page_cache_mode pcm)
759 if (base > __pa(high_memory-1))
763 * some areas in the middle of the kernel identity range
764 * are not mapped, like the PCI space.
766 if (!page_is_ram(base >> PAGE_SHIFT))
769 id_sz = (__pa(high_memory-1) <= base + size) ?
770 __pa(high_memory) - base :
773 if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) {
774 pr_info("x86/PAT: %s:%d ioremap_change_attr failed %s for [mem %#010Lx-%#010Lx]\n",
775 current->comm, current->pid,
777 base, (unsigned long long)(base + size-1));
784 * Internal interface to reserve a range of physical memory with prot.
785 * Reserved non RAM regions only and after successful reserve_memtype,
786 * this func also keeps identity mapping (if any) in sync with this new prot.
788 static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
793 enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot);
794 enum page_cache_mode pcm = want_pcm;
796 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
799 * reserve_pfn_range() for RAM pages. We do not refcount to keep
800 * track of number of mappings of RAM pages. We can assert that
801 * the type requested matches the type of first page in the range.
807 pcm = lookup_memtype(paddr);
808 if (want_pcm != pcm) {
809 pr_warn("x86/PAT: %s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n",
810 current->comm, current->pid,
811 cattr_name(want_pcm),
812 (unsigned long long)paddr,
813 (unsigned long long)(paddr + size - 1),
815 *vma_prot = __pgprot((pgprot_val(*vma_prot) &
816 (~_PAGE_CACHE_MASK)) |
817 cachemode2protval(pcm));
822 ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm);
826 if (pcm != want_pcm) {
828 !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) {
829 free_memtype(paddr, paddr + size);
830 pr_err("x86/PAT: %s:%d map pfn expected mapping type %s for [mem %#010Lx-%#010Lx], got %s\n",
831 current->comm, current->pid,
832 cattr_name(want_pcm),
833 (unsigned long long)paddr,
834 (unsigned long long)(paddr + size - 1),
839 * We allow returning different type than the one requested in
842 *vma_prot = __pgprot((pgprot_val(*vma_prot) &
843 (~_PAGE_CACHE_MASK)) |
844 cachemode2protval(pcm));
847 if (kernel_map_sync_memtype(paddr, size, pcm) < 0) {
848 free_memtype(paddr, paddr + size);
855 * Internal interface to free a range of physical memory.
856 * Frees non RAM regions only.
858 static void free_pfn_range(u64 paddr, unsigned long size)
862 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
864 free_memtype(paddr, paddr + size);
868 * track_pfn_copy is called when vma that is covering the pfnmap gets
869 * copied through copy_page_range().
871 * If the vma has a linear pfn mapping for the entire range, we get the prot
872 * from pte and reserve the entire vma range with single reserve_pfn_range call.
874 int track_pfn_copy(struct vm_area_struct *vma)
876 resource_size_t paddr;
878 unsigned long vma_size = vma->vm_end - vma->vm_start;
881 if (vma->vm_flags & VM_PAT) {
883 * reserve the whole chunk covered by vma. We need the
884 * starting address and protection from pte.
886 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
890 pgprot = __pgprot(prot);
891 return reserve_pfn_range(paddr, vma_size, &pgprot, 1);
898 * prot is passed in as a parameter for the new mapping. If the vma has a
899 * linear pfn mapping for the entire range reserve the entire vma range with
900 * single reserve_pfn_range call.
902 int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
903 unsigned long pfn, unsigned long addr, unsigned long size)
905 resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT;
906 enum page_cache_mode pcm;
908 /* reserve the whole chunk starting from paddr */
909 if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) {
912 ret = reserve_pfn_range(paddr, size, prot, 0);
914 vma->vm_flags |= VM_PAT;
922 * For anything smaller than the vma size we set prot based on the
925 pcm = lookup_memtype(paddr);
927 /* Check memtype for the remaining pages */
928 while (size > PAGE_SIZE) {
931 if (pcm != lookup_memtype(paddr))
935 *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) |
936 cachemode2protval(pcm));
941 int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
944 enum page_cache_mode pcm;
949 /* Set prot based on lookup */
950 pcm = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT);
951 *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) |
952 cachemode2protval(pcm));
958 * untrack_pfn is called while unmapping a pfnmap for a region.
959 * untrack can be called for a specific region indicated by pfn and size or
960 * can be for the entire vma (in which case pfn, size are zero).
962 void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
965 resource_size_t paddr;
968 if (!(vma->vm_flags & VM_PAT))
971 /* free the chunk starting from pfn or the whole chunk */
972 paddr = (resource_size_t)pfn << PAGE_SHIFT;
973 if (!paddr && !size) {
974 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
979 size = vma->vm_end - vma->vm_start;
981 free_pfn_range(paddr, size);
982 vma->vm_flags &= ~VM_PAT;
985 pgprot_t pgprot_writecombine(pgprot_t prot)
987 return __pgprot(pgprot_val(prot) |
988 cachemode2protval(_PAGE_CACHE_MODE_WC));
990 EXPORT_SYMBOL_GPL(pgprot_writecombine);
992 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
994 static struct memtype *memtype_get_idx(loff_t pos)
996 struct memtype *print_entry;
999 print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL);
1003 spin_lock(&memtype_lock);
1004 ret = rbt_memtype_copy_nth_element(print_entry, pos);
1005 spin_unlock(&memtype_lock);
1015 static void *memtype_seq_start(struct seq_file *seq, loff_t *pos)
1019 seq_puts(seq, "PAT memtype list:\n");
1022 return memtype_get_idx(*pos);
1025 static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos)
1028 return memtype_get_idx(*pos);
1031 static void memtype_seq_stop(struct seq_file *seq, void *v)
1035 static int memtype_seq_show(struct seq_file *seq, void *v)
1037 struct memtype *print_entry = (struct memtype *)v;
1039 seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type),
1040 print_entry->start, print_entry->end);
1046 static const struct seq_operations memtype_seq_ops = {
1047 .start = memtype_seq_start,
1048 .next = memtype_seq_next,
1049 .stop = memtype_seq_stop,
1050 .show = memtype_seq_show,
1053 static int memtype_seq_open(struct inode *inode, struct file *file)
1055 return seq_open(file, &memtype_seq_ops);
1058 static const struct file_operations memtype_fops = {
1059 .open = memtype_seq_open,
1061 .llseek = seq_lseek,
1062 .release = seq_release,
1065 static int __init pat_memtype_list_init(void)
1067 if (pat_enabled()) {
1068 debugfs_create_file("pat_memtype_list", S_IRUSR,
1069 arch_debugfs_dir, NULL, &memtype_fops);
1074 late_initcall(pat_memtype_list_init);
1076 #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */