2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 #define pr_fmt(fmt) "ACPI: " fmt
28 #include <linux/module.h>
29 #include <linux/acpi.h>
30 #include <linux/dmi.h>
31 #include <linux/sched.h> /* need_resched() */
32 #include <linux/tick.h>
33 #include <linux/cpuidle.h>
34 #include <linux/syscore_ops.h>
35 #include <acpi/processor.h>
38 * Include the apic definitions for x86 to have the APIC timer related defines
39 * available also for UP (on SMP it gets magically included via linux/smp.h).
40 * asm/acpi.h is not an option, as it would require more include magic. Also
41 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
47 #define ACPI_PROCESSOR_CLASS "processor"
48 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
49 ACPI_MODULE_NAME("processor_idle");
51 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
52 module_param(max_cstate, uint, 0000);
53 static unsigned int nocst __read_mostly;
54 module_param(nocst, uint, 0000);
55 static int bm_check_disable __read_mostly;
56 module_param(bm_check_disable, uint, 0000);
58 static unsigned int latency_factor __read_mostly = 2;
59 module_param(latency_factor, uint, 0644);
61 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
63 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX],
66 static int disabled_by_idle_boot_param(void)
68 return boot_option_idle_override == IDLE_POLL ||
69 boot_option_idle_override == IDLE_HALT;
73 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
74 * For now disable this. Probably a bug somewhere else.
76 * To skip this limit, boot/load with a large max_cstate limit.
78 static int set_max_cstate(const struct dmi_system_id *id)
80 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
83 pr_notice("%s detected - limiting to C%ld max_cstate."
84 " Override with \"processor.max_cstate=%d\"\n", id->ident,
85 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
87 max_cstate = (long)id->driver_data;
92 static const struct dmi_system_id processor_power_dmi_table[] = {
93 { set_max_cstate, "Clevo 5600D", {
94 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
95 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
97 { set_max_cstate, "Pavilion zv5000", {
98 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
99 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
101 { set_max_cstate, "Asus L8400B", {
102 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
103 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
110 * Callers should disable interrupts before the call and enable
111 * interrupts after return.
113 static void acpi_safe_halt(void)
115 if (!tif_need_resched()) {
121 #ifdef ARCH_APICTIMER_STOPS_ON_C3
124 * Some BIOS implementations switch to C3 in the published C2 state.
125 * This seems to be a common problem on AMD boxen, but other vendors
126 * are affected too. We pick the most conservative approach: we assume
127 * that the local APIC stops in both C2 and C3.
129 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
130 struct acpi_processor_cx *cx)
132 struct acpi_processor_power *pwr = &pr->power;
133 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
135 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
138 if (amd_e400_c1e_detected)
139 type = ACPI_STATE_C1;
142 * Check, if one of the previous states already marked the lapic
145 if (pwr->timer_broadcast_on_state < state)
148 if (cx->type >= type)
149 pr->power.timer_broadcast_on_state = state;
152 static void __lapic_timer_propagate_broadcast(void *arg)
154 struct acpi_processor *pr = (struct acpi_processor *) arg;
156 if (pr->power.timer_broadcast_on_state < INT_MAX)
157 tick_broadcast_enable();
159 tick_broadcast_disable();
162 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
164 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
168 /* Power(C) State timer broadcast control */
169 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
170 struct acpi_processor_cx *cx,
173 int state = cx - pr->power.states;
175 if (state >= pr->power.timer_broadcast_on_state) {
177 tick_broadcast_enter();
179 tick_broadcast_exit();
185 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
186 struct acpi_processor_cx *cstate) { }
187 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
188 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
189 struct acpi_processor_cx *cx,
196 #ifdef CONFIG_PM_SLEEP
197 static u32 saved_bm_rld;
199 static int acpi_processor_suspend(void)
201 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
205 static void acpi_processor_resume(void)
207 u32 resumed_bm_rld = 0;
209 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
210 if (resumed_bm_rld == saved_bm_rld)
213 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
216 static struct syscore_ops acpi_processor_syscore_ops = {
217 .suspend = acpi_processor_suspend,
218 .resume = acpi_processor_resume,
221 void acpi_processor_syscore_init(void)
223 register_syscore_ops(&acpi_processor_syscore_ops);
226 void acpi_processor_syscore_exit(void)
228 unregister_syscore_ops(&acpi_processor_syscore_ops);
230 #endif /* CONFIG_PM_SLEEP */
232 #if defined(CONFIG_X86)
233 static void tsc_check_state(int state)
235 switch (boot_cpu_data.x86_vendor) {
237 case X86_VENDOR_INTEL:
239 * AMD Fam10h TSC will tick in all
240 * C/P/S0/S1 states when this bit is set.
242 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
247 /* TSC could halt in idle, so notify users */
248 if (state > ACPI_STATE_C1)
249 mark_tsc_unstable("TSC halts in idle");
253 static void tsc_check_state(int state) { return; }
256 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
262 /* if info is obtained from pblk/fadt, type equals state */
263 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
264 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
266 #ifndef CONFIG_HOTPLUG_CPU
268 * Check for P_LVL2_UP flag before entering C2 and above on
271 if ((num_online_cpus() > 1) &&
272 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
276 /* determine C2 and C3 address from pblk */
277 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
278 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
280 /* determine latencies from FADT */
281 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
282 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
285 * FADT specified C2 latency must be less than or equal to
288 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
289 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
290 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
292 pr->power.states[ACPI_STATE_C2].address = 0;
296 * FADT supplied C3 latency must be less than or equal to
299 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
300 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
301 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
303 pr->power.states[ACPI_STATE_C3].address = 0;
306 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
307 "lvl2[0x%08x] lvl3[0x%08x]\n",
308 pr->power.states[ACPI_STATE_C2].address,
309 pr->power.states[ACPI_STATE_C3].address));
314 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
316 if (!pr->power.states[ACPI_STATE_C1].valid) {
317 /* set the first C-State to C1 */
318 /* all processors need to support C1 */
319 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
320 pr->power.states[ACPI_STATE_C1].valid = 1;
321 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
323 /* the C0 state only exists as a filler in our array */
324 pr->power.states[ACPI_STATE_C0].valid = 1;
328 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
334 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
335 union acpi_object *cst;
343 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
344 if (ACPI_FAILURE(status)) {
345 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
349 cst = buffer.pointer;
351 /* There must be at least 2 elements */
352 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
353 pr_err("not enough elements in _CST\n");
358 count = cst->package.elements[0].integer.value;
360 /* Validate number of power states. */
361 if (count < 1 || count != cst->package.count - 1) {
362 pr_err("count given by _CST is not valid\n");
367 /* Tell driver that at least _CST is supported. */
368 pr->flags.has_cst = 1;
370 for (i = 1; i <= count; i++) {
371 union acpi_object *element;
372 union acpi_object *obj;
373 struct acpi_power_register *reg;
374 struct acpi_processor_cx cx;
376 memset(&cx, 0, sizeof(cx));
378 element = &(cst->package.elements[i]);
379 if (element->type != ACPI_TYPE_PACKAGE)
382 if (element->package.count != 4)
385 obj = &(element->package.elements[0]);
387 if (obj->type != ACPI_TYPE_BUFFER)
390 reg = (struct acpi_power_register *)obj->buffer.pointer;
392 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
393 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
396 /* There should be an easy way to extract an integer... */
397 obj = &(element->package.elements[1]);
398 if (obj->type != ACPI_TYPE_INTEGER)
401 cx.type = obj->integer.value;
403 * Some buggy BIOSes won't list C1 in _CST -
404 * Let acpi_processor_get_power_info_default() handle them later
406 if (i == 1 && cx.type != ACPI_STATE_C1)
409 cx.address = reg->address;
410 cx.index = current_count + 1;
412 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
413 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
414 if (acpi_processor_ffh_cstate_probe
415 (pr->id, &cx, reg) == 0) {
416 cx.entry_method = ACPI_CSTATE_FFH;
417 } else if (cx.type == ACPI_STATE_C1) {
419 * C1 is a special case where FIXED_HARDWARE
420 * can be handled in non-MWAIT way as well.
421 * In that case, save this _CST entry info.
422 * Otherwise, ignore this info and continue.
424 cx.entry_method = ACPI_CSTATE_HALT;
425 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
429 if (cx.type == ACPI_STATE_C1 &&
430 (boot_option_idle_override == IDLE_NOMWAIT)) {
432 * In most cases the C1 space_id obtained from
433 * _CST object is FIXED_HARDWARE access mode.
434 * But when the option of idle=halt is added,
435 * the entry_method type should be changed from
436 * CSTATE_FFH to CSTATE_HALT.
437 * When the option of idle=nomwait is added,
438 * the C1 entry_method type should be
441 cx.entry_method = ACPI_CSTATE_HALT;
442 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
445 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
449 if (cx.type == ACPI_STATE_C1) {
453 obj = &(element->package.elements[2]);
454 if (obj->type != ACPI_TYPE_INTEGER)
457 cx.latency = obj->integer.value;
459 obj = &(element->package.elements[3]);
460 if (obj->type != ACPI_TYPE_INTEGER)
464 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
467 * We support total ACPI_PROCESSOR_MAX_POWER - 1
468 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
470 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
471 pr_warn("Limiting number of power states to max (%d)\n",
472 ACPI_PROCESSOR_MAX_POWER);
473 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
478 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
481 /* Validate number of power states discovered */
482 if (current_count < 2)
486 kfree(buffer.pointer);
491 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
492 struct acpi_processor_cx *cx)
494 static int bm_check_flag = -1;
495 static int bm_control_flag = -1;
502 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
503 * DMA transfers are used by any ISA device to avoid livelock.
504 * Note that we could disable Type-F DMA (as recommended by
505 * the erratum), but this is known to disrupt certain ISA
506 * devices thus we take the conservative approach.
508 else if (errata.piix4.fdma) {
509 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
510 "C3 not supported on PIIX4 with Type-F DMA\n"));
514 /* All the logic here assumes flags.bm_check is same across all CPUs */
515 if (bm_check_flag == -1) {
516 /* Determine whether bm_check is needed based on CPU */
517 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
518 bm_check_flag = pr->flags.bm_check;
519 bm_control_flag = pr->flags.bm_control;
521 pr->flags.bm_check = bm_check_flag;
522 pr->flags.bm_control = bm_control_flag;
525 if (pr->flags.bm_check) {
526 if (!pr->flags.bm_control) {
527 if (pr->flags.has_cst != 1) {
528 /* bus mastering control is necessary */
529 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
530 "C3 support requires BM control\n"));
533 /* Here we enter C3 without bus mastering */
534 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
535 "C3 support without BM control\n"));
540 * WBINVD should be set in fadt, for C3 state to be
541 * supported on when bm_check is not required.
543 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
544 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
545 "Cache invalidation should work properly"
546 " for C3 to be enabled on SMP systems\n"));
552 * Otherwise we've met all of our C3 requirements.
553 * Normalize the C3 latency to expidite policy. Enable
554 * checking of bus mastering status (bm_check) so we can
555 * use this in our C3 policy
560 * On older chipsets, BM_RLD needs to be set
561 * in order for Bus Master activity to wake the
562 * system from C3. Newer chipsets handle DMA
563 * during C3 automatically and BM_RLD is a NOP.
564 * In either case, the proper way to
565 * handle BM_RLD is to set it and leave it set.
567 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
572 static int acpi_processor_power_verify(struct acpi_processor *pr)
575 unsigned int working = 0;
577 pr->power.timer_broadcast_on_state = INT_MAX;
579 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
580 struct acpi_processor_cx *cx = &pr->power.states[i];
594 acpi_processor_power_verify_c3(pr, cx);
600 lapic_timer_check_state(i, pr, cx);
601 tsc_check_state(cx->type);
605 lapic_timer_propagate_broadcast(pr);
610 static int acpi_processor_get_power_info(struct acpi_processor *pr)
616 /* NOTE: the idle thread may not be running while calling
619 /* Zero initialize all the C-states info. */
620 memset(pr->power.states, 0, sizeof(pr->power.states));
622 result = acpi_processor_get_power_info_cst(pr);
623 if (result == -ENODEV)
624 result = acpi_processor_get_power_info_fadt(pr);
629 acpi_processor_get_power_info_default(pr);
631 pr->power.count = acpi_processor_power_verify(pr);
634 * if one state of type C2 or C3 is available, mark this
635 * CPU as being "idle manageable"
637 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
638 if (pr->power.states[i].valid) {
640 if (pr->power.states[i].type >= ACPI_STATE_C2)
649 * acpi_idle_bm_check - checks if bus master activity was detected
651 static int acpi_idle_bm_check(void)
655 if (bm_check_disable)
658 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
660 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
662 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
663 * the true state of bus mastering activity; forcing us to
664 * manually check the BMIDEA bit of each IDE channel.
666 else if (errata.piix4.bmisx) {
667 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
668 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
675 * acpi_idle_do_entry - enter idle state using the appropriate method
678 * Caller disables interrupt before call and enables interrupt after return.
680 static void acpi_idle_do_entry(struct acpi_processor_cx *cx)
682 if (cx->entry_method == ACPI_CSTATE_FFH) {
683 /* Call into architectural FFH based C-state */
684 acpi_processor_ffh_cstate_enter(cx);
685 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
688 /* IO port based C-state */
690 /* Dummy wait op - must do something useless after P_LVL2 read
691 because chipsets cannot guarantee that STPCLK# signal
692 gets asserted in time to freeze execution properly. */
693 inl(acpi_gbl_FADT.xpm_timer_block.address);
698 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
699 * @dev: the target CPU
700 * @index: the index of suggested state
702 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
704 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
706 ACPI_FLUSH_CPU_CACHE();
710 if (cx->entry_method == ACPI_CSTATE_HALT)
712 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
714 /* See comment in acpi_idle_do_entry() */
715 inl(acpi_gbl_FADT.xpm_timer_block.address);
724 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
726 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
727 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
730 static int c3_cpu_count;
731 static DEFINE_RAW_SPINLOCK(c3_lock);
734 * acpi_idle_enter_bm - enters C3 with proper BM handling
735 * @pr: Target processor
736 * @cx: Target state context
737 * @timer_bc: Whether or not to change timer mode to broadcast
739 static void acpi_idle_enter_bm(struct acpi_processor *pr,
740 struct acpi_processor_cx *cx, bool timer_bc)
742 acpi_unlazy_tlb(smp_processor_id());
745 * Must be done before busmaster disable as we might need to
749 lapic_timer_state_broadcast(pr, cx, 1);
753 * bm_check implies we need ARB_DIS
754 * bm_control implies whether we can do ARB_DIS
756 * That leaves a case where bm_check is set and bm_control is
757 * not set. In that case we cannot do much, we enter C3
758 * without doing anything.
760 if (pr->flags.bm_control) {
761 raw_spin_lock(&c3_lock);
763 /* Disable bus master arbitration when all CPUs are in C3 */
764 if (c3_cpu_count == num_online_cpus())
765 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
766 raw_spin_unlock(&c3_lock);
769 acpi_idle_do_entry(cx);
771 /* Re-enable bus master arbitration */
772 if (pr->flags.bm_control) {
773 raw_spin_lock(&c3_lock);
774 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
776 raw_spin_unlock(&c3_lock);
780 lapic_timer_state_broadcast(pr, cx, 0);
783 static int acpi_idle_enter(struct cpuidle_device *dev,
784 struct cpuidle_driver *drv, int index)
786 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
787 struct acpi_processor *pr;
789 pr = __this_cpu_read(processors);
793 if (cx->type != ACPI_STATE_C1) {
794 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
795 index = CPUIDLE_DRIVER_STATE_START;
796 cx = per_cpu(acpi_cstate[index], dev->cpu);
797 } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) {
798 if (cx->bm_sts_skip || !acpi_idle_bm_check()) {
799 acpi_idle_enter_bm(pr, cx, true);
801 } else if (drv->safe_state_index >= 0) {
802 index = drv->safe_state_index;
803 cx = per_cpu(acpi_cstate[index], dev->cpu);
811 lapic_timer_state_broadcast(pr, cx, 1);
813 if (cx->type == ACPI_STATE_C3)
814 ACPI_FLUSH_CPU_CACHE();
816 acpi_idle_do_entry(cx);
818 lapic_timer_state_broadcast(pr, cx, 0);
823 static void acpi_idle_enter_freeze(struct cpuidle_device *dev,
824 struct cpuidle_driver *drv, int index)
826 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
828 if (cx->type == ACPI_STATE_C3) {
829 struct acpi_processor *pr = __this_cpu_read(processors);
834 if (pr->flags.bm_check) {
835 acpi_idle_enter_bm(pr, cx, false);
838 ACPI_FLUSH_CPU_CACHE();
841 acpi_idle_do_entry(cx);
844 struct cpuidle_driver acpi_idle_driver = {
846 .owner = THIS_MODULE,
850 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
851 * device i.e. per-cpu data
853 * @pr: the ACPI processor
854 * @dev : the cpuidle device
856 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
857 struct cpuidle_device *dev)
859 int i, count = CPUIDLE_DRIVER_STATE_START;
860 struct acpi_processor_cx *cx;
862 if (!pr->flags.power_setup_done)
865 if (pr->flags.power == 0) {
877 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
878 cx = &pr->power.states[i];
883 per_cpu(acpi_cstate[count], dev->cpu) = cx;
886 if (count == CPUIDLE_STATE_MAX)
897 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
898 * global state data i.e. idle routines
900 * @pr: the ACPI processor
902 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
904 int i, count = CPUIDLE_DRIVER_STATE_START;
905 struct acpi_processor_cx *cx;
906 struct cpuidle_state *state;
907 struct cpuidle_driver *drv = &acpi_idle_driver;
909 if (!pr->flags.power_setup_done)
912 if (pr->flags.power == 0)
915 drv->safe_state_index = -1;
916 for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
917 drv->states[i].name[0] = '\0';
918 drv->states[i].desc[0] = '\0';
924 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
925 cx = &pr->power.states[i];
930 state = &drv->states[count];
931 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
932 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
933 state->exit_latency = cx->latency;
934 state->target_residency = cx->latency * latency_factor;
935 state->enter = acpi_idle_enter;
938 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
939 state->enter_dead = acpi_idle_play_dead;
940 drv->safe_state_index = count;
943 * Halt-induced C1 is not good for ->enter_freeze, because it
944 * re-enables interrupts on exit. Moreover, C1 is generally not
945 * particularly interesting from the suspend-to-idle angle, so
946 * avoid C1 and the situations in which we may need to fall back
949 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
950 state->enter_freeze = acpi_idle_enter_freeze;
953 if (count == CPUIDLE_STATE_MAX)
957 drv->state_count = count;
965 int acpi_processor_hotplug(struct acpi_processor *pr)
968 struct cpuidle_device *dev;
970 if (disabled_by_idle_boot_param())
976 if (!pr->flags.power_setup_done)
979 dev = per_cpu(acpi_cpuidle_device, pr->id);
980 cpuidle_pause_and_lock();
981 cpuidle_disable_device(dev);
982 acpi_processor_get_power_info(pr);
983 if (pr->flags.power) {
984 acpi_processor_setup_cpuidle_cx(pr, dev);
985 ret = cpuidle_enable_device(dev);
987 cpuidle_resume_and_unlock();
992 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
995 struct acpi_processor *_pr;
996 struct cpuidle_device *dev;
998 if (disabled_by_idle_boot_param())
1004 if (!pr->flags.power_setup_done)
1008 * FIXME: Design the ACPI notification to make it once per
1009 * system instead of once per-cpu. This condition is a hack
1010 * to make the code that updates C-States be called once.
1013 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1015 /* Protect against cpu-hotplug */
1017 cpuidle_pause_and_lock();
1019 /* Disable all cpuidle devices */
1020 for_each_online_cpu(cpu) {
1021 _pr = per_cpu(processors, cpu);
1022 if (!_pr || !_pr->flags.power_setup_done)
1024 dev = per_cpu(acpi_cpuidle_device, cpu);
1025 cpuidle_disable_device(dev);
1028 /* Populate Updated C-state information */
1029 acpi_processor_get_power_info(pr);
1030 acpi_processor_setup_cpuidle_states(pr);
1032 /* Enable all cpuidle devices */
1033 for_each_online_cpu(cpu) {
1034 _pr = per_cpu(processors, cpu);
1035 if (!_pr || !_pr->flags.power_setup_done)
1037 acpi_processor_get_power_info(_pr);
1038 if (_pr->flags.power) {
1039 dev = per_cpu(acpi_cpuidle_device, cpu);
1040 acpi_processor_setup_cpuidle_cx(_pr, dev);
1041 cpuidle_enable_device(dev);
1044 cpuidle_resume_and_unlock();
1051 static int acpi_processor_registered;
1053 int acpi_processor_power_init(struct acpi_processor *pr)
1057 struct cpuidle_device *dev;
1058 static int first_run;
1060 if (disabled_by_idle_boot_param())
1064 dmi_check_system(processor_power_dmi_table);
1065 max_cstate = acpi_processor_cstate_check(max_cstate);
1066 if (max_cstate < ACPI_C_STATES_MAX)
1068 "ACPI: processor limited to max C-state %d\n",
1073 if (acpi_gbl_FADT.cst_control && !nocst) {
1075 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1076 if (ACPI_FAILURE(status)) {
1077 ACPI_EXCEPTION((AE_INFO, status,
1078 "Notifying BIOS of _CST ability failed"));
1082 acpi_processor_get_power_info(pr);
1083 pr->flags.power_setup_done = 1;
1086 * Install the idle handler if processor power management is supported.
1087 * Note that we use previously set idle handler will be used on
1088 * platforms that only support C1.
1090 if (pr->flags.power) {
1091 /* Register acpi_idle_driver if not already registered */
1092 if (!acpi_processor_registered) {
1093 acpi_processor_setup_cpuidle_states(pr);
1094 retval = cpuidle_register_driver(&acpi_idle_driver);
1097 pr_debug("%s registered with cpuidle\n",
1098 acpi_idle_driver.name);
1101 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1104 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1106 acpi_processor_setup_cpuidle_cx(pr, dev);
1108 /* Register per-cpu cpuidle_device. Cpuidle driver
1109 * must already be registered before registering device
1111 retval = cpuidle_register_device(dev);
1113 if (acpi_processor_registered == 0)
1114 cpuidle_unregister_driver(&acpi_idle_driver);
1117 acpi_processor_registered++;
1122 int acpi_processor_power_exit(struct acpi_processor *pr)
1124 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1126 if (disabled_by_idle_boot_param())
1129 if (pr->flags.power) {
1130 cpuidle_unregister_device(dev);
1131 acpi_processor_registered--;
1132 if (acpi_processor_registered == 0)
1133 cpuidle_unregister_driver(&acpi_idle_driver);
1136 pr->flags.power_setup_done = 0;