2 * Register cache access API
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/slab.h>
14 #include <linux/export.h>
15 #include <linux/device.h>
16 #include <trace/events/regmap.h>
17 #include <linux/bsearch.h>
18 #include <linux/sort.h>
22 static const struct regcache_ops *cache_types[] = {
28 static int regcache_hw_init(struct regmap *map)
36 if (!map->num_reg_defaults_raw)
39 if (!map->reg_defaults_raw) {
40 u32 cache_bypass = map->cache_bypass;
41 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
43 /* Bypass the cache access till data read from HW*/
44 map->cache_bypass = 1;
45 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
48 ret = regmap_bulk_read(map, 0, tmp_buf,
49 map->num_reg_defaults_raw);
50 map->cache_bypass = cache_bypass;
55 map->reg_defaults_raw = tmp_buf;
59 /* calculate the size of reg_defaults */
60 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
61 val = regcache_get_val(map->reg_defaults_raw,
62 i, map->cache_word_size);
63 if (regmap_volatile(map, i * map->reg_stride))
68 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
70 if (!map->reg_defaults) {
75 /* fill the reg_defaults */
76 map->num_reg_defaults = count;
77 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
78 val = regcache_get_val(map->reg_defaults_raw,
79 i, map->cache_word_size);
80 if (regmap_volatile(map, i * map->reg_stride))
82 map->reg_defaults[j].reg = i * map->reg_stride;
83 map->reg_defaults[j].def = val;
91 kfree(map->reg_defaults_raw);
96 int regcache_init(struct regmap *map, const struct regmap_config *config)
102 for (i = 0; i < config->num_reg_defaults; i++)
103 if (config->reg_defaults[i].reg % map->reg_stride)
106 if (map->cache_type == REGCACHE_NONE) {
107 map->cache_bypass = true;
111 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
112 if (cache_types[i]->type == map->cache_type)
115 if (i == ARRAY_SIZE(cache_types)) {
116 dev_err(map->dev, "Could not match compress type: %d\n",
121 map->num_reg_defaults = config->num_reg_defaults;
122 map->num_reg_defaults_raw = config->num_reg_defaults_raw;
123 map->reg_defaults_raw = config->reg_defaults_raw;
124 map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
125 map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
128 map->cache_ops = cache_types[i];
130 if (!map->cache_ops->read ||
131 !map->cache_ops->write ||
132 !map->cache_ops->name)
135 /* We still need to ensure that the reg_defaults
136 * won't vanish from under us. We'll need to make
139 if (config->reg_defaults) {
140 if (!map->num_reg_defaults)
142 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
143 sizeof(struct reg_default), GFP_KERNEL);
146 map->reg_defaults = tmp_buf;
147 } else if (map->num_reg_defaults_raw) {
148 /* Some devices such as PMICs don't have cache defaults,
149 * we cope with this by reading back the HW registers and
150 * crafting the cache defaults by hand.
152 ret = regcache_hw_init(map);
157 if (!map->max_register)
158 map->max_register = map->num_reg_defaults_raw;
160 if (map->cache_ops->init) {
161 dev_dbg(map->dev, "Initializing %s cache\n",
162 map->cache_ops->name);
163 ret = map->cache_ops->init(map);
170 kfree(map->reg_defaults);
172 kfree(map->reg_defaults_raw);
177 void regcache_exit(struct regmap *map)
179 if (map->cache_type == REGCACHE_NONE)
182 BUG_ON(!map->cache_ops);
184 kfree(map->reg_defaults);
186 kfree(map->reg_defaults_raw);
188 if (map->cache_ops->exit) {
189 dev_dbg(map->dev, "Destroying %s cache\n",
190 map->cache_ops->name);
191 map->cache_ops->exit(map);
196 * regcache_read: Fetch the value of a given register from the cache.
198 * @map: map to configure.
199 * @reg: The register index.
200 * @value: The value to be returned.
202 * Return a negative value on failure, 0 on success.
204 int regcache_read(struct regmap *map,
205 unsigned int reg, unsigned int *value)
209 if (map->cache_type == REGCACHE_NONE)
212 BUG_ON(!map->cache_ops);
214 if (!regmap_volatile(map, reg)) {
215 ret = map->cache_ops->read(map, reg, value);
218 trace_regmap_reg_read_cache(map->dev, reg, *value);
227 * regcache_write: Set the value of a given register in the cache.
229 * @map: map to configure.
230 * @reg: The register index.
231 * @value: The new register value.
233 * Return a negative value on failure, 0 on success.
235 int regcache_write(struct regmap *map,
236 unsigned int reg, unsigned int value)
238 if (map->cache_type == REGCACHE_NONE)
241 BUG_ON(!map->cache_ops);
243 if (!regmap_writeable(map, reg))
246 if (!regmap_volatile(map, reg))
247 return map->cache_ops->write(map, reg, value);
253 * regcache_sync: Sync the register cache with the hardware.
255 * @map: map to configure.
257 * Any registers that should not be synced should be marked as
258 * volatile. In general drivers can choose not to use the provided
259 * syncing functionality if they so require.
261 * Return a negative value on failure, 0 on success.
263 int regcache_sync(struct regmap *map)
270 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
273 /* Remember the initial bypass state */
274 bypass = map->cache_bypass;
275 dev_dbg(map->dev, "Syncing %s cache\n",
276 map->cache_ops->name);
277 name = map->cache_ops->name;
278 trace_regcache_sync(map->dev, name, "start");
280 if (!map->cache_dirty)
283 /* Apply any patch first */
284 map->cache_bypass = 1;
285 for (i = 0; i < map->patch_regs; i++) {
286 if (map->patch[i].reg % map->reg_stride) {
290 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
292 dev_err(map->dev, "Failed to write %x = %x: %d\n",
293 map->patch[i].reg, map->patch[i].def, ret);
297 map->cache_bypass = 0;
299 ret = map->cache_ops->sync(map, 0, map->max_register);
302 map->cache_dirty = false;
305 trace_regcache_sync(map->dev, name, "stop");
306 /* Restore the bypass state */
307 map->cache_bypass = bypass;
312 EXPORT_SYMBOL_GPL(regcache_sync);
315 * regcache_sync_region: Sync part of the register cache with the hardware.
318 * @min: first register to sync
319 * @max: last register to sync
321 * Write all non-default register values in the specified region to
324 * Return a negative value on failure, 0 on success.
326 int regcache_sync_region(struct regmap *map, unsigned int min,
333 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
337 /* Remember the initial bypass state */
338 bypass = map->cache_bypass;
340 name = map->cache_ops->name;
341 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
343 trace_regcache_sync(map->dev, name, "start region");
345 if (!map->cache_dirty)
348 ret = map->cache_ops->sync(map, min, max);
351 trace_regcache_sync(map->dev, name, "stop region");
352 /* Restore the bypass state */
353 map->cache_bypass = bypass;
358 EXPORT_SYMBOL_GPL(regcache_sync_region);
361 * regcache_cache_only: Put a register map into cache only mode
363 * @map: map to configure
364 * @cache_only: flag if changes should be written to the hardware
366 * When a register map is marked as cache only writes to the register
367 * map API will only update the register cache, they will not cause
368 * any hardware changes. This is useful for allowing portions of
369 * drivers to act as though the device were functioning as normal when
370 * it is disabled for power saving reasons.
372 void regcache_cache_only(struct regmap *map, bool enable)
375 WARN_ON(map->cache_bypass && enable);
376 map->cache_only = enable;
377 trace_regmap_cache_only(map->dev, enable);
380 EXPORT_SYMBOL_GPL(regcache_cache_only);
383 * regcache_mark_dirty: Mark the register cache as dirty
387 * Mark the register cache as dirty, for example due to the device
388 * having been powered down for suspend. If the cache is not marked
389 * as dirty then the cache sync will be suppressed.
391 void regcache_mark_dirty(struct regmap *map)
394 map->cache_dirty = true;
397 EXPORT_SYMBOL_GPL(regcache_mark_dirty);
400 * regcache_cache_bypass: Put a register map into cache bypass mode
402 * @map: map to configure
403 * @cache_bypass: flag if changes should not be written to the hardware
405 * When a register map is marked with the cache bypass option, writes
406 * to the register map API will only update the hardware and not the
407 * the cache directly. This is useful when syncing the cache back to
410 void regcache_cache_bypass(struct regmap *map, bool enable)
413 WARN_ON(map->cache_only && enable);
414 map->cache_bypass = enable;
415 trace_regmap_cache_bypass(map->dev, enable);
418 EXPORT_SYMBOL_GPL(regcache_cache_bypass);
420 bool regcache_set_val(void *base, unsigned int idx,
421 unsigned int val, unsigned int word_size)
426 if (cache[idx] == val)
433 if (cache[idx] == val)
440 if (cache[idx] == val)
451 unsigned int regcache_get_val(const void *base, unsigned int idx,
452 unsigned int word_size)
459 const u8 *cache = base;
463 const u16 *cache = base;
467 const u32 *cache = base;
477 static int regcache_default_cmp(const void *a, const void *b)
479 const struct reg_default *_a = a;
480 const struct reg_default *_b = b;
482 return _a->reg - _b->reg;
485 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
487 struct reg_default key;
488 struct reg_default *r;
493 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
494 sizeof(struct reg_default), regcache_default_cmp);
497 return r - map->reg_defaults;