2 * regmap based irq_chip
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/export.h>
14 #include <linux/device.h>
15 #include <linux/regmap.h>
16 #include <linux/irq.h>
17 #include <linux/interrupt.h>
18 #include <linux/irqdomain.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/slab.h>
24 struct regmap_irq_chip_data {
26 struct irq_chip irq_chip;
29 const struct regmap_irq_chip *chip;
32 struct irq_domain *domain;
37 unsigned int *status_buf;
38 unsigned int *mask_buf;
39 unsigned int *mask_buf_def;
40 unsigned int *wake_buf;
42 unsigned int irq_reg_stride;
46 struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
49 return &data->chip->irqs[irq];
52 static void regmap_irq_lock(struct irq_data *data)
54 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
59 static void regmap_irq_sync_unlock(struct irq_data *data)
61 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
62 struct regmap *map = d->map;
66 if (d->chip->runtime_pm) {
67 ret = pm_runtime_get_sync(map->dev);
69 dev_err(map->dev, "IRQ sync failed to resume: %d\n",
74 * If there's been a change in the mask write it back to the
75 * hardware. We rely on the use of the regmap core cache to
76 * suppress pointless writes.
78 for (i = 0; i < d->chip->num_regs; i++) {
79 reg = d->chip->mask_base +
80 (i * map->reg_stride * d->irq_reg_stride);
81 if (d->chip->mask_invert)
82 ret = regmap_update_bits(d->map, reg,
83 d->mask_buf_def[i], ~d->mask_buf[i]);
85 ret = regmap_update_bits(d->map, reg,
86 d->mask_buf_def[i], d->mask_buf[i]);
88 dev_err(d->map->dev, "Failed to sync masks in %x\n",
92 if (d->chip->runtime_pm)
93 pm_runtime_put(map->dev);
95 /* If we've changed our wakeup count propagate it to the parent */
96 if (d->wake_count < 0)
97 for (i = d->wake_count; i < 0; i++)
98 irq_set_irq_wake(d->irq, 0);
99 else if (d->wake_count > 0)
100 for (i = 0; i < d->wake_count; i++)
101 irq_set_irq_wake(d->irq, 1);
105 mutex_unlock(&d->lock);
108 static void regmap_irq_enable(struct irq_data *data)
110 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
111 struct regmap *map = d->map;
112 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
114 d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask;
117 static void regmap_irq_disable(struct irq_data *data)
119 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
120 struct regmap *map = d->map;
121 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
123 d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask;
126 static int regmap_irq_set_wake(struct irq_data *data, unsigned int on)
128 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
129 struct regmap *map = d->map;
130 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
132 if (!d->chip->wake_base)
136 d->wake_buf[irq_data->reg_offset / map->reg_stride]
140 d->wake_buf[irq_data->reg_offset / map->reg_stride]
148 static const struct irq_chip regmap_irq_chip = {
149 .irq_bus_lock = regmap_irq_lock,
150 .irq_bus_sync_unlock = regmap_irq_sync_unlock,
151 .irq_disable = regmap_irq_disable,
152 .irq_enable = regmap_irq_enable,
153 .irq_set_wake = regmap_irq_set_wake,
156 static irqreturn_t regmap_irq_thread(int irq, void *d)
158 struct regmap_irq_chip_data *data = d;
159 const struct regmap_irq_chip *chip = data->chip;
160 struct regmap *map = data->map;
162 bool handled = false;
165 if (chip->runtime_pm) {
166 ret = pm_runtime_get_sync(map->dev);
168 dev_err(map->dev, "IRQ thread failed to resume: %d\n",
175 * Ignore masked IRQs and ack if we need to; we ack early so
176 * there is no race between handling and acknowleding the
177 * interrupt. We assume that typically few of the interrupts
178 * will fire simultaneously so don't worry about overhead from
179 * doing a write per register.
181 for (i = 0; i < data->chip->num_regs; i++) {
182 ret = regmap_read(map, chip->status_base + (i * map->reg_stride
183 * data->irq_reg_stride),
184 &data->status_buf[i]);
187 dev_err(map->dev, "Failed to read IRQ status: %d\n",
189 if (chip->runtime_pm)
190 pm_runtime_put(map->dev);
194 data->status_buf[i] &= ~data->mask_buf[i];
196 if (data->status_buf[i] && chip->ack_base) {
197 reg = chip->ack_base +
198 (i * map->reg_stride * data->irq_reg_stride);
199 ret = regmap_write(map, reg, data->status_buf[i]);
201 dev_err(map->dev, "Failed to ack 0x%x: %d\n",
206 for (i = 0; i < chip->num_irqs; i++) {
207 if (data->status_buf[chip->irqs[i].reg_offset /
208 map->reg_stride] & chip->irqs[i].mask) {
209 handle_nested_irq(irq_find_mapping(data->domain, i));
214 if (chip->runtime_pm)
215 pm_runtime_put(map->dev);
223 static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
226 struct regmap_irq_chip_data *data = h->host_data;
228 irq_set_chip_data(virq, data);
229 irq_set_chip(virq, &data->irq_chip);
230 irq_set_nested_thread(virq, 1);
232 /* ARM needs us to explicitly flag the IRQ as valid
233 * and will set them noprobe when we do so. */
235 set_irq_flags(virq, IRQF_VALID);
237 irq_set_noprobe(virq);
243 static struct irq_domain_ops regmap_domain_ops = {
244 .map = regmap_irq_map,
245 .xlate = irq_domain_xlate_twocell,
249 * regmap_add_irq_chip(): Use standard regmap IRQ controller handling
251 * map: The regmap for the device.
252 * irq: The IRQ the device uses to signal interrupts
253 * irq_flags: The IRQF_ flags to use for the primary interrupt.
254 * chip: Configuration for the interrupt controller.
255 * data: Runtime data structure for the controller, allocated on success
257 * Returns 0 on success or an errno on failure.
259 * In order for this to be efficient the chip really should use a
260 * register cache. The chip driver is responsible for restoring the
261 * register values used by the IRQ controller over suspend and resume.
263 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
264 int irq_base, const struct regmap_irq_chip *chip,
265 struct regmap_irq_chip_data **data)
267 struct regmap_irq_chip_data *d;
272 for (i = 0; i < chip->num_irqs; i++) {
273 if (chip->irqs[i].reg_offset % map->reg_stride)
275 if (chip->irqs[i].reg_offset / map->reg_stride >=
281 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
283 dev_warn(map->dev, "Failed to allocate IRQs: %d\n",
289 d = kzalloc(sizeof(*d), GFP_KERNEL);
295 d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
300 d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
305 d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs,
307 if (!d->mask_buf_def)
310 if (chip->wake_base) {
311 d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
317 d->irq_chip = regmap_irq_chip;
318 d->irq_chip.name = chip->name;
319 if (!chip->wake_base) {
320 d->irq_chip.irq_set_wake = NULL;
321 d->irq_chip.flags |= IRQCHIP_MASK_ON_SUSPEND |
322 IRQCHIP_SKIP_SET_WAKE;
327 d->irq_base = irq_base;
329 if (chip->irq_reg_stride)
330 d->irq_reg_stride = chip->irq_reg_stride;
332 d->irq_reg_stride = 1;
334 mutex_init(&d->lock);
336 for (i = 0; i < chip->num_irqs; i++)
337 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride]
338 |= chip->irqs[i].mask;
340 /* Mask all the interrupts by default */
341 for (i = 0; i < chip->num_regs; i++) {
342 d->mask_buf[i] = d->mask_buf_def[i];
343 reg = chip->mask_base +
344 (i * map->reg_stride * d->irq_reg_stride);
345 if (chip->mask_invert)
346 ret = regmap_update_bits(map, reg,
347 d->mask_buf[i], ~d->mask_buf[i]);
349 ret = regmap_update_bits(map, reg,
350 d->mask_buf[i], d->mask_buf[i]);
352 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
358 /* Wake is disabled by default */
360 for (i = 0; i < chip->num_regs; i++) {
361 d->wake_buf[i] = d->mask_buf_def[i];
362 reg = chip->wake_base +
363 (i * map->reg_stride * d->irq_reg_stride);
364 ret = regmap_update_bits(map, reg, d->wake_buf[i],
367 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
375 d->domain = irq_domain_add_legacy(map->dev->of_node,
376 chip->num_irqs, irq_base, 0,
377 ®map_domain_ops, d);
379 d->domain = irq_domain_add_linear(map->dev->of_node,
381 ®map_domain_ops, d);
383 dev_err(map->dev, "Failed to create IRQ domain\n");
388 ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags,
391 dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret);
398 /* Should really dispose of the domain but... */
401 kfree(d->mask_buf_def);
403 kfree(d->status_buf);
407 EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
410 * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip
412 * @irq: Primary IRQ for the device
413 * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip()
415 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
421 /* We should unmap the domain but... */
423 kfree(d->mask_buf_def);
425 kfree(d->status_buf);
428 EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
431 * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip
433 * Useful for drivers to request their own IRQs.
435 * @data: regmap_irq controller to operate on.
437 int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data)
439 WARN_ON(!data->irq_base);
440 return data->irq_base;
442 EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);
445 * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
447 * Useful for drivers to request their own IRQs.
449 * @data: regmap_irq controller to operate on.
450 * @irq: index of the interrupt requested in the chip IRQs
452 int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq)
454 /* Handle holes in the IRQ list */
455 if (!data->chip->irqs[irq].mask)
458 return irq_create_mapping(data->domain, irq);
460 EXPORT_SYMBOL_GPL(regmap_irq_get_virq);
463 * regmap_irq_get_domain(): Retrieve the irq_domain for the chip
465 * Useful for drivers to request their own IRQs and for integration
466 * with subsystems. For ease of integration NULL is accepted as a
467 * domain, allowing devices to just call this even if no domain is
470 * @data: regmap_irq controller to operate on.
472 struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data)
479 EXPORT_SYMBOL_GPL(regmap_irq_get_domain);