drivers/block/sx8.c

   1 /*
   2  *  sx8.c: Driver for Promise SATA SX8 looks-like-I2O hardware
   3  *
   4  *  Copyright 2004-2005 Red Hat, Inc.
   5  *
   6  *  Author/maintainer:  Jeff Garzik <jgarzik@pobox.com>
   7  *
   8  *  This file is subject to the terms and conditions of the GNU General Public
   9  *  License.  See the file "COPYING" in the main directory of this archive
  10  *  for more details.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/slab.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/sched.h>
  21 #include <linux/devfs_fs_kernel.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/compiler.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/bitops.h>
  26 #include <linux/delay.h>
  27 #include <linux/time.h>
  28 #include <linux/hdreg.h>
  29 #include <linux/dma-mapping.h>
  30 #include <asm/io.h>
  31 #include <asm/semaphore.h>
  32 #include <asm/uaccess.h>
  33
  34 #if 0
  35 #define CARM_DEBUG
  36 #define CARM_VERBOSE_DEBUG
  37 #else
  38 #undef CARM_DEBUG
  39 #undef CARM_VERBOSE_DEBUG
  40 #endif
  41 #undef CARM_NDEBUG
  42
  43 #define DRV_NAME "sx8"
  44 #define DRV_VERSION "1.0"
  45 #define PFX DRV_NAME ": "
  46
  47 MODULE_AUTHOR("Jeff Garzik");
  48 MODULE_LICENSE("GPL");
  49 MODULE_DESCRIPTION("Promise SATA SX8 block driver");
  50 MODULE_VERSION(DRV_VERSION);
  51
  52 /*
  53  * SX8 hardware has a single message queue for all ATA ports.
  54  * When this driver was written, the hardware (firmware?) would
  55  * corrupt data eventually, if more than one request was outstanding.
  56  * As one can imagine, having 8 ports bottlenecking on a single
  57  * command hurts performance.
  58  *
  59  * Based on user reports, later versions of the hardware (firmware?)
  60  * seem to be able to survive with more than one command queued.
  61  *
  62  * Therefore, we default to the safe option -- 1 command -- but
  63  * allow the user to increase this.
  64  *
  65  * SX8 should be able to support up to ~60 queued commands (CARM_MAX_REQ),
  66  * but problems seem to occur when you exceed ~30, even on newer hardware.
  67  */
  68 static int max_queue = 1;
  69 module_param(max_queue, int, 0444);
  70 MODULE_PARM_DESC(max_queue, "Maximum number of queued commands. (min==1, max==30, safe==1)");
  71
  72
  73 #define NEXT_RESP(idx)  ((idx + 1) % RMSG_Q_LEN)
  74
  75 /* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */
  76 #define TAG_ENCODE(tag) (((tag) << 16) | 0xf)
  77 #define TAG_DECODE(tag) (((tag) >> 16) & 0x1f)
  78 #define TAG_VALID(tag)  ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32))
  79
  80 /* note: prints function name for you */
  81 #ifdef CARM_DEBUG
  82 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
  83 #ifdef CARM_VERBOSE_DEBUG
  84 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
  85 #else
  86 #define VPRINTK(fmt, args...)
  87 #endif  /* CARM_VERBOSE_DEBUG */
  88 #else
  89 #define DPRINTK(fmt, args...)
  90 #define VPRINTK(fmt, args...)
  91 #endif  /* CARM_DEBUG */
  92
  93 #ifdef CARM_NDEBUG
  94 #define assert(expr)
  95 #else
  96 #define assert(expr) \
  97         if(unlikely(!(expr))) {                                   \
  98         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
  99         #expr,__FILE__,__FUNCTION__,__LINE__);          \
 100         }
 101 #endif
 102
 103 /* defines only for the constants which don't work well as enums */
 104 struct carm_host;
 105
 106 enum {
 107         /* adapter-wide limits */
 108         CARM_MAX_PORTS          = 8,
 109         CARM_SHM_SIZE           = (4096 << 7),
 110         CARM_MINORS_PER_MAJOR   = 256 / CARM_MAX_PORTS,
 111         CARM_MAX_WAIT_Q         = CARM_MAX_PORTS + 1,
 112
 113         /* command message queue limits */
 114         CARM_MAX_REQ            = 64,          /* max command msgs per host */
 115         CARM_MSG_LOW_WATER      = (CARM_MAX_REQ / 4),        /* refill mark */
 116
 117         /* S/G limits, host-wide and per-request */
 118         CARM_MAX_REQ_SG         = 32,        /* max s/g entries per request */
 119         CARM_MAX_HOST_SG        = 600,          /* max s/g entries per host */
 120         CARM_SG_LOW_WATER       = (CARM_MAX_HOST_SG / 4),   /* re-fill mark */
 121
 122         /* hardware registers */
 123         CARM_IHQP               = 0x1c,
 124         CARM_INT_STAT           = 0x10, /* interrupt status */
 125         CARM_INT_MASK           = 0x14, /* interrupt mask */
 126         CARM_HMUC               = 0x18, /* host message unit control */
 127         RBUF_ADDR_LO            = 0x20, /* response msg DMA buf low 32 bits */
 128         RBUF_ADDR_HI            = 0x24, /* response msg DMA buf high 32 bits */
 129         RBUF_BYTE_SZ            = 0x28,
 130         CARM_RESP_IDX           = 0x2c,
 131         CARM_CMS0               = 0x30, /* command message size reg 0 */
 132         CARM_LMUC               = 0x48,
 133         CARM_HMPHA              = 0x6c,
 134         CARM_INITC              = 0xb5,
 135
 136         /* bits in CARM_INT_{STAT,MASK} */
 137         INT_RESERVED            = 0xfffffff0,
 138         INT_WATCHDOG            = (1 << 3),     /* watchdog timer */
 139         INT_Q_OVERFLOW          = (1 << 2),     /* cmd msg q overflow */
 140         INT_Q_AVAILABLE         = (1 << 1),     /* cmd msg q has free space */
 141         INT_RESPONSE            = (1 << 0),     /* response msg available */
 142         INT_ACK_MASK            = INT_WATCHDOG | INT_Q_OVERFLOW,
 143         INT_DEF_MASK            = INT_RESERVED | INT_Q_OVERFLOW |
 144                                   INT_RESPONSE,
 145
 146         /* command messages, and related register bits */
 147         CARM_HAVE_RESP          = 0x01,
 148         CARM_MSG_READ           = 1,
 149         CARM_MSG_WRITE          = 2,
 150         CARM_MSG_VERIFY         = 3,
 151         CARM_MSG_GET_CAPACITY   = 4,
 152         CARM_MSG_FLUSH          = 5,
 153         CARM_MSG_IOCTL          = 6,
 154         CARM_MSG_ARRAY          = 8,
 155         CARM_MSG_MISC           = 9,
 156         CARM_CME                = (1 << 2),
 157         CARM_RME                = (1 << 1),
 158         CARM_WZBC               = (1 << 0),
 159         CARM_RMI                = (1 << 0),
 160         CARM_Q_FULL             = (1 << 3),
 161         CARM_MSG_SIZE           = 288,
 162         CARM_Q_LEN              = 48,
 163
 164         /* CARM_MSG_IOCTL messages */
 165         CARM_IOC_SCAN_CHAN      = 5,    /* scan channels for devices */
 166         CARM_IOC_GET_TCQ        = 13,   /* get tcq/ncq depth */
 167         CARM_IOC_SET_TCQ        = 14,   /* set tcq/ncq depth */
 168
 169         IOC_SCAN_CHAN_NODEV     = 0x1f,
 170         IOC_SCAN_CHAN_OFFSET    = 0x40,
 171
 172         /* CARM_MSG_ARRAY messages */
 173         CARM_ARRAY_INFO         = 0,
 174
 175         ARRAY_NO_EXIST          = (1 << 31),
 176
 177         /* response messages */
 178         RMSG_SZ                 = 8,    /* sizeof(struct carm_response) */
 179         RMSG_Q_LEN              = 48,   /* resp. msg list length */
 180         RMSG_OK                 = 1,    /* bit indicating msg was successful */
 181                                         /* length of entire resp. msg buffer */
 182         RBUF_LEN                = RMSG_SZ * RMSG_Q_LEN,
 183
 184         PDC_SHM_SIZE            = (4096 << 7), /* length of entire h/w buffer */
 185
 186         /* CARM_MSG_MISC messages */
 187         MISC_GET_FW_VER         = 2,
 188         MISC_ALLOC_MEM          = 3,
 189         MISC_SET_TIME           = 5,
 190
 191         /* MISC_GET_FW_VER feature bits */
 192         FW_VER_4PORT            = (1 << 2), /* 1=4 ports, 0=8 ports */
 193         FW_VER_NON_RAID         = (1 << 1), /* 1=non-RAID firmware, 0=RAID */
 194         FW_VER_ZCR              = (1 << 0), /* zero channel RAID (whatever that is) */
 195
 196         /* carm_host flags */
 197         FL_NON_RAID             = FW_VER_NON_RAID,
 198         FL_4PORT                = FW_VER_4PORT,
 199         FL_FW_VER_MASK          = (FW_VER_NON_RAID | FW_VER_4PORT),
 200         FL_DAC                  = (1 << 16),
 201         FL_DYN_MAJOR            = (1 << 17),
 202 };
 203
 204 enum {
 205         CARM_SG_BOUNDARY        = 0xffffUL,         /* s/g segment boundary */
 206 };
 207
 208 enum scatter_gather_types {
 209         SGT_32BIT               = 0,
 210         SGT_64BIT               = 1,
 211 };
 212
 213 enum host_states {
 214         HST_INVALID,            /* invalid state; never used */
 215         HST_ALLOC_BUF,          /* setting up master SHM area */
 216         HST_ERROR,              /* we never leave here */
 217         HST_PORT_SCAN,          /* start dev scan */
 218         HST_DEV_SCAN_START,     /* start per-device probe */
 219         HST_DEV_SCAN,           /* continue per-device probe */
 220         HST_DEV_ACTIVATE,       /* activate devices we found */
 221         HST_PROBE_FINISHED,     /* probe is complete */
 222         HST_PROBE_START,        /* initiate probe */
 223         HST_SYNC_TIME,          /* tell firmware what time it is */
 224         HST_GET_FW_VER,         /* get firmware version, adapter port cnt */
 225 };
 226
 227 #ifdef CARM_DEBUG
 228 static const char *state_name[] = {
 229         "HST_INVALID",
 230         "HST_ALLOC_BUF",
 231         "HST_ERROR",
 232         "HST_PORT_SCAN",
 233         "HST_DEV_SCAN_START",
 234         "HST_DEV_SCAN",
 235         "HST_DEV_ACTIVATE",
 236         "HST_PROBE_FINISHED",
 237         "HST_PROBE_START",
 238         "HST_SYNC_TIME",
 239         "HST_GET_FW_VER",
 240 };
 241 #endif
 242
 243 struct carm_port {
 244         unsigned int                    port_no;
 245         unsigned int                    n_queued;
 246         struct gendisk                  *disk;
 247         struct carm_host                *host;
 248
 249         /* attached device characteristics */
 250         u64                             capacity;
 251         char                            name[41];
 252         u16                             dev_geom_head;
 253         u16                             dev_geom_sect;
 254         u16                             dev_geom_cyl;
 255 };
 256
 257 struct carm_request {
 258         unsigned int                    tag;
 259         int                             n_elem;
 260         unsigned int                    msg_type;
 261         unsigned int                    msg_subtype;
 262         unsigned int                    msg_bucket;
 263         struct request                  *rq;
 264         struct carm_port                *port;
 265         struct scatterlist              sg[CARM_MAX_REQ_SG];
 266 };
 267
 268 struct carm_host {
 269         unsigned long                   flags;
 270         void                            __iomem *mmio;
 271         void                            *shm;
 272         dma_addr_t                      shm_dma;
 273
 274         int                             major;
 275         int                             id;
 276         char                            name[32];
 277
 278         spinlock_t                      lock;
 279         struct pci_dev                  *pdev;
 280         unsigned int                    state;
 281         u32                             fw_ver;
 282
 283         request_queue_t                 *oob_q;
 284         unsigned int                    n_oob;
 285
 286         unsigned int                    hw_sg_used;
 287
 288         unsigned int                    resp_idx;
 289
 290         unsigned int                    wait_q_prod;
 291         unsigned int                    wait_q_cons;
 292         request_queue_t                 *wait_q[CARM_MAX_WAIT_Q];
 293
 294         unsigned int                    n_msgs;
 295         u64                             msg_alloc;
 296         struct carm_request             req[CARM_MAX_REQ];
 297         void                            *msg_base;
 298         dma_addr_t                      msg_dma;
 299
 300         int                             cur_scan_dev;
 301         unsigned long                   dev_active;
 302         unsigned long                   dev_present;
 303         struct carm_port                port[CARM_MAX_PORTS];
 304
 305         struct work_struct              fsm_task;
 306
 307         struct semaphore                probe_sem;
 308 };
 309
 310 struct carm_response {
 311         __le32 ret_handle;
 312         __le32 status;
 313 }  __attribute__((packed));
 314
 315 struct carm_msg_sg {
 316         __le32 start;
 317         __le32 len;
 318 }  __attribute__((packed));
 319
 320 struct carm_msg_rw {
 321         u8 type;
 322         u8 id;
 323         u8 sg_count;
 324         u8 sg_type;
 325         __le32 handle;
 326         __le32 lba;
 327         __le16 lba_count;
 328         __le16 lba_high;
 329         struct carm_msg_sg sg[32];
 330 }  __attribute__((packed));
 331
 332 struct carm_msg_allocbuf {
 333         u8 type;
 334         u8 subtype;
 335         u8 n_sg;
 336         u8 sg_type;
 337         __le32 handle;
 338         __le32 addr;
 339         __le32 len;
 340         __le32 evt_pool;
 341         __le32 n_evt;
 342         __le32 rbuf_pool;
 343         __le32 n_rbuf;
 344         __le32 msg_pool;
 345         __le32 n_msg;
 346         struct carm_msg_sg sg[8];
 347 }  __attribute__((packed));
 348
 349 struct carm_msg_ioctl {
 350         u8 type;
 351         u8 subtype;
 352         u8 array_id;
 353         u8 reserved1;
 354         __le32 handle;
 355         __le32 data_addr;
 356         u32 reserved2;
 357 }  __attribute__((packed));
 358
 359 struct carm_msg_sync_time {
 360         u8 type;
 361         u8 subtype;
 362         u16 reserved1;
 363         __le32 handle;
 364         u32 reserved2;
 365         __le32 timestamp;
 366 }  __attribute__((packed));
 367
 368 struct carm_msg_get_fw_ver {
 369         u8 type;
 370         u8 subtype;
 371         u16 reserved1;
 372         __le32 handle;
 373         __le32 data_addr;
 374         u32 reserved2;
 375 }  __attribute__((packed));
 376
 377 struct carm_fw_ver {
 378         __le32 version;
 379         u8 features;
 380         u8 reserved1;
 381         u16 reserved2;
 382 }  __attribute__((packed));
 383
 384 struct carm_array_info {
 385         __le32 size;
 386
 387         __le16 size_hi;
 388         __le16 stripe_size;
 389
 390         __le32 mode;
 391
 392         __le16 stripe_blk_sz;
 393         __le16 reserved1;
 394
 395         __le16 cyl;
 396         __le16 head;
 397
 398         __le16 sect;
 399         u8 array_id;
 400         u8 reserved2;
 401
 402         char name[40];
 403
 404         __le32 array_status;
 405
 406         /* device list continues beyond this point? */
 407 }  __attribute__((packed));
 408
 409 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
 410 static void carm_remove_one (struct pci_dev *pdev);
 411 static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
 412                            unsigned int cmd, unsigned long arg);
 413
 414 static struct pci_device_id carm_pci_tbl[] = {
 415         { PCI_VENDOR_ID_PROMISE, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
 416         { PCI_VENDOR_ID_PROMISE, 0x8002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
 417         { }     /* terminate list */
 418 };
 419 MODULE_DEVICE_TABLE(pci, carm_pci_tbl);
 420
 421 static struct pci_driver carm_driver = {
 422         .name           = DRV_NAME,
 423         .id_table       = carm_pci_tbl,
 424         .probe          = carm_init_one,
 425         .remove         = carm_remove_one,
 426 };
 427
 428 static struct block_device_operations carm_bd_ops = {
 429         .owner          = THIS_MODULE,
 430         .ioctl          = carm_bdev_ioctl,
 431 };
 432
 433 static unsigned int carm_host_id;
 434 static unsigned long carm_major_alloc;
 435
 436
 437
 438 static int carm_bdev_ioctl(struct inode *ino, struct file *fil,
 439                            unsigned int cmd, unsigned long arg)
 440 {
 441         void __user *usermem = (void __user *) arg;
 442         struct carm_port *port = ino->i_bdev->bd_disk->private_data;
 443         struct hd_geometry geom;
 444
 445         switch (cmd) {
 446         case HDIO_GETGEO:
 447                 if (!usermem)
 448                         return -EINVAL;
 449
 450                 geom.heads = (u8) port->dev_geom_head;
 451                 geom.sectors = (u8) port->dev_geom_sect;
 452                 geom.cylinders = port->dev_geom_cyl;
 453                 geom.start = get_start_sect(ino->i_bdev);
 454
 455                 if (copy_to_user(usermem, &geom, sizeof(geom)))
 456                         return -EFAULT;
 457                 return 0;
 458
 459         default:
 460                 break;
 461         }
 462
 463         return -EOPNOTSUPP;
 464 }
 465
 466 static const u32 msg_sizes[] = { 32, 64, 128, CARM_MSG_SIZE };
 467
 468 static inline int carm_lookup_bucket(u32 msg_size)
 469 {
 470         int i;
 471
 472         for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
 473                 if (msg_size <= msg_sizes[i])
 474                         return i;
 475
 476         return -ENOENT;
 477 }
 478
 479 static void carm_init_buckets(void __iomem *mmio)
 480 {
 481         unsigned int i;
 482
 483         for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
 484                 writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i));
 485 }
 486
 487 static inline void *carm_ref_msg(struct carm_host *host,
 488                                  unsigned int msg_idx)
 489 {
 490         return host->msg_base + (msg_idx * CARM_MSG_SIZE);
 491 }
 492
 493 static inline dma_addr_t carm_ref_msg_dma(struct carm_host *host,
 494                                           unsigned int msg_idx)
 495 {
 496         return host->msg_dma + (msg_idx * CARM_MSG_SIZE);
 497 }
 498
 499 static int carm_send_msg(struct carm_host *host,
 500                          struct carm_request *crq)
 501 {
 502         void __iomem *mmio = host->mmio;
 503         u32 msg = (u32) carm_ref_msg_dma(host, crq->tag);
 504         u32 cm_bucket = crq->msg_bucket;
 505         u32 tmp;
 506         int rc = 0;
 507
 508         VPRINTK("ENTER\n");
 509
 510         tmp = readl(mmio + CARM_HMUC);
 511         if (tmp & CARM_Q_FULL) {
 512 #if 0
 513                 tmp = readl(mmio + CARM_INT_MASK);
 514                 tmp |= INT_Q_AVAILABLE;
 515                 writel(tmp, mmio + CARM_INT_MASK);
 516                 readl(mmio + CARM_INT_MASK);    /* flush */
 517 #endif
 518                 DPRINTK("host msg queue full\n");
 519                 rc = -EBUSY;
 520         } else {
 521                 writel(msg | (cm_bucket << 1), mmio + CARM_IHQP);
 522                 readl(mmio + CARM_IHQP);        /* flush */
 523         }
 524
 525         return rc;
 526 }
 527
 528 static struct carm_request *carm_get_request(struct carm_host *host)
 529 {
 530         unsigned int i;
 531
 532         /* obey global hardware limit on S/G entries */
 533         if (host->hw_sg_used >= (CARM_MAX_HOST_SG - CARM_MAX_REQ_SG))
 534                 return NULL;
 535
 536         for (i = 0; i < max_queue; i++)
 537                 if ((host->msg_alloc & (1ULL << i)) == 0) {
 538                         struct carm_request *crq = &host->req[i];
 539                         crq->port = NULL;
 540                         crq->n_elem = 0;
 541
 542                         host->msg_alloc |= (1ULL << i);
 543                         host->n_msgs++;
 544
 545                         assert(host->n_msgs <= CARM_MAX_REQ);
 546                         return crq;
 547                 }
 548
 549         DPRINTK("no request available, returning NULL\n");
 550         return NULL;
 551 }
 552
 553 static int carm_put_request(struct carm_host *host, struct carm_request *crq)
 554 {
 555         assert(crq->tag < max_queue);
 556
 557         if (unlikely((host->msg_alloc & (1ULL << crq->tag)) == 0))
 558                 return -EINVAL; /* tried to clear a tag that was not active */
 559
 560         assert(host->hw_sg_used >= crq->n_elem);
 561
 562         host->msg_alloc &= ~(1ULL << crq->tag);
 563         host->hw_sg_used -= crq->n_elem;
 564         host->n_msgs--;
 565
 566         return 0;
 567 }
 568
 569 static struct carm_request *carm_get_special(struct carm_host *host)
 570 {
 571         unsigned long flags;
 572         struct carm_request *crq = NULL;
 573         struct request *rq;
 574         int tries = 5000;
 575
 576         while (tries-- > 0) {
 577                 spin_lock_irqsave(&host->lock, flags);
 578                 crq = carm_get_request(host);
 579                 spin_unlock_irqrestore(&host->lock, flags);
 580
 581                 if (crq)
 582                         break;
 583                 msleep(10);
 584         }
 585
 586         if (!crq)
 587                 return NULL;
 588
 589         rq = blk_get_request(host->oob_q, WRITE /* bogus */, GFP_KERNEL);
 590         if (!rq) {
 591                 spin_lock_irqsave(&host->lock, flags);
 592                 carm_put_request(host, crq);
 593                 spin_unlock_irqrestore(&host->lock, flags);
 594                 return NULL;
 595         }
 596
 597         crq->rq = rq;
 598         return crq;
 599 }
 600
 601 static int carm_array_info (struct carm_host *host, unsigned int array_idx)
 602 {
 603         struct carm_msg_ioctl *ioc;
 604         unsigned int idx;
 605         u32 msg_data;
 606         dma_addr_t msg_dma;
 607         struct carm_request *crq;
 608         int rc;
 609
 610         crq = carm_get_special(host);
 611         if (!crq) {
 612                 rc = -ENOMEM;
 613                 goto err_out;
 614         }
 615
 616         idx = crq->tag;
 617
 618         ioc = carm_ref_msg(host, idx);
 619         msg_dma = carm_ref_msg_dma(host, idx);
 620         msg_data = (u32) (msg_dma + sizeof(struct carm_array_info));
 621
 622         crq->msg_type = CARM_MSG_ARRAY;
 623         crq->msg_subtype = CARM_ARRAY_INFO;
 624         rc = carm_lookup_bucket(sizeof(struct carm_msg_ioctl) +
 625                                 sizeof(struct carm_array_info));
 626         BUG_ON(rc < 0);
 627         crq->msg_bucket = (u32) rc;
 628
 629         memset(ioc, 0, sizeof(*ioc));
 630         ioc->type       = CARM_MSG_ARRAY;
 631         ioc->subtype    = CARM_ARRAY_INFO;
 632         ioc->array_id   = (u8) array_idx;
 633         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 634         ioc->data_addr  = cpu_to_le32(msg_data);
 635
 636         spin_lock_irq(&host->lock);
 637         assert(host->state == HST_DEV_SCAN_START ||
 638                host->state == HST_DEV_SCAN);
 639         spin_unlock_irq(&host->lock);
 640
 641         DPRINTK("blk_insert_request, tag == %u\n", idx);
 642         blk_insert_request(host->oob_q, crq->rq, 1, crq);
 643
 644         return 0;
 645
 646 err_out:
 647         spin_lock_irq(&host->lock);
 648         host->state = HST_ERROR;
 649         spin_unlock_irq(&host->lock);
 650         return rc;
 651 }
 652
 653 typedef unsigned int (*carm_sspc_t)(struct carm_host *, unsigned int, void *);
 654
 655 static int carm_send_special (struct carm_host *host, carm_sspc_t func)
 656 {
 657         struct carm_request *crq;
 658         struct carm_msg_ioctl *ioc;
 659         void *mem;
 660         unsigned int idx, msg_size;
 661         int rc;
 662
 663         crq = carm_get_special(host);
 664         if (!crq)
 665                 return -ENOMEM;
 666
 667         idx = crq->tag;
 668
 669         mem = carm_ref_msg(host, idx);
 670
 671         msg_size = func(host, idx, mem);
 672
 673         ioc = mem;
 674         crq->msg_type = ioc->type;
 675         crq->msg_subtype = ioc->subtype;
 676         rc = carm_lookup_bucket(msg_size);
 677         BUG_ON(rc < 0);
 678         crq->msg_bucket = (u32) rc;
 679
 680         DPRINTK("blk_insert_request, tag == %u\n", idx);
 681         blk_insert_request(host->oob_q, crq->rq, 1, crq);
 682
 683         return 0;
 684 }
 685
 686 static unsigned int carm_fill_sync_time(struct carm_host *host,
 687                                         unsigned int idx, void *mem)
 688 {
 689         struct timeval tv;
 690         struct carm_msg_sync_time *st = mem;
 691
 692         do_gettimeofday(&tv);
 693
 694         memset(st, 0, sizeof(*st));
 695         st->type        = CARM_MSG_MISC;
 696         st->subtype     = MISC_SET_TIME;
 697         st->handle      = cpu_to_le32(TAG_ENCODE(idx));
 698         st->timestamp   = cpu_to_le32(tv.tv_sec);
 699
 700         return sizeof(struct carm_msg_sync_time);
 701 }
 702
 703 static unsigned int carm_fill_alloc_buf(struct carm_host *host,
 704                                         unsigned int idx, void *mem)
 705 {
 706         struct carm_msg_allocbuf *ab = mem;
 707
 708         memset(ab, 0, sizeof(*ab));
 709         ab->type        = CARM_MSG_MISC;
 710         ab->subtype     = MISC_ALLOC_MEM;
 711         ab->handle      = cpu_to_le32(TAG_ENCODE(idx));
 712         ab->n_sg        = 1;
 713         ab->sg_type     = SGT_32BIT;
 714         ab->addr        = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
 715         ab->len         = cpu_to_le32(PDC_SHM_SIZE >> 1);
 716         ab->evt_pool    = cpu_to_le32(host->shm_dma + (16 * 1024));
 717         ab->n_evt       = cpu_to_le32(1024);
 718         ab->rbuf_pool   = cpu_to_le32(host->shm_dma);
 719         ab->n_rbuf      = cpu_to_le32(RMSG_Q_LEN);
 720         ab->msg_pool    = cpu_to_le32(host->shm_dma + RBUF_LEN);
 721         ab->n_msg       = cpu_to_le32(CARM_Q_LEN);
 722         ab->sg[0].start = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
 723         ab->sg[0].len   = cpu_to_le32(65536);
 724
 725         return sizeof(struct carm_msg_allocbuf);
 726 }
 727
 728 static unsigned int carm_fill_scan_channels(struct carm_host *host,
 729                                             unsigned int idx, void *mem)
 730 {
 731         struct carm_msg_ioctl *ioc = mem;
 732         u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) +
 733                               IOC_SCAN_CHAN_OFFSET);
 734
 735         memset(ioc, 0, sizeof(*ioc));
 736         ioc->type       = CARM_MSG_IOCTL;
 737         ioc->subtype    = CARM_IOC_SCAN_CHAN;
 738         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 739         ioc->data_addr  = cpu_to_le32(msg_data);
 740
 741         /* fill output data area with "no device" default values */
 742         mem += IOC_SCAN_CHAN_OFFSET;
 743         memset(mem, IOC_SCAN_CHAN_NODEV, CARM_MAX_PORTS);
 744
 745         return IOC_SCAN_CHAN_OFFSET + CARM_MAX_PORTS;
 746 }
 747
 748 static unsigned int carm_fill_get_fw_ver(struct carm_host *host,
 749                                          unsigned int idx, void *mem)
 750 {
 751         struct carm_msg_get_fw_ver *ioc = mem;
 752         u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + sizeof(*ioc));
 753
 754         memset(ioc, 0, sizeof(*ioc));
 755         ioc->type       = CARM_MSG_MISC;
 756         ioc->subtype    = MISC_GET_FW_VER;
 757         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 758         ioc->data_addr  = cpu_to_le32(msg_data);
 759
 760         return sizeof(struct carm_msg_get_fw_ver) +
 761                sizeof(struct carm_fw_ver);
 762 }
 763
 764 static inline void carm_end_request_queued(struct carm_host *host,
 765                                            struct carm_request *crq,
 766                                            int uptodate)
 767 {
 768         struct request *req = crq->rq;
 769         int rc;
 770
 771         rc = end_that_request_first(req, uptodate, req->hard_nr_sectors);
 772         assert(rc == 0);
 773
 774         end_that_request_last(req);
 775
 776         rc = carm_put_request(host, crq);
 777         assert(rc == 0);
 778 }
 779
 780 static inline void carm_push_q (struct carm_host *host, request_queue_t *q)
 781 {
 782         unsigned int idx = host->wait_q_prod % CARM_MAX_WAIT_Q;
 783
 784         blk_stop_queue(q);
 785         VPRINTK("STOPPED QUEUE %p\n", q);
 786
 787         host->wait_q[idx] = q;
 788         host->wait_q_prod++;
 789         BUG_ON(host->wait_q_prod == host->wait_q_cons); /* overrun */
 790 }
 791
 792 static inline request_queue_t *carm_pop_q(struct carm_host *host)
 793 {
 794         unsigned int idx;
 795
 796         if (host->wait_q_prod == host->wait_q_cons)
 797                 return NULL;
 798
 799         idx = host->wait_q_cons % CARM_MAX_WAIT_Q;
 800         host->wait_q_cons++;
 801
 802         return host->wait_q[idx];
 803 }
 804
 805 static inline void carm_round_robin(struct carm_host *host)
 806 {
 807         request_queue_t *q = carm_pop_q(host);
 808         if (q) {
 809                 blk_start_queue(q);
 810                 VPRINTK("STARTED QUEUE %p\n", q);
 811         }
 812 }
 813
 814 static inline void carm_end_rq(struct carm_host *host, struct carm_request *crq,
 815                         int is_ok)
 816 {
 817         carm_end_request_queued(host, crq, is_ok);
 818         if (max_queue == 1)
 819                 carm_round_robin(host);
 820         else if ((host->n_msgs <= CARM_MSG_LOW_WATER) &&
 821                  (host->hw_sg_used <= CARM_SG_LOW_WATER)) {
 822                 carm_round_robin(host);
 823         }
 824 }
 825
 826 static void carm_oob_rq_fn(request_queue_t *q)
 827 {
 828         struct carm_host *host = q->queuedata;
 829         struct carm_request *crq;
 830         struct request *rq;
 831         int rc;
 832
 833         while (1) {
 834                 DPRINTK("get req\n");
 835                 rq = elv_next_request(q);
 836                 if (!rq)
 837                         break;
 838
 839                 blkdev_dequeue_request(rq);
 840
 841                 crq = rq->special;
 842                 assert(crq != NULL);
 843                 assert(crq->rq == rq);
 844
 845                 crq->n_elem = 0;
 846
 847                 DPRINTK("send req\n");
 848                 rc = carm_send_msg(host, crq);
 849                 if (rc) {
 850                         blk_requeue_request(q, rq);
 851                         carm_push_q(host, q);
 852                         return;         /* call us again later, eventually */
 853                 }
 854         }
 855 }
 856
 857 static void carm_rq_fn(request_queue_t *q)
 858 {
 859         struct carm_port *port = q->queuedata;
 860         struct carm_host *host = port->host;
 861         struct carm_msg_rw *msg;
 862         struct carm_request *crq;
 863         struct request *rq;
 864         struct scatterlist *sg;
 865         int writing = 0, pci_dir, i, n_elem, rc;
 866         u32 tmp;
 867         unsigned int msg_size;
 868
 869 queue_one_request:
 870         VPRINTK("get req\n");
 871         rq = elv_next_request(q);
 872         if (!rq)
 873                 return;
 874
 875         crq = carm_get_request(host);
 876         if (!crq) {
 877                 carm_push_q(host, q);
 878                 return;         /* call us again later, eventually */
 879         }
 880         crq->rq = rq;
 881
 882         blkdev_dequeue_request(rq);
 883
 884         if (rq_data_dir(rq) == WRITE) {
 885                 writing = 1;
 886                 pci_dir = PCI_DMA_TODEVICE;
 887         } else {
 888                 pci_dir = PCI_DMA_FROMDEVICE;
 889         }
 890
 891         /* get scatterlist from block layer */
 892         sg = &crq->sg[0];
 893         n_elem = blk_rq_map_sg(q, rq, sg);
 894         if (n_elem <= 0) {
 895                 carm_end_rq(host, crq, 0);
 896                 return;         /* request with no s/g entries? */
 897         }
 898
 899         /* map scatterlist to PCI bus addresses */
 900         n_elem = pci_map_sg(host->pdev, sg, n_elem, pci_dir);
 901         if (n_elem <= 0) {
 902                 carm_end_rq(host, crq, 0);
 903                 return;         /* request with no s/g entries? */
 904         }
 905         crq->n_elem = n_elem;
 906         crq->port = port;
 907         host->hw_sg_used += n_elem;
 908
 909         /*
 910          * build read/write message
 911          */
 912
 913         VPRINTK("build msg\n");
 914         msg = (struct carm_msg_rw *) carm_ref_msg(host, crq->tag);
 915
 916         if (writing) {
 917                 msg->type = CARM_MSG_WRITE;
 918                 crq->msg_type = CARM_MSG_WRITE;
 919         } else {
 920                 msg->type = CARM_MSG_READ;
 921                 crq->msg_type = CARM_MSG_READ;
 922         }
 923
 924         msg->id         = port->port_no;
 925         msg->sg_count   = n_elem;
 926         msg->sg_type    = SGT_32BIT;
 927         msg->handle     = cpu_to_le32(TAG_ENCODE(crq->tag));
 928         msg->lba        = cpu_to_le32(rq->sector & 0xffffffff);
 929         tmp             = (rq->sector >> 16) >> 16;
 930         msg->lba_high   = cpu_to_le16( (u16) tmp );
 931         msg->lba_count  = cpu_to_le16(rq->nr_sectors);
 932
 933         msg_size = sizeof(struct carm_msg_rw) - sizeof(msg->sg);
 934         for (i = 0; i < n_elem; i++) {
 935                 struct carm_msg_sg *carm_sg = &msg->sg[i];
 936                 carm_sg->start = cpu_to_le32(sg_dma_address(&crq->sg[i]));
 937                 carm_sg->len = cpu_to_le32(sg_dma_len(&crq->sg[i]));
 938                 msg_size += sizeof(struct carm_msg_sg);
 939         }
 940
 941         rc = carm_lookup_bucket(msg_size);
 942         BUG_ON(rc < 0);
 943         crq->msg_bucket = (u32) rc;
 944
 945         /*
 946          * queue read/write message to hardware
 947          */
 948
 949         VPRINTK("send msg, tag == %u\n", crq->tag);
 950         rc = carm_send_msg(host, crq);
 951         if (rc) {
 952                 carm_put_request(host, crq);
 953                 blk_requeue_request(q, rq);
 954                 carm_push_q(host, q);
 955                 return;         /* call us again later, eventually */
 956         }
 957
 958         goto queue_one_request;
 959 }
 960
 961 static void carm_handle_array_info(struct carm_host *host,
 962                                    struct carm_request *crq, u8 *mem,
 963                                    int is_ok)
 964 {
 965         struct carm_port *port;
 966         u8 *msg_data = mem + sizeof(struct carm_array_info);
 967         struct carm_array_info *desc = (struct carm_array_info *) msg_data;
 968         u64 lo, hi;
 969         int cur_port;
 970         size_t slen;
 971
 972         DPRINTK("ENTER\n");
 973
 974         carm_end_rq(host, crq, is_ok);
 975
 976         if (!is_ok)
 977                 goto out;
 978         if (le32_to_cpu(desc->array_status) & ARRAY_NO_EXIST)
 979                 goto out;
 980
 981         cur_port = host->cur_scan_dev;
 982
 983         /* should never occur */
 984         if ((cur_port < 0) || (cur_port >= CARM_MAX_PORTS)) {
 985                 printk(KERN_ERR PFX "BUG: cur_scan_dev==%d, array_id==%d\n",
 986                        cur_port, (int) desc->array_id);
 987                 goto out;
 988         }
 989
 990         port = &host->port[cur_port];
 991
 992         lo = (u64) le32_to_cpu(desc->size);
 993         hi = (u64) le16_to_cpu(desc->size_hi);
 994
 995         port->capacity = lo | (hi << 32);
 996         port->dev_geom_head = le16_to_cpu(desc->head);
 997         port->dev_geom_sect = le16_to_cpu(desc->sect);
 998         port->dev_geom_cyl = le16_to_cpu(desc->cyl);
 999
1000         host->dev_active |= (1 << cur_port);
1001
1002         strncpy(port->name, desc->name, sizeof(port->name));
1003         port->name[sizeof(port->name) - 1] = 0;
1004         slen = strlen(port->name);
1005         while (slen && (port->name[slen - 1] == ' ')) {
1006                 port->name[slen - 1] = 0;
1007                 slen--;
1008         }
1009
1010         printk(KERN_INFO DRV_NAME "(%s): port %u device %Lu sectors\n",
1011                pci_name(host->pdev), port->port_no,
1012                (unsigned long long) port->capacity);
1013         printk(KERN_INFO DRV_NAME "(%s): port %u device \"%s\"\n",
1014                pci_name(host->pdev), port->port_no, port->name);
1015
1016 out:
1017         assert(host->state == HST_DEV_SCAN);
1018         schedule_work(&host->fsm_task);
1019 }
1020
1021 static void carm_handle_scan_chan(struct carm_host *host,
1022                                   struct carm_request *crq, u8 *mem,
1023                                   int is_ok)
1024 {
1025         u8 *msg_data = mem + IOC_SCAN_CHAN_OFFSET;
1026         unsigned int i, dev_count = 0;
1027         int new_state = HST_DEV_SCAN_START;
1028
1029         DPRINTK("ENTER\n");
1030
1031         carm_end_rq(host, crq, is_ok);
1032
1033         if (!is_ok) {
1034                 new_state = HST_ERROR;
1035                 goto out;
1036         }
1037
1038         /* TODO: scan and support non-disk devices */
1039         for (i = 0; i < 8; i++)
1040                 if (msg_data[i] == 0) { /* direct-access device (disk) */
1041                         host->dev_present |= (1 << i);
1042                         dev_count++;
1043                 }
1044
1045         printk(KERN_INFO DRV_NAME "(%s): found %u interesting devices\n",
1046                pci_name(host->pdev), dev_count);
1047
1048 out:
1049         assert(host->state == HST_PORT_SCAN);
1050         host->state = new_state;
1051         schedule_work(&host->fsm_task);
1052 }
1053
1054 static void carm_handle_generic(struct carm_host *host,
1055                                 struct carm_request *crq, int is_ok,
1056                                 int cur_state, int next_state)
1057 {
1058         DPRINTK("ENTER\n");
1059
1060         carm_end_rq(host, crq, is_ok);
1061
1062         assert(host->state == cur_state);
1063         if (is_ok)
1064                 host->state = next_state;
1065         else
1066                 host->state = HST_ERROR;
1067         schedule_work(&host->fsm_task);
1068 }
1069
1070 static inline void carm_handle_rw(struct carm_host *host,
1071                                   struct carm_request *crq, int is_ok)
1072 {
1073         int pci_dir;
1074
1075         VPRINTK("ENTER\n");
1076
1077         if (rq_data_dir(crq->rq) == WRITE)
1078                 pci_dir = PCI_DMA_TODEVICE;
1079         else
1080                 pci_dir = PCI_DMA_FROMDEVICE;
1081
1082         pci_unmap_sg(host->pdev, &crq->sg[0], crq->n_elem, pci_dir);
1083
1084         carm_end_rq(host, crq, is_ok);
1085 }
1086
1087 static inline void carm_handle_resp(struct carm_host *host,
1088                                     __le32 ret_handle_le, u32 status)
1089 {
1090         u32 handle = le32_to_cpu(ret_handle_le);
1091         unsigned int msg_idx;
1092         struct carm_request *crq;
1093         int is_ok = (status == RMSG_OK);
1094         u8 *mem;
1095
1096         VPRINTK("ENTER, handle == 0x%x\n", handle);
1097
1098         if (unlikely(!TAG_VALID(handle))) {
1099                 printk(KERN_ERR DRV_NAME "(%s): BUG: invalid tag 0x%x\n",
1100                        pci_name(host->pdev), handle);
1101                 return;
1102         }
1103
1104         msg_idx = TAG_DECODE(handle);
1105         VPRINTK("tag == %u\n", msg_idx);
1106
1107         crq = &host->req[msg_idx];
1108
1109         /* fast path */
1110         if (likely(crq->msg_type == CARM_MSG_READ ||
1111                    crq->msg_type == CARM_MSG_WRITE)) {
1112                 carm_handle_rw(host, crq, is_ok);
1113                 return;
1114         }
1115
1116         mem = carm_ref_msg(host, msg_idx);
1117
1118         switch (crq->msg_type) {
1119         case CARM_MSG_IOCTL: {
1120                 switch (crq->msg_subtype) {
1121                 case CARM_IOC_SCAN_CHAN:
1122                         carm_handle_scan_chan(host, crq, mem, is_ok);
1123                         break;
1124                 default:
1125                         /* unknown / invalid response */
1126                         goto err_out;
1127                 }
1128                 break;
1129         }
1130
1131         case CARM_MSG_MISC: {
1132                 switch (crq->msg_subtype) {
1133                 case MISC_ALLOC_MEM:
1134                         carm_handle_generic(host, crq, is_ok,
1135                                             HST_ALLOC_BUF, HST_SYNC_TIME);
1136                         break;
1137                 case MISC_SET_TIME:
1138                         carm_handle_generic(host, crq, is_ok,
1139                                             HST_SYNC_TIME, HST_GET_FW_VER);
1140                         break;
1141                 case MISC_GET_FW_VER: {
1142                         struct carm_fw_ver *ver = (struct carm_fw_ver *)
1143                                 mem + sizeof(struct carm_msg_get_fw_ver);
1144                         if (is_ok) {
1145                                 host->fw_ver = le32_to_cpu(ver->version);
1146                                 host->flags |= (ver->features & FL_FW_VER_MASK);
1147                         }
1148                         carm_handle_generic(host, crq, is_ok,
1149                                             HST_GET_FW_VER, HST_PORT_SCAN);
1150                         break;
1151                 }
1152                 default:
1153                         /* unknown / invalid response */
1154                         goto err_out;
1155                 }
1156                 break;
1157         }
1158
1159         case CARM_MSG_ARRAY: {
1160                 switch (crq->msg_subtype) {
1161                 case CARM_ARRAY_INFO:
1162                         carm_handle_array_info(host, crq, mem, is_ok);
1163                         break;
1164                 default:
1165                         /* unknown / invalid response */
1166                         goto err_out;
1167                 }
1168                 break;
1169         }
1170
1171         default:
1172                 /* unknown / invalid response */
1173                 goto err_out;
1174         }
1175
1176         return;
1177
1178 err_out:
1179         printk(KERN_WARNING DRV_NAME "(%s): BUG: unhandled message type %d/%d\n",
1180                pci_name(host->pdev), crq->msg_type, crq->msg_subtype);
1181         carm_end_rq(host, crq, 0);
1182 }
1183
1184 static inline void carm_handle_responses(struct carm_host *host)
1185 {
1186         void __iomem *mmio = host->mmio;
1187         struct carm_response *resp = (struct carm_response *) host->shm;
1188         unsigned int work = 0;
1189         unsigned int idx = host->resp_idx % RMSG_Q_LEN;
1190
1191         while (1) {
1192                 u32 status = le32_to_cpu(resp[idx].status);
1193
1194                 if (status == 0xffffffff) {
1195                         VPRINTK("ending response on index %u\n", idx);
1196                         writel(idx << 3, mmio + CARM_RESP_IDX);
1197                         break;
1198                 }
1199
1200                 /* response to a message we sent */
1201                 else if ((status & (1 << 31)) == 0) {
1202                         VPRINTK("handling msg response on index %u\n", idx);
1203                         carm_handle_resp(host, resp[idx].ret_handle, status);
1204                         resp[idx].status = cpu_to_le32(0xffffffff);
1205                 }
1206
1207                 /* asynchronous events the hardware throws our way */
1208                 else if ((status & 0xff000000) == (1 << 31)) {
1209                         u8 *evt_type_ptr = (u8 *) &resp[idx];
1210                         u8 evt_type = *evt_type_ptr;
1211                         printk(KERN_WARNING DRV_NAME "(%s): unhandled event type %d\n",
1212                                pci_name(host->pdev), (int) evt_type);
1213                         resp[idx].status = cpu_to_le32(0xffffffff);
1214                 }
1215
1216                 idx = NEXT_RESP(idx);
1217                 work++;
1218         }
1219
1220         VPRINTK("EXIT, work==%u\n", work);
1221         host->resp_idx += work;
1222 }
1223
1224 static irqreturn_t carm_interrupt(int irq, void *__host, struct pt_regs *regs)
1225 {
1226         struct carm_host *host = __host;
1227         void __iomem *mmio;
1228         u32 mask;
1229         int handled = 0;
1230         unsigned long flags;
1231
1232         if (!host) {
1233                 VPRINTK("no host\n");
1234                 return IRQ_NONE;
1235         }
1236
1237         spin_lock_irqsave(&host->lock, flags);
1238
1239         mmio = host->mmio;
1240
1241         /* reading should also clear interrupts */
1242         mask = readl(mmio + CARM_INT_STAT);
1243
1244         if (mask == 0 || mask == 0xffffffff) {
1245                 VPRINTK("no work, mask == 0x%x\n", mask);
1246                 goto out;
1247         }
1248
1249         if (mask & INT_ACK_MASK)
1250                 writel(mask, mmio + CARM_INT_STAT);
1251
1252         if (unlikely(host->state == HST_INVALID)) {
1253                 VPRINTK("not initialized yet, mask = 0x%x\n", mask);
1254                 goto out;
1255         }
1256
1257         if (mask & CARM_HAVE_RESP) {
1258                 handled = 1;
1259                 carm_handle_responses(host);
1260         }
1261
1262 out:
1263         spin_unlock_irqrestore(&host->lock, flags);
1264         VPRINTK("EXIT\n");
1265         return IRQ_RETVAL(handled);
1266 }
1267
1268 static void carm_fsm_task (void *_data)
1269 {
1270         struct carm_host *host = _data;
1271         unsigned long flags;
1272         unsigned int state;
1273         int rc, i, next_dev;
1274         int reschedule = 0;
1275         int new_state = HST_INVALID;
1276
1277         spin_lock_irqsave(&host->lock, flags);
1278         state = host->state;
1279         spin_unlock_irqrestore(&host->lock, flags);
1280
1281         DPRINTK("ENTER, state == %s\n", state_name[state]);
1282
1283         switch (state) {
1284         case HST_PROBE_START:
1285                 new_state = HST_ALLOC_BUF;
1286                 reschedule = 1;
1287                 break;
1288
1289         case HST_ALLOC_BUF:
1290                 rc = carm_send_special(host, carm_fill_alloc_buf);
1291                 if (rc) {
1292                         new_state = HST_ERROR;
1293                         reschedule = 1;
1294                 }
1295                 break;
1296
1297         case HST_SYNC_TIME:
1298                 rc = carm_send_special(host, carm_fill_sync_time);
1299                 if (rc) {
1300                         new_state = HST_ERROR;
1301                         reschedule = 1;
1302                 }
1303                 break;
1304
1305         case HST_GET_FW_VER:
1306                 rc = carm_send_special(host, carm_fill_get_fw_ver);
1307                 if (rc) {
1308                         new_state = HST_ERROR;
1309                         reschedule = 1;
1310                 }
1311                 break;
1312
1313         case HST_PORT_SCAN:
1314                 rc = carm_send_special(host, carm_fill_scan_channels);
1315                 if (rc) {
1316                         new_state = HST_ERROR;
1317                         reschedule = 1;
1318                 }
1319                 break;
1320
1321         case HST_DEV_SCAN_START:
1322                 host->cur_scan_dev = -1;
1323                 new_state = HST_DEV_SCAN;
1324                 reschedule = 1;
1325                 break;
1326
1327         case HST_DEV_SCAN:
1328                 next_dev = -1;
1329                 for (i = host->cur_scan_dev + 1; i < CARM_MAX_PORTS; i++)
1330                         if (host->dev_present & (1 << i)) {
1331                                 next_dev = i;
1332                                 break;
1333                         }
1334
1335                 if (next_dev >= 0) {
1336                         host->cur_scan_dev = next_dev;
1337                         rc = carm_array_info(host, next_dev);
1338                         if (rc) {
1339                                 new_state = HST_ERROR;
1340                                 reschedule = 1;
1341                         }
1342                 } else {
1343                         new_state = HST_DEV_ACTIVATE;
1344                         reschedule = 1;
1345                 }
1346                 break;
1347
1348         case HST_DEV_ACTIVATE: {
1349                 int activated = 0;
1350                 for (i = 0; i < CARM_MAX_PORTS; i++)
1351                         if (host->dev_active & (1 << i)) {
1352                                 struct carm_port *port = &host->port[i];
1353                                 struct gendisk *disk = port->disk;
1354
1355                                 set_capacity(disk, port->capacity);
1356                                 add_disk(disk);
1357                                 activated++;
1358                         }
1359
1360                 printk(KERN_INFO DRV_NAME "(%s): %d ports activated\n",
1361                        pci_name(host->pdev), activated);
1362
1363                 new_state = HST_PROBE_FINISHED;
1364                 reschedule = 1;
1365                 break;
1366         }
1367
1368         case HST_PROBE_FINISHED:
1369                 up(&host->probe_sem);
1370                 break;
1371
1372         case HST_ERROR:
1373                 /* FIXME: TODO */
1374                 break;
1375
1376         default:
1377                 /* should never occur */
1378                 printk(KERN_ERR PFX "BUG: unknown state %d\n", state);
1379                 assert(0);
1380                 break;
1381         }
1382
1383         if (new_state != HST_INVALID) {
1384                 spin_lock_irqsave(&host->lock, flags);
1385                 host->state = new_state;
1386                 spin_unlock_irqrestore(&host->lock, flags);
1387         }
1388         if (reschedule)
1389                 schedule_work(&host->fsm_task);
1390 }
1391
1392 static int carm_init_wait(void __iomem *mmio, u32 bits, unsigned int test_bit)
1393 {
1394         unsigned int i;
1395
1396         for (i = 0; i < 50000; i++) {
1397                 u32 tmp = readl(mmio + CARM_LMUC);
1398                 udelay(100);
1399
1400                 if (test_bit) {
1401                         if ((tmp & bits) == bits)
1402                                 return 0;
1403                 } else {
1404                         if ((tmp & bits) == 0)
1405                                 return 0;
1406                 }
1407
1408                 cond_resched();
1409         }
1410
1411         printk(KERN_ERR PFX "carm_init_wait timeout, bits == 0x%x, test_bit == %s\n",
1412                bits, test_bit ? "yes" : "no");
1413         return -EBUSY;
1414 }
1415
1416 static void carm_init_responses(struct carm_host *host)
1417 {
1418         void __iomem *mmio = host->mmio;
1419         unsigned int i;
1420         struct carm_response *resp = (struct carm_response *) host->shm;
1421
1422         for (i = 0; i < RMSG_Q_LEN; i++)
1423                 resp[i].status = cpu_to_le32(0xffffffff);
1424
1425         writel(0, mmio + CARM_RESP_IDX);
1426 }
1427
1428 static int carm_init_host(struct carm_host *host)
1429 {
1430         void __iomem *mmio = host->mmio;
1431         u32 tmp;
1432         u8 tmp8;
1433         int rc;
1434
1435         DPRINTK("ENTER\n");
1436
1437         writel(0, mmio + CARM_INT_MASK);
1438
1439         tmp8 = readb(mmio + CARM_INITC);
1440         if (tmp8 & 0x01) {
1441                 tmp8 &= ~0x01;
1442                 writeb(tmp8, mmio + CARM_INITC);
1443                 readb(mmio + CARM_INITC);       /* flush */
1444
1445                 DPRINTK("snooze...\n");
1446                 msleep(5000);
1447         }
1448
1449         tmp = readl(mmio + CARM_HMUC);
1450         if (tmp & CARM_CME) {
1451                 DPRINTK("CME bit present, waiting\n");
1452                 rc = carm_init_wait(mmio, CARM_CME, 1);
1453                 if (rc) {
1454                         DPRINTK("EXIT, carm_init_wait 1 failed\n");
1455                         return rc;
1456                 }
1457         }
1458         if (tmp & CARM_RME) {
1459                 DPRINTK("RME bit present, waiting\n");
1460                 rc = carm_init_wait(mmio, CARM_RME, 1);
1461                 if (rc) {
1462                         DPRINTK("EXIT, carm_init_wait 2 failed\n");
1463                         return rc;
1464                 }
1465         }
1466
1467         tmp &= ~(CARM_RME | CARM_CME);
1468         writel(tmp, mmio + CARM_HMUC);
1469         readl(mmio + CARM_HMUC);        /* flush */
1470
1471         rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 0);
1472         if (rc) {
1473                 DPRINTK("EXIT, carm_init_wait 3 failed\n");
1474                 return rc;
1475         }
1476
1477         carm_init_buckets(mmio);
1478
1479         writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO);
1480         writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI);
1481         writel(RBUF_LEN, mmio + RBUF_BYTE_SZ);
1482
1483         tmp = readl(mmio + CARM_HMUC);
1484         tmp |= (CARM_RME | CARM_CME | CARM_WZBC);
1485         writel(tmp, mmio + CARM_HMUC);
1486         readl(mmio + CARM_HMUC);        /* flush */
1487
1488         rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 1);
1489         if (rc) {
1490                 DPRINTK("EXIT, carm_init_wait 4 failed\n");
1491                 return rc;
1492         }
1493
1494         writel(0, mmio + CARM_HMPHA);
1495         writel(INT_DEF_MASK, mmio + CARM_INT_MASK);
1496
1497         carm_init_responses(host);
1498
1499         /* start initialization, probing state machine */
1500         spin_lock_irq(&host->lock);
1501         assert(host->state == HST_INVALID);
1502         host->state = HST_PROBE_START;
1503         spin_unlock_irq(&host->lock);
1504         schedule_work(&host->fsm_task);
1505
1506         DPRINTK("EXIT\n");
1507         return 0;
1508 }
1509
1510 static int carm_init_disks(struct carm_host *host)
1511 {
1512         unsigned int i;
1513         int rc = 0;
1514
1515         for (i = 0; i < CARM_MAX_PORTS; i++) {
1516                 struct gendisk *disk;
1517                 request_queue_t *q;
1518                 struct carm_port *port;
1519
1520                 port = &host->port[i];
1521                 port->host = host;
1522                 port->port_no = i;
1523
1524                 disk = alloc_disk(CARM_MINORS_PER_MAJOR);
1525                 if (!disk) {
1526                         rc = -ENOMEM;
1527                         break;
1528                 }
1529
1530                 port->disk = disk;
1531                 sprintf(disk->disk_name, DRV_NAME "/%u",
1532                         (unsigned int) (host->id * CARM_MAX_PORTS) + i);
1533                 sprintf(disk->devfs_name, DRV_NAME "/%u_%u", host->id, i);
1534                 disk->major = host->major;
1535                 disk->first_minor = i * CARM_MINORS_PER_MAJOR;
1536                 disk->fops = &carm_bd_ops;
1537                 disk->private_data = port;
1538
1539                 q = blk_init_queue(carm_rq_fn, &host->lock);
1540                 if (!q) {
1541                         rc = -ENOMEM;
1542                         break;
1543                 }
1544                 disk->queue = q;
1545                 blk_queue_max_hw_segments(q, CARM_MAX_REQ_SG);
1546                 blk_queue_max_phys_segments(q, CARM_MAX_REQ_SG);
1547                 blk_queue_segment_boundary(q, CARM_SG_BOUNDARY);
1548
1549                 q->queuedata = port;
1550         }
1551
1552         return rc;
1553 }
1554
1555 static void carm_free_disks(struct carm_host *host)
1556 {
1557         unsigned int i;
1558
1559         for (i = 0; i < CARM_MAX_PORTS; i++) {
1560                 struct gendisk *disk = host->port[i].disk;
1561                 if (disk) {
1562                         request_queue_t *q = disk->queue;
1563
1564                         if (disk->flags & GENHD_FL_UP)
1565                                 del_gendisk(disk);
1566                         if (q)
1567                                 blk_cleanup_queue(q);
1568                         put_disk(disk);
1569                 }
1570         }
1571 }
1572
1573 static int carm_init_shm(struct carm_host *host)
1574 {
1575         host->shm = pci_alloc_consistent(host->pdev, CARM_SHM_SIZE,
1576                                          &host->shm_dma);
1577         if (!host->shm)
1578                 return -ENOMEM;
1579
1580         host->msg_base = host->shm + RBUF_LEN;
1581         host->msg_dma = host->shm_dma + RBUF_LEN;
1582
1583         memset(host->shm, 0xff, RBUF_LEN);
1584         memset(host->msg_base, 0, PDC_SHM_SIZE - RBUF_LEN);
1585
1586         return 0;
1587 }
1588
1589 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1590 {
1591         static unsigned int printed_version;
1592         struct carm_host *host;
1593         unsigned int pci_dac;
1594         int rc;
1595         request_queue_t *q;
1596         unsigned int i;
1597
1598         if (!printed_version++)
1599                 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
1600
1601         rc = pci_enable_device(pdev);
1602         if (rc)
1603                 return rc;
1604
1605         rc = pci_request_regions(pdev, DRV_NAME);
1606         if (rc)
1607                 goto err_out;
1608
1609 #ifdef IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1610         rc = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1611         if (!rc) {
1612                 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1613                 if (rc) {
1614                         printk(KERN_ERR DRV_NAME "(%s): consistent DMA mask failure\n",
1615                                 pci_name(pdev));
1616                         goto err_out_regions;
1617                 }
1618                 pci_dac = 1;
1619         } else {
1620 #endif
1621                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1622                 if (rc) {
1623                         printk(KERN_ERR DRV_NAME "(%s): DMA mask failure\n",
1624                                 pci_name(pdev));
1625                         goto err_out_regions;
1626                 }
1627                 pci_dac = 0;
1628 #ifdef IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1629         }
1630 #endif
1631
1632         host = kmalloc(sizeof(*host), GFP_KERNEL);
1633         if (!host) {
1634                 printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n",
1635                        pci_name(pdev));
1636                 rc = -ENOMEM;
1637                 goto err_out_regions;
1638         }
1639
1640         memset(host, 0, sizeof(*host));
1641         host->pdev = pdev;
1642         host->flags = pci_dac ? FL_DAC : 0;
1643         spin_lock_init(&host->lock);
1644         INIT_WORK(&host->fsm_task, carm_fsm_task, host);
1645         init_MUTEX_LOCKED(&host->probe_sem);
1646
1647         for (i = 0; i < ARRAY_SIZE(host->req); i++)
1648                 host->req[i].tag = i;
1649
1650         host->mmio = ioremap(pci_resource_start(pdev, 0),
1651                              pci_resource_len(pdev, 0));
1652         if (!host->mmio) {
1653                 printk(KERN_ERR DRV_NAME "(%s): MMIO alloc failure\n",
1654                        pci_name(pdev));
1655                 rc = -ENOMEM;
1656                 goto err_out_kfree;
1657         }
1658
1659         rc = carm_init_shm(host);
1660         if (rc) {
1661                 printk(KERN_ERR DRV_NAME "(%s): DMA SHM alloc failure\n",
1662                        pci_name(pdev));
1663                 goto err_out_iounmap;
1664         }
1665
1666         q = blk_init_queue(carm_oob_rq_fn, &host->lock);
1667         if (!q) {
1668                 printk(KERN_ERR DRV_NAME "(%s): OOB queue alloc failure\n",
1669                        pci_name(pdev));
1670                 rc = -ENOMEM;
1671                 goto err_out_pci_free;
1672         }
1673         host->oob_q = q;
1674         q->queuedata = host;
1675
1676         /*
1677          * Figure out which major to use: 160, 161, or dynamic
1678          */
1679         if (!test_and_set_bit(0, &carm_major_alloc))
1680                 host->major = 160;
1681         else if (!test_and_set_bit(1, &carm_major_alloc))
1682                 host->major = 161;
1683         else
1684                 host->flags |= FL_DYN_MAJOR;
1685
1686         host->id = carm_host_id;
1687         sprintf(host->name, DRV_NAME "%d", carm_host_id);
1688
1689         rc = register_blkdev(host->major, host->name);
1690         if (rc < 0)
1691                 goto err_out_free_majors;
1692         if (host->flags & FL_DYN_MAJOR)
1693                 host->major = rc;
1694
1695         devfs_mk_dir(DRV_NAME);
1696
1697         rc = carm_init_disks(host);
1698         if (rc)
1699                 goto err_out_blkdev_disks;
1700
1701         pci_set_master(pdev);
1702
1703         rc = request_irq(pdev->irq, carm_interrupt, SA_SHIRQ, DRV_NAME, host);
1704         if (rc) {
1705                 printk(KERN_ERR DRV_NAME "(%s): irq alloc failure\n",
1706                        pci_name(pdev));
1707                 goto err_out_blkdev_disks;
1708         }
1709
1710         rc = carm_init_host(host);
1711         if (rc)
1712                 goto err_out_free_irq;
1713
1714         DPRINTK("waiting for probe_sem\n");
1715         down(&host->probe_sem);
1716
1717         printk(KERN_INFO "%s: pci %s, ports %d, io %lx, irq %u, major %d\n",
1718                host->name, pci_name(pdev), (int) CARM_MAX_PORTS,
1719                pci_resource_start(pdev, 0), pdev->irq, host->major);
1720
1721         carm_host_id++;
1722         pci_set_drvdata(pdev, host);
1723         return 0;
1724
1725 err_out_free_irq:
1726         free_irq(pdev->irq, host);
1727 err_out_blkdev_disks:
1728         carm_free_disks(host);
1729         unregister_blkdev(host->major, host->name);
1730 err_out_free_majors:
1731         if (host->major == 160)
1732                 clear_bit(0, &carm_major_alloc);
1733         else if (host->major == 161)
1734                 clear_bit(1, &carm_major_alloc);
1735         blk_cleanup_queue(host->oob_q);
1736 err_out_pci_free:
1737         pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1738 err_out_iounmap:
1739         iounmap(host->mmio);
1740 err_out_kfree:
1741         kfree(host);
1742 err_out_regions:
1743         pci_release_regions(pdev);
1744 err_out:
1745         pci_disable_device(pdev);
1746         return rc;
1747 }
1748
1749 static void carm_remove_one (struct pci_dev *pdev)
1750 {
1751         struct carm_host *host = pci_get_drvdata(pdev);
1752
1753         if (!host) {
1754                 printk(KERN_ERR PFX "BUG: no host data for PCI(%s)\n",
1755                        pci_name(pdev));
1756                 return;
1757         }
1758
1759         free_irq(pdev->irq, host);
1760         carm_free_disks(host);
1761         devfs_remove(DRV_NAME);
1762         unregister_blkdev(host->major, host->name);
1763         if (host->major == 160)
1764                 clear_bit(0, &carm_major_alloc);
1765         else if (host->major == 161)
1766                 clear_bit(1, &carm_major_alloc);
1767         blk_cleanup_queue(host->oob_q);
1768         pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1769         iounmap(host->mmio);
1770         kfree(host);
1771         pci_release_regions(pdev);
1772         pci_disable_device(pdev);
1773         pci_set_drvdata(pdev, NULL);
1774 }
1775
1776 static int __init carm_init(void)
1777 {
1778         return pci_module_init(&carm_driver);
1779 }
1780
1781 static void __exit carm_exit(void)
1782 {
1783         pci_unregister_driver(&carm_driver);
1784 }
1785
1786 module_init(carm_init);
1787 module_exit(carm_exit);
1788
1789