drivers/crypto/omap-des.c

   1 /*
   2  * Support for OMAP DES and Triple DES HW acceleration.
   3  *
   4  * Copyright (c) 2013 Texas Instruments Incorporated
   5  * Author: Joel Fernandes <joelf@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  *
  11  */
  12
  13 #define pr_fmt(fmt) "%s: " fmt, __func__
  14
  15 #ifdef DEBUG
  16 #define prn(num) printk(#num "=%d\n", num)
  17 #define prx(num) printk(#num "=%x\n", num)
  18 #else
  19 #define prn(num) do { } while (0)
  20 #define prx(num)  do { } while (0)
  21 #endif
  22
  23 #include <linux/err.h>
  24 #include <linux/module.h>
  25 #include <linux/init.h>
  26 #include <linux/errno.h>
  27 #include <linux/kernel.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/scatterlist.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/dmaengine.h>
  32 #include <linux/pm_runtime.h>
  33 #include <linux/of.h>
  34 #include <linux/of_device.h>
  35 #include <linux/of_address.h>
  36 #include <linux/io.h>
  37 #include <linux/crypto.h>
  38 #include <linux/interrupt.h>
  39 #include <crypto/scatterwalk.h>
  40 #include <crypto/des.h>
  41 #include <crypto/algapi.h>
  42
  43 #define DST_MAXBURST                    2
  44
  45 #define DES_BLOCK_WORDS         (DES_BLOCK_SIZE >> 2)
  46
  47 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
  48
  49 #define DES_REG_KEY(dd, x)              ((dd)->pdata->key_ofs - \
  50                                                 ((x ^ 0x01) * 0x04))
  51
  52 #define DES_REG_IV(dd, x)               ((dd)->pdata->iv_ofs + ((x) * 0x04))
  53
  54 #define DES_REG_CTRL(dd)                ((dd)->pdata->ctrl_ofs)
  55 #define DES_REG_CTRL_CBC                BIT(4)
  56 #define DES_REG_CTRL_TDES               BIT(3)
  57 #define DES_REG_CTRL_DIRECTION          BIT(2)
  58 #define DES_REG_CTRL_INPUT_READY        BIT(1)
  59 #define DES_REG_CTRL_OUTPUT_READY       BIT(0)
  60
  61 #define DES_REG_DATA_N(dd, x)           ((dd)->pdata->data_ofs + ((x) * 0x04))
  62
  63 #define DES_REG_REV(dd)                 ((dd)->pdata->rev_ofs)
  64
  65 #define DES_REG_MASK(dd)                ((dd)->pdata->mask_ofs)
  66
  67 #define DES_REG_LENGTH_N(x)             (0x24 + ((x) * 0x04))
  68
  69 #define DES_REG_IRQ_STATUS(dd)         ((dd)->pdata->irq_status_ofs)
  70 #define DES_REG_IRQ_ENABLE(dd)         ((dd)->pdata->irq_enable_ofs)
  71 #define DES_REG_IRQ_DATA_IN            BIT(1)
  72 #define DES_REG_IRQ_DATA_OUT           BIT(2)
  73
  74 #define FLAGS_MODE_MASK         0x000f
  75 #define FLAGS_ENCRYPT           BIT(0)
  76 #define FLAGS_CBC               BIT(1)
  77 #define FLAGS_INIT              BIT(4)
  78 #define FLAGS_BUSY              BIT(6)
  79
  80 struct omap_des_ctx {
  81         struct omap_des_dev *dd;
  82
  83         int             keylen;
  84         u32             key[(3 * DES_KEY_SIZE) / sizeof(u32)];
  85         unsigned long   flags;
  86 };
  87
  88 struct omap_des_reqctx {
  89         unsigned long mode;
  90 };
  91
  92 #define OMAP_DES_QUEUE_LENGTH   1
  93 #define OMAP_DES_CACHE_SIZE     0
  94
  95 struct omap_des_algs_info {
  96         struct crypto_alg       *algs_list;
  97         unsigned int            size;
  98         unsigned int            registered;
  99 };
 100
 101 struct omap_des_pdata {
 102         struct omap_des_algs_info       *algs_info;
 103         unsigned int    algs_info_size;
 104
 105         void            (*trigger)(struct omap_des_dev *dd, int length);
 106
 107         u32             key_ofs;
 108         u32             iv_ofs;
 109         u32             ctrl_ofs;
 110         u32             data_ofs;
 111         u32             rev_ofs;
 112         u32             mask_ofs;
 113         u32             irq_enable_ofs;
 114         u32             irq_status_ofs;
 115
 116         u32             dma_enable_in;
 117         u32             dma_enable_out;
 118         u32             dma_start;
 119
 120         u32             major_mask;
 121         u32             major_shift;
 122         u32             minor_mask;
 123         u32             minor_shift;
 124 };
 125
 126 struct omap_des_dev {
 127         struct list_head        list;
 128         unsigned long           phys_base;
 129         void __iomem            *io_base;
 130         struct omap_des_ctx     *ctx;
 131         struct device           *dev;
 132         unsigned long           flags;
 133         int                     err;
 134
 135         struct tasklet_struct   done_task;
 136
 137         struct ablkcipher_request       *req;
 138         struct crypto_engine            *engine;
 139         /*
 140          * total is used by PIO mode for book keeping so introduce
 141          * variable total_save as need it to calc page_order
 142          */
 143         size_t                          total;
 144         size_t                          total_save;
 145
 146         struct scatterlist              *in_sg;
 147         struct scatterlist              *out_sg;
 148
 149         /* Buffers for copying for unaligned cases */
 150         struct scatterlist              in_sgl;
 151         struct scatterlist              out_sgl;
 152         struct scatterlist              *orig_out;
 153         int                             sgs_copied;
 154
 155         struct scatter_walk             in_walk;
 156         struct scatter_walk             out_walk;
 157         struct dma_chan         *dma_lch_in;
 158         struct dma_chan         *dma_lch_out;
 159         int                     in_sg_len;
 160         int                     out_sg_len;
 161         int                     pio_only;
 162         const struct omap_des_pdata     *pdata;
 163 };
 164
 165 /* keep registered devices data here */
 166 static LIST_HEAD(dev_list);
 167 static DEFINE_SPINLOCK(list_lock);
 168
 169 #ifdef DEBUG
 170 #define omap_des_read(dd, offset)                               \
 171         ({                                                              \
 172          int _read_ret;                                          \
 173          _read_ret = __raw_readl(dd->io_base + offset);          \
 174          pr_err("omap_des_read(" #offset "=%#x)= %#x\n",       \
 175                  offset, _read_ret);                            \
 176          _read_ret;                                              \
 177          })
 178 #else
 179 static inline u32 omap_des_read(struct omap_des_dev *dd, u32 offset)
 180 {
 181         return __raw_readl(dd->io_base + offset);
 182 }
 183 #endif
 184
 185 #ifdef DEBUG
 186 #define omap_des_write(dd, offset, value)                               \
 187         do {                                                            \
 188                 pr_err("omap_des_write(" #offset "=%#x) value=%#x\n", \
 189                                 offset, value);                                \
 190                 __raw_writel(value, dd->io_base + offset);              \
 191         } while (0)
 192 #else
 193 static inline void omap_des_write(struct omap_des_dev *dd, u32 offset,
 194                 u32 value)
 195 {
 196         __raw_writel(value, dd->io_base + offset);
 197 }
 198 #endif
 199
 200 static inline void omap_des_write_mask(struct omap_des_dev *dd, u32 offset,
 201                                         u32 value, u32 mask)
 202 {
 203         u32 val;
 204
 205         val = omap_des_read(dd, offset);
 206         val &= ~mask;
 207         val |= value;
 208         omap_des_write(dd, offset, val);
 209 }
 210
 211 static void omap_des_write_n(struct omap_des_dev *dd, u32 offset,
 212                                         u32 *value, int count)
 213 {
 214         for (; count--; value++, offset += 4)
 215                 omap_des_write(dd, offset, *value);
 216 }
 217
 218 static int omap_des_hw_init(struct omap_des_dev *dd)
 219 {
 220         int err;
 221
 222         /*
 223          * clocks are enabled when request starts and disabled when finished.
 224          * It may be long delays between requests.
 225          * Device might go to off mode to save power.
 226          */
 227         err = pm_runtime_get_sync(dd->dev);
 228         if (err < 0) {
 229                 pm_runtime_put_noidle(dd->dev);
 230                 dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
 231                 return err;
 232         }
 233
 234         if (!(dd->flags & FLAGS_INIT)) {
 235                 dd->flags |= FLAGS_INIT;
 236                 dd->err = 0;
 237         }
 238
 239         return 0;
 240 }
 241
 242 static int omap_des_write_ctrl(struct omap_des_dev *dd)
 243 {
 244         unsigned int key32;
 245         int i, err;
 246         u32 val = 0, mask = 0;
 247
 248         err = omap_des_hw_init(dd);
 249         if (err)
 250                 return err;
 251
 252         key32 = dd->ctx->keylen / sizeof(u32);
 253
 254         /* it seems a key should always be set even if it has not changed */
 255         for (i = 0; i < key32; i++) {
 256                 omap_des_write(dd, DES_REG_KEY(dd, i),
 257                                __le32_to_cpu(dd->ctx->key[i]));
 258         }
 259
 260         if ((dd->flags & FLAGS_CBC) && dd->req->info)
 261                 omap_des_write_n(dd, DES_REG_IV(dd, 0), dd->req->info, 2);
 262
 263         if (dd->flags & FLAGS_CBC)
 264                 val |= DES_REG_CTRL_CBC;
 265         if (dd->flags & FLAGS_ENCRYPT)
 266                 val |= DES_REG_CTRL_DIRECTION;
 267         if (key32 == 6)
 268                 val |= DES_REG_CTRL_TDES;
 269
 270         mask |= DES_REG_CTRL_CBC | DES_REG_CTRL_DIRECTION | DES_REG_CTRL_TDES;
 271
 272         omap_des_write_mask(dd, DES_REG_CTRL(dd), val, mask);
 273
 274         return 0;
 275 }
 276
 277 static void omap_des_dma_trigger_omap4(struct omap_des_dev *dd, int length)
 278 {
 279         u32 mask, val;
 280
 281         omap_des_write(dd, DES_REG_LENGTH_N(0), length);
 282
 283         val = dd->pdata->dma_start;
 284
 285         if (dd->dma_lch_out != NULL)
 286                 val |= dd->pdata->dma_enable_out;
 287         if (dd->dma_lch_in != NULL)
 288                 val |= dd->pdata->dma_enable_in;
 289
 290         mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
 291                dd->pdata->dma_start;
 292
 293         omap_des_write_mask(dd, DES_REG_MASK(dd), val, mask);
 294 }
 295
 296 static void omap_des_dma_stop(struct omap_des_dev *dd)
 297 {
 298         u32 mask;
 299
 300         mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
 301                dd->pdata->dma_start;
 302
 303         omap_des_write_mask(dd, DES_REG_MASK(dd), 0, mask);
 304 }
 305
 306 static struct omap_des_dev *omap_des_find_dev(struct omap_des_ctx *ctx)
 307 {
 308         struct omap_des_dev *dd = NULL, *tmp;
 309
 310         spin_lock_bh(&list_lock);
 311         if (!ctx->dd) {
 312                 list_for_each_entry(tmp, &dev_list, list) {
 313                         /* FIXME: take fist available des core */
 314                         dd = tmp;
 315                         break;
 316                 }
 317                 ctx->dd = dd;
 318         } else {
 319                 /* already found before */
 320                 dd = ctx->dd;
 321         }
 322         spin_unlock_bh(&list_lock);
 323
 324         return dd;
 325 }
 326
 327 static void omap_des_dma_out_callback(void *data)
 328 {
 329         struct omap_des_dev *dd = data;
 330
 331         /* dma_lch_out - completed */
 332         tasklet_schedule(&dd->done_task);
 333 }
 334
 335 static int omap_des_dma_init(struct omap_des_dev *dd)
 336 {
 337         int err;
 338
 339         dd->dma_lch_out = NULL;
 340         dd->dma_lch_in = NULL;
 341
 342         dd->dma_lch_in = dma_request_chan(dd->dev, "rx");
 343         if (IS_ERR(dd->dma_lch_in)) {
 344                 dev_err(dd->dev, "Unable to request in DMA channel\n");
 345                 return PTR_ERR(dd->dma_lch_in);
 346         }
 347
 348         dd->dma_lch_out = dma_request_chan(dd->dev, "tx");
 349         if (IS_ERR(dd->dma_lch_out)) {
 350                 dev_err(dd->dev, "Unable to request out DMA channel\n");
 351                 err = PTR_ERR(dd->dma_lch_out);
 352                 goto err_dma_out;
 353         }
 354
 355         return 0;
 356
 357 err_dma_out:
 358         dma_release_channel(dd->dma_lch_in);
 359
 360         return err;
 361 }
 362
 363 static void omap_des_dma_cleanup(struct omap_des_dev *dd)
 364 {
 365         if (dd->pio_only)
 366                 return;
 367
 368         dma_release_channel(dd->dma_lch_out);
 369         dma_release_channel(dd->dma_lch_in);
 370 }
 371
 372 static void sg_copy_buf(void *buf, struct scatterlist *sg,
 373                               unsigned int start, unsigned int nbytes, int out)
 374 {
 375         struct scatter_walk walk;
 376
 377         if (!nbytes)
 378                 return;
 379
 380         scatterwalk_start(&walk, sg);
 381         scatterwalk_advance(&walk, start);
 382         scatterwalk_copychunks(buf, &walk, nbytes, out);
 383         scatterwalk_done(&walk, out, 0);
 384 }
 385
 386 static int omap_des_crypt_dma(struct crypto_tfm *tfm,
 387                 struct scatterlist *in_sg, struct scatterlist *out_sg,
 388                 int in_sg_len, int out_sg_len)
 389 {
 390         struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
 391         struct omap_des_dev *dd = ctx->dd;
 392         struct dma_async_tx_descriptor *tx_in, *tx_out;
 393         struct dma_slave_config cfg;
 394         int ret;
 395
 396         if (dd->pio_only) {
 397                 scatterwalk_start(&dd->in_walk, dd->in_sg);
 398                 scatterwalk_start(&dd->out_walk, dd->out_sg);
 399
 400                 /* Enable DATAIN interrupt and let it take
 401                    care of the rest */
 402                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
 403                 return 0;
 404         }
 405
 406         dma_sync_sg_for_device(dd->dev, dd->in_sg, in_sg_len, DMA_TO_DEVICE);
 407
 408         memset(&cfg, 0, sizeof(cfg));
 409
 410         cfg.src_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
 411         cfg.dst_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
 412         cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 413         cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 414         cfg.src_maxburst = DST_MAXBURST;
 415         cfg.dst_maxburst = DST_MAXBURST;
 416
 417         /* IN */
 418         ret = dmaengine_slave_config(dd->dma_lch_in, &cfg);
 419         if (ret) {
 420                 dev_err(dd->dev, "can't configure IN dmaengine slave: %d\n",
 421                         ret);
 422                 return ret;
 423         }
 424
 425         tx_in = dmaengine_prep_slave_sg(dd->dma_lch_in, in_sg, in_sg_len,
 426                                         DMA_MEM_TO_DEV,
 427                                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 428         if (!tx_in) {
 429                 dev_err(dd->dev, "IN prep_slave_sg() failed\n");
 430                 return -EINVAL;
 431         }
 432
 433         /* No callback necessary */
 434         tx_in->callback_param = dd;
 435
 436         /* OUT */
 437         ret = dmaengine_slave_config(dd->dma_lch_out, &cfg);
 438         if (ret) {
 439                 dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n",
 440                         ret);
 441                 return ret;
 442         }
 443
 444         tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, out_sg_len,
 445                                         DMA_DEV_TO_MEM,
 446                                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 447         if (!tx_out) {
 448                 dev_err(dd->dev, "OUT prep_slave_sg() failed\n");
 449                 return -EINVAL;
 450         }
 451
 452         tx_out->callback = omap_des_dma_out_callback;
 453         tx_out->callback_param = dd;
 454
 455         dmaengine_submit(tx_in);
 456         dmaengine_submit(tx_out);
 457
 458         dma_async_issue_pending(dd->dma_lch_in);
 459         dma_async_issue_pending(dd->dma_lch_out);
 460
 461         /* start DMA */
 462         dd->pdata->trigger(dd, dd->total);
 463
 464         return 0;
 465 }
 466
 467 static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
 468 {
 469         struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
 470                                         crypto_ablkcipher_reqtfm(dd->req));
 471         int err;
 472
 473         pr_debug("total: %d\n", dd->total);
 474
 475         if (!dd->pio_only) {
 476                 err = dma_map_sg(dd->dev, dd->in_sg, dd->in_sg_len,
 477                                  DMA_TO_DEVICE);
 478                 if (!err) {
 479                         dev_err(dd->dev, "dma_map_sg() error\n");
 480                         return -EINVAL;
 481                 }
 482
 483                 err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 484                                  DMA_FROM_DEVICE);
 485                 if (!err) {
 486                         dev_err(dd->dev, "dma_map_sg() error\n");
 487                         return -EINVAL;
 488                 }
 489         }
 490
 491         err = omap_des_crypt_dma(tfm, dd->in_sg, dd->out_sg, dd->in_sg_len,
 492                                  dd->out_sg_len);
 493         if (err && !dd->pio_only) {
 494                 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
 495                 dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 496                              DMA_FROM_DEVICE);
 497         }
 498
 499         return err;
 500 }
 501
 502 static void omap_des_finish_req(struct omap_des_dev *dd, int err)
 503 {
 504         struct ablkcipher_request *req = dd->req;
 505
 506         pr_debug("err: %d\n", err);
 507
 508         pm_runtime_put(dd->dev);
 509         crypto_finalize_request(dd->engine, req, err);
 510 }
 511
 512 static int omap_des_crypt_dma_stop(struct omap_des_dev *dd)
 513 {
 514         pr_debug("total: %d\n", dd->total);
 515
 516         omap_des_dma_stop(dd);
 517
 518         dmaengine_terminate_all(dd->dma_lch_in);
 519         dmaengine_terminate_all(dd->dma_lch_out);
 520
 521         return 0;
 522 }
 523
 524 static int omap_des_copy_needed(struct scatterlist *sg)
 525 {
 526         while (sg) {
 527                 if (!IS_ALIGNED(sg->offset, 4))
 528                         return -1;
 529                 if (!IS_ALIGNED(sg->length, DES_BLOCK_SIZE))
 530                         return -1;
 531                 sg = sg_next(sg);
 532         }
 533         return 0;
 534 }
 535
 536 static int omap_des_copy_sgs(struct omap_des_dev *dd)
 537 {
 538         void *buf_in, *buf_out;
 539         int pages;
 540
 541         pages = dd->total >> PAGE_SHIFT;
 542
 543         if (dd->total & (PAGE_SIZE-1))
 544                 pages++;
 545
 546         BUG_ON(!pages);
 547
 548         buf_in = (void *)__get_free_pages(GFP_ATOMIC, pages);
 549         buf_out = (void *)__get_free_pages(GFP_ATOMIC, pages);
 550
 551         if (!buf_in || !buf_out) {
 552                 pr_err("Couldn't allocated pages for unaligned cases.\n");
 553                 return -1;
 554         }
 555
 556         dd->orig_out = dd->out_sg;
 557
 558         sg_copy_buf(buf_in, dd->in_sg, 0, dd->total, 0);
 559
 560         sg_init_table(&dd->in_sgl, 1);
 561         sg_set_buf(&dd->in_sgl, buf_in, dd->total);
 562         dd->in_sg = &dd->in_sgl;
 563
 564         sg_init_table(&dd->out_sgl, 1);
 565         sg_set_buf(&dd->out_sgl, buf_out, dd->total);
 566         dd->out_sg = &dd->out_sgl;
 567
 568         return 0;
 569 }
 570
 571 static int omap_des_handle_queue(struct omap_des_dev *dd,
 572                                  struct ablkcipher_request *req)
 573 {
 574         if (req)
 575                 return crypto_transfer_request_to_engine(dd->engine, req);
 576
 577         return 0;
 578 }
 579
 580 static int omap_des_prepare_req(struct crypto_engine *engine,
 581                                 struct ablkcipher_request *req)
 582 {
 583         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
 584                         crypto_ablkcipher_reqtfm(req));
 585         struct omap_des_dev *dd = omap_des_find_dev(ctx);
 586         struct omap_des_reqctx *rctx;
 587
 588         if (!dd)
 589                 return -ENODEV;
 590
 591         /* assign new request to device */
 592         dd->req = req;
 593         dd->total = req->nbytes;
 594         dd->total_save = req->nbytes;
 595         dd->in_sg = req->src;
 596         dd->out_sg = req->dst;
 597
 598         if (omap_des_copy_needed(dd->in_sg) ||
 599             omap_des_copy_needed(dd->out_sg)) {
 600                 if (omap_des_copy_sgs(dd))
 601                         pr_err("Failed to copy SGs for unaligned cases\n");
 602                 dd->sgs_copied = 1;
 603         } else {
 604                 dd->sgs_copied = 0;
 605         }
 606
 607         dd->in_sg_len = scatterwalk_bytes_sglen(dd->in_sg, dd->total);
 608         dd->out_sg_len = scatterwalk_bytes_sglen(dd->out_sg, dd->total);
 609         BUG_ON(dd->in_sg_len < 0 || dd->out_sg_len < 0);
 610
 611         rctx = ablkcipher_request_ctx(req);
 612         ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
 613         rctx->mode &= FLAGS_MODE_MASK;
 614         dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
 615
 616         dd->ctx = ctx;
 617         ctx->dd = dd;
 618
 619         return omap_des_write_ctrl(dd);
 620 }
 621
 622 static int omap_des_crypt_req(struct crypto_engine *engine,
 623                               struct ablkcipher_request *req)
 624 {
 625         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
 626                         crypto_ablkcipher_reqtfm(req));
 627         struct omap_des_dev *dd = omap_des_find_dev(ctx);
 628
 629         if (!dd)
 630                 return -ENODEV;
 631
 632         return omap_des_crypt_dma_start(dd);
 633 }
 634
 635 static void omap_des_done_task(unsigned long data)
 636 {
 637         struct omap_des_dev *dd = (struct omap_des_dev *)data;
 638         void *buf_in, *buf_out;
 639         int pages;
 640
 641         pr_debug("enter done_task\n");
 642
 643         if (!dd->pio_only) {
 644                 dma_sync_sg_for_device(dd->dev, dd->out_sg, dd->out_sg_len,
 645                                        DMA_FROM_DEVICE);
 646                 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
 647                 dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 648                              DMA_FROM_DEVICE);
 649                 omap_des_crypt_dma_stop(dd);
 650         }
 651
 652         if (dd->sgs_copied) {
 653                 buf_in = sg_virt(&dd->in_sgl);
 654                 buf_out = sg_virt(&dd->out_sgl);
 655
 656                 sg_copy_buf(buf_out, dd->orig_out, 0, dd->total_save, 1);
 657
 658                 pages = get_order(dd->total_save);
 659                 free_pages((unsigned long)buf_in, pages);
 660                 free_pages((unsigned long)buf_out, pages);
 661         }
 662
 663         omap_des_finish_req(dd, 0);
 664
 665         pr_debug("exit\n");
 666 }
 667
 668 static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
 669 {
 670         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
 671                         crypto_ablkcipher_reqtfm(req));
 672         struct omap_des_reqctx *rctx = ablkcipher_request_ctx(req);
 673         struct omap_des_dev *dd;
 674
 675         pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
 676                  !!(mode & FLAGS_ENCRYPT),
 677                  !!(mode & FLAGS_CBC));
 678
 679         if (!IS_ALIGNED(req->nbytes, DES_BLOCK_SIZE)) {
 680                 pr_err("request size is not exact amount of DES blocks\n");
 681                 return -EINVAL;
 682         }
 683
 684         dd = omap_des_find_dev(ctx);
 685         if (!dd)
 686                 return -ENODEV;
 687
 688         rctx->mode = mode;
 689
 690         return omap_des_handle_queue(dd, req);
 691 }
 692
 693 /* ********************** ALG API ************************************ */
 694
 695 static int omap_des_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
 696                            unsigned int keylen)
 697 {
 698         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(tfm);
 699
 700         if (keylen != DES_KEY_SIZE && keylen != (3*DES_KEY_SIZE))
 701                 return -EINVAL;
 702
 703         pr_debug("enter, keylen: %d\n", keylen);
 704
 705         memcpy(ctx->key, key, keylen);
 706         ctx->keylen = keylen;
 707
 708         return 0;
 709 }
 710
 711 static int omap_des_ecb_encrypt(struct ablkcipher_request *req)
 712 {
 713         return omap_des_crypt(req, FLAGS_ENCRYPT);
 714 }
 715
 716 static int omap_des_ecb_decrypt(struct ablkcipher_request *req)
 717 {
 718         return omap_des_crypt(req, 0);
 719 }
 720
 721 static int omap_des_cbc_encrypt(struct ablkcipher_request *req)
 722 {
 723         return omap_des_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
 724 }
 725
 726 static int omap_des_cbc_decrypt(struct ablkcipher_request *req)
 727 {
 728         return omap_des_crypt(req, FLAGS_CBC);
 729 }
 730
 731 static int omap_des_cra_init(struct crypto_tfm *tfm)
 732 {
 733         pr_debug("enter\n");
 734
 735         tfm->crt_ablkcipher.reqsize = sizeof(struct omap_des_reqctx);
 736
 737         return 0;
 738 }
 739
 740 static void omap_des_cra_exit(struct crypto_tfm *tfm)
 741 {
 742         pr_debug("enter\n");
 743 }
 744
 745 /* ********************** ALGS ************************************ */
 746
 747 static struct crypto_alg algs_ecb_cbc[] = {
 748 {
 749         .cra_name               = "ecb(des)",
 750         .cra_driver_name        = "ecb-des-omap",
 751         .cra_priority           = 100,
 752         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 753                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 754                                   CRYPTO_ALG_ASYNC,
 755         .cra_blocksize          = DES_BLOCK_SIZE,
 756         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 757         .cra_alignmask          = 0,
 758         .cra_type               = &crypto_ablkcipher_type,
 759         .cra_module             = THIS_MODULE,
 760         .cra_init               = omap_des_cra_init,
 761         .cra_exit               = omap_des_cra_exit,
 762         .cra_u.ablkcipher = {
 763                 .min_keysize    = DES_KEY_SIZE,
 764                 .max_keysize    = DES_KEY_SIZE,
 765                 .setkey         = omap_des_setkey,
 766                 .encrypt        = omap_des_ecb_encrypt,
 767                 .decrypt        = omap_des_ecb_decrypt,
 768         }
 769 },
 770 {
 771         .cra_name               = "cbc(des)",
 772         .cra_driver_name        = "cbc-des-omap",
 773         .cra_priority           = 100,
 774         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 775                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 776                                   CRYPTO_ALG_ASYNC,
 777         .cra_blocksize          = DES_BLOCK_SIZE,
 778         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 779         .cra_alignmask          = 0,
 780         .cra_type               = &crypto_ablkcipher_type,
 781         .cra_module             = THIS_MODULE,
 782         .cra_init               = omap_des_cra_init,
 783         .cra_exit               = omap_des_cra_exit,
 784         .cra_u.ablkcipher = {
 785                 .min_keysize    = DES_KEY_SIZE,
 786                 .max_keysize    = DES_KEY_SIZE,
 787                 .ivsize         = DES_BLOCK_SIZE,
 788                 .setkey         = omap_des_setkey,
 789                 .encrypt        = omap_des_cbc_encrypt,
 790                 .decrypt        = omap_des_cbc_decrypt,
 791         }
 792 },
 793 {
 794         .cra_name               = "ecb(des3_ede)",
 795         .cra_driver_name        = "ecb-des3-omap",
 796         .cra_priority           = 100,
 797         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 798                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 799                                   CRYPTO_ALG_ASYNC,
 800         .cra_blocksize          = DES_BLOCK_SIZE,
 801         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 802         .cra_alignmask          = 0,
 803         .cra_type               = &crypto_ablkcipher_type,
 804         .cra_module             = THIS_MODULE,
 805         .cra_init               = omap_des_cra_init,
 806         .cra_exit               = omap_des_cra_exit,
 807         .cra_u.ablkcipher = {
 808                 .min_keysize    = 3*DES_KEY_SIZE,
 809                 .max_keysize    = 3*DES_KEY_SIZE,
 810                 .setkey         = omap_des_setkey,
 811                 .encrypt        = omap_des_ecb_encrypt,
 812                 .decrypt        = omap_des_ecb_decrypt,
 813         }
 814 },
 815 {
 816         .cra_name               = "cbc(des3_ede)",
 817         .cra_driver_name        = "cbc-des3-omap",
 818         .cra_priority           = 100,
 819         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 820                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 821                                   CRYPTO_ALG_ASYNC,
 822         .cra_blocksize          = DES_BLOCK_SIZE,
 823         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 824         .cra_alignmask          = 0,
 825         .cra_type               = &crypto_ablkcipher_type,
 826         .cra_module             = THIS_MODULE,
 827         .cra_init               = omap_des_cra_init,
 828         .cra_exit               = omap_des_cra_exit,
 829         .cra_u.ablkcipher = {
 830                 .min_keysize    = 3*DES_KEY_SIZE,
 831                 .max_keysize    = 3*DES_KEY_SIZE,
 832                 .ivsize         = DES_BLOCK_SIZE,
 833                 .setkey         = omap_des_setkey,
 834                 .encrypt        = omap_des_cbc_encrypt,
 835                 .decrypt        = omap_des_cbc_decrypt,
 836         }
 837 }
 838 };
 839
 840 static struct omap_des_algs_info omap_des_algs_info_ecb_cbc[] = {
 841         {
 842                 .algs_list      = algs_ecb_cbc,
 843                 .size           = ARRAY_SIZE(algs_ecb_cbc),
 844         },
 845 };
 846
 847 #ifdef CONFIG_OF
 848 static const struct omap_des_pdata omap_des_pdata_omap4 = {
 849         .algs_info      = omap_des_algs_info_ecb_cbc,
 850         .algs_info_size = ARRAY_SIZE(omap_des_algs_info_ecb_cbc),
 851         .trigger        = omap_des_dma_trigger_omap4,
 852         .key_ofs        = 0x14,
 853         .iv_ofs         = 0x18,
 854         .ctrl_ofs       = 0x20,
 855         .data_ofs       = 0x28,
 856         .rev_ofs        = 0x30,
 857         .mask_ofs       = 0x34,
 858         .irq_status_ofs = 0x3c,
 859         .irq_enable_ofs = 0x40,
 860         .dma_enable_in  = BIT(5),
 861         .dma_enable_out = BIT(6),
 862         .major_mask     = 0x0700,
 863         .major_shift    = 8,
 864         .minor_mask     = 0x003f,
 865         .minor_shift    = 0,
 866 };
 867
 868 static irqreturn_t omap_des_irq(int irq, void *dev_id)
 869 {
 870         struct omap_des_dev *dd = dev_id;
 871         u32 status, i;
 872         u32 *src, *dst;
 873
 874         status = omap_des_read(dd, DES_REG_IRQ_STATUS(dd));
 875         if (status & DES_REG_IRQ_DATA_IN) {
 876                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
 877
 878                 BUG_ON(!dd->in_sg);
 879
 880                 BUG_ON(_calc_walked(in) > dd->in_sg->length);
 881
 882                 src = sg_virt(dd->in_sg) + _calc_walked(in);
 883
 884                 for (i = 0; i < DES_BLOCK_WORDS; i++) {
 885                         omap_des_write(dd, DES_REG_DATA_N(dd, i), *src);
 886
 887                         scatterwalk_advance(&dd->in_walk, 4);
 888                         if (dd->in_sg->length == _calc_walked(in)) {
 889                                 dd->in_sg = sg_next(dd->in_sg);
 890                                 if (dd->in_sg) {
 891                                         scatterwalk_start(&dd->in_walk,
 892                                                           dd->in_sg);
 893                                         src = sg_virt(dd->in_sg) +
 894                                               _calc_walked(in);
 895                                 }
 896                         } else {
 897                                 src++;
 898                         }
 899                 }
 900
 901                 /* Clear IRQ status */
 902                 status &= ~DES_REG_IRQ_DATA_IN;
 903                 omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
 904
 905                 /* Enable DATA_OUT interrupt */
 906                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x4);
 907
 908         } else if (status & DES_REG_IRQ_DATA_OUT) {
 909                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
 910
 911                 BUG_ON(!dd->out_sg);
 912
 913                 BUG_ON(_calc_walked(out) > dd->out_sg->length);
 914
 915                 dst = sg_virt(dd->out_sg) + _calc_walked(out);
 916
 917                 for (i = 0; i < DES_BLOCK_WORDS; i++) {
 918                         *dst = omap_des_read(dd, DES_REG_DATA_N(dd, i));
 919                         scatterwalk_advance(&dd->out_walk, 4);
 920                         if (dd->out_sg->length == _calc_walked(out)) {
 921                                 dd->out_sg = sg_next(dd->out_sg);
 922                                 if (dd->out_sg) {
 923                                         scatterwalk_start(&dd->out_walk,
 924                                                           dd->out_sg);
 925                                         dst = sg_virt(dd->out_sg) +
 926                                               _calc_walked(out);
 927                                 }
 928                         } else {
 929                                 dst++;
 930                         }
 931                 }
 932
 933                 BUG_ON(dd->total < DES_BLOCK_SIZE);
 934
 935                 dd->total -= DES_BLOCK_SIZE;
 936
 937                 /* Clear IRQ status */
 938                 status &= ~DES_REG_IRQ_DATA_OUT;
 939                 omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
 940
 941                 if (!dd->total)
 942                         /* All bytes read! */
 943                         tasklet_schedule(&dd->done_task);
 944                 else
 945                         /* Enable DATA_IN interrupt for next block */
 946                         omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
 947         }
 948
 949         return IRQ_HANDLED;
 950 }
 951
 952 static const struct of_device_id omap_des_of_match[] = {
 953         {
 954                 .compatible     = "ti,omap4-des",
 955                 .data           = &omap_des_pdata_omap4,
 956         },
 957         {},
 958 };
 959 MODULE_DEVICE_TABLE(of, omap_des_of_match);
 960
 961 static int omap_des_get_of(struct omap_des_dev *dd,
 962                 struct platform_device *pdev)
 963 {
 964         const struct of_device_id *match;
 965
 966         match = of_match_device(of_match_ptr(omap_des_of_match), &pdev->dev);
 967         if (!match) {
 968                 dev_err(&pdev->dev, "no compatible OF match\n");
 969                 return -EINVAL;
 970         }
 971
 972         dd->pdata = match->data;
 973
 974         return 0;
 975 }
 976 #else
 977 static int omap_des_get_of(struct omap_des_dev *dd,
 978                 struct device *dev)
 979 {
 980         return -EINVAL;
 981 }
 982 #endif
 983
 984 static int omap_des_get_pdev(struct omap_des_dev *dd,
 985                 struct platform_device *pdev)
 986 {
 987         /* non-DT devices get pdata from pdev */
 988         dd->pdata = pdev->dev.platform_data;
 989
 990         return 0;
 991 }
 992
 993 static int omap_des_probe(struct platform_device *pdev)
 994 {
 995         struct device *dev = &pdev->dev;
 996         struct omap_des_dev *dd;
 997         struct crypto_alg *algp;
 998         struct resource *res;
 999         int err = -ENOMEM, i, j, irq = -1;
1000         u32 reg;
1001
1002         dd = devm_kzalloc(dev, sizeof(struct omap_des_dev), GFP_KERNEL);
1003         if (dd == NULL) {
1004                 dev_err(dev, "unable to alloc data struct.\n");
1005                 goto err_data;
1006         }
1007         dd->dev = dev;
1008         platform_set_drvdata(pdev, dd);
1009
1010         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1011         if (!res) {
1012                 dev_err(dev, "no MEM resource info\n");
1013                 goto err_res;
1014         }
1015
1016         err = (dev->of_node) ? omap_des_get_of(dd, pdev) :
1017                                omap_des_get_pdev(dd, pdev);
1018         if (err)
1019                 goto err_res;
1020
1021         dd->io_base = devm_ioremap_resource(dev, res);
1022         if (IS_ERR(dd->io_base)) {
1023                 err = PTR_ERR(dd->io_base);
1024                 goto err_res;
1025         }
1026         dd->phys_base = res->start;
1027
1028         pm_runtime_enable(dev);
1029         pm_runtime_irq_safe(dev);
1030         err = pm_runtime_get_sync(dev);
1031         if (err < 0) {
1032                 pm_runtime_put_noidle(dev);
1033                 dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
1034                 goto err_get;
1035         }
1036
1037         omap_des_dma_stop(dd);
1038
1039         reg = omap_des_read(dd, DES_REG_REV(dd));
1040
1041         pm_runtime_put_sync(dev);
1042
1043         dev_info(dev, "OMAP DES hw accel rev: %u.%u\n",
1044                  (reg & dd->pdata->major_mask) >> dd->pdata->major_shift,
1045                  (reg & dd->pdata->minor_mask) >> dd->pdata->minor_shift);
1046
1047         tasklet_init(&dd->done_task, omap_des_done_task, (unsigned long)dd);
1048
1049         err = omap_des_dma_init(dd);
1050         if (err == -EPROBE_DEFER) {
1051                 goto err_irq;
1052         } else if (err && DES_REG_IRQ_STATUS(dd) && DES_REG_IRQ_ENABLE(dd)) {
1053                 dd->pio_only = 1;
1054
1055                 irq = platform_get_irq(pdev, 0);
1056                 if (irq < 0) {
1057                         dev_err(dev, "can't get IRQ resource\n");
1058                         goto err_irq;
1059                 }
1060
1061                 err = devm_request_irq(dev, irq, omap_des_irq, 0,
1062                                 dev_name(dev), dd);
1063                 if (err) {
1064                         dev_err(dev, "Unable to grab omap-des IRQ\n");
1065                         goto err_irq;
1066                 }
1067         }
1068
1069
1070         INIT_LIST_HEAD(&dd->list);
1071         spin_lock(&list_lock);
1072         list_add_tail(&dd->list, &dev_list);
1073         spin_unlock(&list_lock);
1074
1075         for (i = 0; i < dd->pdata->algs_info_size; i++) {
1076                 for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
1077                         algp = &dd->pdata->algs_info[i].algs_list[j];
1078
1079                         pr_debug("reg alg: %s\n", algp->cra_name);
1080                         INIT_LIST_HEAD(&algp->cra_list);
1081
1082                         err = crypto_register_alg(algp);
1083                         if (err)
1084                                 goto err_algs;
1085
1086                         dd->pdata->algs_info[i].registered++;
1087                 }
1088         }
1089
1090         /* Initialize des crypto engine */
1091         dd->engine = crypto_engine_alloc_init(dev, 1);
1092         if (!dd->engine)
1093                 goto err_algs;
1094
1095         dd->engine->prepare_request = omap_des_prepare_req;
1096         dd->engine->crypt_one_request = omap_des_crypt_req;
1097         err = crypto_engine_start(dd->engine);
1098         if (err)
1099                 goto err_engine;
1100
1101         return 0;
1102
1103 err_engine:
1104         crypto_engine_exit(dd->engine);
1105 err_algs:
1106         for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1107                 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1108                         crypto_unregister_alg(
1109                                         &dd->pdata->algs_info[i].algs_list[j]);
1110
1111         omap_des_dma_cleanup(dd);
1112 err_irq:
1113         tasklet_kill(&dd->done_task);
1114 err_get:
1115         pm_runtime_disable(dev);
1116 err_res:
1117         dd = NULL;
1118 err_data:
1119         dev_err(dev, "initialization failed.\n");
1120         return err;
1121 }
1122
1123 static int omap_des_remove(struct platform_device *pdev)
1124 {
1125         struct omap_des_dev *dd = platform_get_drvdata(pdev);
1126         int i, j;
1127
1128         if (!dd)
1129                 return -ENODEV;
1130
1131         spin_lock(&list_lock);
1132         list_del(&dd->list);
1133         spin_unlock(&list_lock);
1134
1135         for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1136                 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1137                         crypto_unregister_alg(
1138                                         &dd->pdata->algs_info[i].algs_list[j]);
1139
1140         tasklet_kill(&dd->done_task);
1141         omap_des_dma_cleanup(dd);
1142         pm_runtime_disable(dd->dev);
1143         dd = NULL;
1144
1145         return 0;
1146 }
1147
1148 #ifdef CONFIG_PM_SLEEP
1149 static int omap_des_suspend(struct device *dev)
1150 {
1151         pm_runtime_put_sync(dev);
1152         return 0;
1153 }
1154
1155 static int omap_des_resume(struct device *dev)
1156 {
1157         int err;
1158
1159         err = pm_runtime_get_sync(dev);
1160         if (err < 0) {
1161                 pm_runtime_put_noidle(dev);
1162                 dev_err(dev, "%s: failed to get_sync(%d)\n", __func__, err);
1163                 return err;
1164         }
1165         return 0;
1166 }
1167 #endif
1168
1169 static SIMPLE_DEV_PM_OPS(omap_des_pm_ops, omap_des_suspend, omap_des_resume);
1170
1171 static struct platform_driver omap_des_driver = {
1172         .probe  = omap_des_probe,
1173         .remove = omap_des_remove,
1174         .driver = {
1175                 .name   = "omap-des",
1176                 .pm     = &omap_des_pm_ops,
1177                 .of_match_table = of_match_ptr(omap_des_of_match),
1178         },
1179 };
1180
1181 module_platform_driver(omap_des_driver);
1182
1183 MODULE_DESCRIPTION("OMAP DES hw acceleration support.");
1184 MODULE_LICENSE("GPL v2");
1185 MODULE_AUTHOR("Joel Fernandes <joelf@ti.com>");