2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #include <linux/kthread.h>
25 #include <linux/wait.h>
26 #include <linux/sched.h>
29 #include "amdgpu_trace.h"
31 static void amdgpu_job_free_handler(struct work_struct *ws)
33 struct amdgpu_job *job = container_of(ws, struct amdgpu_job, base.work_free_job);
34 amd_sched_job_put(&job->base);
37 void amdgpu_job_timeout_func(struct work_struct *work)
39 struct amdgpu_job *job = container_of(work, struct amdgpu_job, base.work_tdr.work);
40 DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
41 job->base.sched->name,
42 (uint32_t)atomic_read(&job->ring->fence_drv.last_seq),
43 job->ring->fence_drv.sync_seq);
45 amd_sched_job_put(&job->base);
48 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
49 struct amdgpu_job **job, struct amdgpu_vm *vm)
51 size_t size = sizeof(struct amdgpu_job);
56 size += sizeof(struct amdgpu_ib) * num_ibs;
58 *job = kzalloc(size, GFP_KERNEL);
64 (*job)->ibs = (void *)&(*job)[1];
65 (*job)->num_ibs = num_ibs;
66 INIT_WORK(&(*job)->base.work_free_job, amdgpu_job_free_handler);
68 amdgpu_sync_create(&(*job)->sync);
73 int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
74 struct amdgpu_job **job)
78 r = amdgpu_job_alloc(adev, 1, job, NULL);
82 r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
89 void amdgpu_job_free(struct amdgpu_job *job)
93 /* use sched fence if available */
94 f = (job->base.s_fence)? &job->base.s_fence->base : job->fence;
96 for (i = 0; i < job->num_ibs; ++i)
97 amdgpu_sa_bo_free(job->adev, &job->ibs[i].sa_bo, f);
98 fence_put(job->fence);
100 amdgpu_bo_unref(&job->uf_bo);
101 amdgpu_sync_free(&job->sync);
103 if (!job->base.use_sched)
107 void amdgpu_job_free_func(struct kref *refcount)
109 struct amdgpu_job *job = container_of(refcount, struct amdgpu_job, base.refcount);
113 int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
114 struct amd_sched_entity *entity, void *owner,
124 r = amd_sched_job_init(&job->base, &ring->sched,
125 entity, amdgpu_job_timeout_func,
126 amdgpu_job_free_func, owner, &fence);
131 job->ctx = entity->fence_context;
132 *f = fence_get(fence);
133 amd_sched_entity_push_job(&job->base);
138 static struct fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
140 struct amdgpu_job *job = to_amdgpu_job(sched_job);
141 struct amdgpu_vm *vm = job->vm;
143 struct fence *fence = amdgpu_sync_get_fence(&job->sync);
145 if (fence == NULL && vm && !job->vm_id) {
146 struct amdgpu_ring *ring = job->ring;
149 r = amdgpu_vm_grab_id(vm, ring, &job->sync,
150 &job->base.s_fence->base,
151 &job->vm_id, &job->vm_pd_addr);
153 DRM_ERROR("Error getting VM ID (%d)\n", r);
155 fence = amdgpu_sync_get_fence(&job->sync);
161 static struct fence *amdgpu_job_run(struct amd_sched_job *sched_job)
163 struct fence *fence = NULL;
164 struct amdgpu_job *job;
168 DRM_ERROR("job is null\n");
171 job = to_amdgpu_job(sched_job);
173 r = amdgpu_sync_wait(&job->sync);
175 DRM_ERROR("failed to sync wait (%d)\n", r);
179 trace_amdgpu_sched_run_job(job);
180 r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs,
181 job->sync.last_vm_update, job, &fence);
183 DRM_ERROR("Error scheduling IBs (%d)\n", r);
189 amdgpu_job_free(job);
193 const struct amd_sched_backend_ops amdgpu_sched_ops = {
194 .dependency = amdgpu_job_dependency,
195 .run_job = amdgpu_job_run,
196 .begin_job = amd_sched_job_begin,
197 .finish_job = amd_sched_job_finish,