Merge branch 'work.uaccess' into for-linus
[cascardo/linux.git] / drivers / gpu / drm / amd / powerplay / hwmgr / fiji_clockpowergating.c
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23
24 #include "hwmgr.h"
25 #include "fiji_clockpowergating.h"
26 #include "fiji_ppsmc.h"
27 #include "fiji_hwmgr.h"
28
29 int fiji_phm_disable_clock_power_gating(struct pp_hwmgr *hwmgr)
30 {
31         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
32
33         data->uvd_power_gated = false;
34         data->vce_power_gated = false;
35         data->samu_power_gated = false;
36         data->acp_power_gated = false;
37
38         return 0;
39 }
40
41 int fiji_phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
42 {
43         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
44
45         if (data->uvd_power_gated == bgate)
46                 return 0;
47
48         data->uvd_power_gated = bgate;
49
50         if (bgate) {
51                 cgs_set_clockgating_state(hwmgr->device,
52                                           AMD_IP_BLOCK_TYPE_UVD,
53                                           AMD_CG_STATE_GATE);
54                 fiji_update_uvd_dpm(hwmgr, true);
55         } else {
56                 fiji_update_uvd_dpm(hwmgr, false);
57                 cgs_set_clockgating_state(hwmgr->device,
58                                           AMD_IP_BLOCK_TYPE_UVD,
59                                           AMD_CG_STATE_UNGATE);
60         }
61
62         return 0;
63 }
64
65 int fiji_phm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
66 {
67         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
68         struct phm_set_power_state_input states;
69         const struct pp_power_state  *pcurrent;
70         struct pp_power_state  *requested;
71
72         if (data->vce_power_gated == bgate)
73                 return 0;
74
75         data->vce_power_gated = bgate;
76
77         pcurrent = hwmgr->current_ps;
78         requested = hwmgr->request_ps;
79
80         states.pcurrent_state = &(pcurrent->hardware);
81         states.pnew_state = &(requested->hardware);
82
83         fiji_update_vce_dpm(hwmgr, &states);
84         fiji_enable_disable_vce_dpm(hwmgr, !bgate);
85
86         return 0;
87 }
88
89 int fiji_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate)
90 {
91         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
92
93         if (data->samu_power_gated == bgate)
94                 return 0;
95
96         data->samu_power_gated = bgate;
97
98         if (bgate)
99                 fiji_update_samu_dpm(hwmgr, true);
100         else
101                 fiji_update_samu_dpm(hwmgr, false);
102
103         return 0;
104 }
105
106 int fiji_phm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
107 {
108         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
109
110         if (data->acp_power_gated == bgate)
111                 return 0;
112
113         data->acp_power_gated = bgate;
114
115         if (bgate)
116                 fiji_update_acp_dpm(hwmgr, true);
117         else
118                 fiji_update_acp_dpm(hwmgr, false);
119
120         return 0;
121 }