drivers/gpu/drm/amd/powerplay/hwmgr/tonga_pptable.h

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #ifndef TONGA_PPTABLE_H
  25 #define TONGA_PPTABLE_H
  26
  27 /** \file
  28  * This is a PowerPlay table header file
  29  */
  30 #pragma pack(push, 1)
  31
  32 #include "hwmgr.h"
  33
  34 #define ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
  35 #define ATOM_TONGA_PP_FANPARAMETERS_NOFAN                                 0x80    /* No fan is connected to this controller. */
  36
  37 #define ATOM_TONGA_PP_THERMALCONTROLLER_NONE      0
  38 #define ATOM_TONGA_PP_THERMALCONTROLLER_LM96163   17
  39 #define ATOM_TONGA_PP_THERMALCONTROLLER_TONGA     21
  40 #define ATOM_TONGA_PP_THERMALCONTROLLER_FIJI      22
  41
  42 /*
  43  * Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
  44  * We probably should reserve the bit 0x80 for this use.
  45  * To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
  46  * The driver can pick the correct internal controller based on the ASIC.
  47  */
  48
  49 #define ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL   0x89    /* ADT7473 Fan Control + Internal Thermal Controller */
  50 #define ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL   0x8D    /* EMC2103 Fan Control + Internal Thermal Controller */
  51
  52 /*/* ATOM_TONGA_POWERPLAYTABLE::ulPlatformCaps */
  53 #define ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL              0x1            /* This cap indicates whether vddgfx will be a separated power rail. */
  54 #define ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY                   0x2            /* This cap indicates whether this is a mobile part and CCC need to show Powerplay page. */
  55 #define ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE            0x4            /* This cap indicates whether power source notificaiton is done by SBIOS directly. */
  56 #define ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND      0x8            /* Enable the option to overwrite voltage island feature to be disabled, regardless of VddGfx power rail support. */
  57 #define ____RETIRE16____                                0x10
  58 #define ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC                 0x20            /* This cap indicates whether power source notificaiton is done by GPIO directly. */
  59 #define ____RETIRE64____                                0x40
  60 #define ____RETIRE128____                               0x80
  61 #define ____RETIRE256____                              0x100
  62 #define ____RETIRE512____                              0x200
  63 #define ____RETIRE1024____                             0x400
  64 #define ____RETIRE2048____                             0x800
  65 #define ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL             0x1000            /* This cap indicates dynamic MVDD is required. Uncheck to disable it. */
  66 #define ____RETIRE2000____                            0x2000
  67 #define ____RETIRE4000____                            0x4000
  68 #define ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL            0x8000            /* This cap indicates dynamic VDDCI is required. Uncheck to disable it. */
  69 #define ____RETIRE10000____                          0x10000
  70 #define ATOM_TONGA_PP_PLATFORM_CAP_BACO                    0x20000            /* Enable to indicate the driver supports BACO state. */
  71
  72 #define ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17         0x100000     /* Enable to indicate the driver supports thermal2GPIO17. */
  73 #define ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL  0x1000000     /* Enable to indicate if thermal and PCC are sharing the same GPIO */
  74 #define ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE       0x2000000
  75
  76 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification */
  77 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK               0x0007
  78 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT              0
  79 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE               0
  80 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY            1
  81 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED           3
  82 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE        5
  83 /* 2, 4, 6, 7 are reserved */
  84
  85 #define ATOM_PPLIB_CLASSIFICATION_BOOT                  0x0008
  86 #define ATOM_PPLIB_CLASSIFICATION_THERMAL               0x0010
  87 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE    0x0020
  88 #define ATOM_PPLIB_CLASSIFICATION_REST                  0x0040
  89 #define ATOM_PPLIB_CLASSIFICATION_FORCED                0x0080
  90 #define ATOM_PPLIB_CLASSIFICATION_ACPI                  0x1000
  91
  92 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */
  93 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
  94
  95 #define ATOM_Tonga_DISALLOW_ON_DC                       0x00004000
  96 #define ATOM_Tonga_ENABLE_VARIBRIGHT                    0x00008000
  97
  98 #define ATOM_Tonga_TABLE_REVISION_TONGA                 7
  99
 100 typedef struct _ATOM_Tonga_POWERPLAYTABLE {
 101         ATOM_COMMON_TABLE_HEADER sHeader;
 102
 103         UCHAR  ucTableRevision;
 104         USHORT usTableSize;                                             /*the size of header structure */
 105
 106         ULONG   ulGoldenPPID;
 107         ULONG   ulGoldenRevision;
 108         USHORT  usFormatID;
 109
 110         USHORT  usVoltageTime;                                   /*in microseconds */
 111         ULONG   ulPlatformCaps;                                   /*See ATOM_Tonga_CAPS_* */
 112
 113         ULONG   ulMaxODEngineClock;                        /*For Overdrive.  */
 114         ULONG   ulMaxODMemoryClock;                        /*For Overdrive. */
 115
 116         USHORT  usPowerControlLimit;
 117         USHORT  usUlvVoltageOffset;                               /*in mv units */
 118
 119         USHORT  usStateArrayOffset;                               /*points to ATOM_Tonga_State_Array */
 120         USHORT  usFanTableOffset;                                 /*points to ATOM_Tonga_Fan_Table */
 121         USHORT  usThermalControllerOffset;                 /*points to ATOM_Tonga_Thermal_Controller */
 122         USHORT  usReserv;                                                  /*CustomThermalPolicy removed for Tonga. Keep this filed as reserved. */
 123
 124         USHORT  usMclkDependencyTableOffset;       /*points to ATOM_Tonga_MCLK_Dependency_Table */
 125         USHORT  usSclkDependencyTableOffset;       /*points to ATOM_Tonga_SCLK_Dependency_Table */
 126         USHORT  usVddcLookupTableOffset;                   /*points to ATOM_Tonga_Voltage_Lookup_Table */
 127         USHORT  usVddgfxLookupTableOffset;              /*points to ATOM_Tonga_Voltage_Lookup_Table */
 128
 129         USHORT  usMMDependencyTableOffset;                /*points to ATOM_Tonga_MM_Dependency_Table */
 130
 131         USHORT  usVCEStateTableOffset;                     /*points to ATOM_Tonga_VCE_State_Table; */
 132
 133         USHORT  usPPMTableOffset;                                 /*points to ATOM_Tonga_PPM_Table */
 134         USHORT  usPowerTuneTableOffset;                   /*points to ATOM_PowerTune_Table */
 135
 136         USHORT  usHardLimitTableOffset;                    /*points to ATOM_Tonga_Hard_Limit_Table */
 137
 138         USHORT  usPCIETableOffset;                                /*points to ATOM_Tonga_PCIE_Table */
 139
 140         USHORT  usGPIOTableOffset;                                /*points to ATOM_Tonga_GPIO_Table */
 141
 142         USHORT  usReserved[6];                                     /*TODO: modify reserved size to fit structure aligning */
 143 } ATOM_Tonga_POWERPLAYTABLE;
 144
 145 typedef struct _ATOM_Tonga_State {
 146         UCHAR  ucEngineClockIndexHigh;
 147         UCHAR  ucEngineClockIndexLow;
 148
 149         UCHAR  ucMemoryClockIndexHigh;
 150         UCHAR  ucMemoryClockIndexLow;
 151
 152         UCHAR  ucPCIEGenLow;
 153         UCHAR  ucPCIEGenHigh;
 154
 155         UCHAR  ucPCIELaneLow;
 156         UCHAR  ucPCIELaneHigh;
 157
 158         USHORT usClassification;
 159         ULONG ulCapsAndSettings;
 160         USHORT usClassification2;
 161         UCHAR  ucUnused[4];
 162 } ATOM_Tonga_State;
 163
 164 typedef struct _ATOM_Tonga_State_Array {
 165         UCHAR ucRevId;
 166         UCHAR ucNumEntries;             /* Number of entries. */
 167         ATOM_Tonga_State states[1];     /* Dynamically allocate entries. */
 168 } ATOM_Tonga_State_Array;
 169
 170 typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
 171         UCHAR  ucVddcInd;       /* Vddc voltage */
 172         USHORT usVddci;
 173         USHORT usVddgfxOffset;  /* Offset relative to Vddc voltage */
 174         USHORT usMvdd;
 175         ULONG ulMclk;
 176         USHORT usReserved;
 177 } ATOM_Tonga_MCLK_Dependency_Record;
 178
 179 typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
 180         UCHAR ucRevId;
 181         UCHAR ucNumEntries;                                                                             /* Number of entries. */
 182         ATOM_Tonga_MCLK_Dependency_Record entries[1];                           /* Dynamically allocate entries. */
 183 } ATOM_Tonga_MCLK_Dependency_Table;
 184
 185 typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
 186         UCHAR  ucVddInd;                                                                                        /* Base voltage */
 187         USHORT usVddcOffset;                                                                            /* Offset relative to base voltage */
 188         ULONG ulSclk;
 189         USHORT usEdcCurrent;
 190         UCHAR  ucReliabilityTemperature;
 191         UCHAR  ucCKSVOffsetandDisable;                                                    /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
 192 } ATOM_Tonga_SCLK_Dependency_Record;
 193
 194 typedef struct _ATOM_Tonga_SCLK_Dependency_Table {
 195         UCHAR ucRevId;
 196         UCHAR ucNumEntries;                                                                             /* Number of entries. */
 197         ATOM_Tonga_SCLK_Dependency_Record entries[1];                            /* Dynamically allocate entries. */
 198 } ATOM_Tonga_SCLK_Dependency_Table;
 199
 200 typedef struct _ATOM_Tonga_PCIE_Record {
 201         UCHAR ucPCIEGenSpeed;
 202         UCHAR usPCIELaneWidth;
 203         UCHAR ucReserved[2];
 204 } ATOM_Tonga_PCIE_Record;
 205
 206 typedef struct _ATOM_Tonga_PCIE_Table {
 207         UCHAR ucRevId;
 208         UCHAR ucNumEntries;                                                                             /* Number of entries. */
 209         ATOM_Tonga_PCIE_Record entries[1];                                                      /* Dynamically allocate entries. */
 210 } ATOM_Tonga_PCIE_Table;
 211
 212 typedef struct _ATOM_Polaris10_PCIE_Record {
 213         UCHAR ucPCIEGenSpeed;
 214         UCHAR usPCIELaneWidth;
 215         UCHAR ucReserved[2];
 216         ULONG ulPCIE_Sclk;
 217 } ATOM_Polaris10_PCIE_Record;
 218
 219 typedef struct _ATOM_Polaris10_PCIE_Table {
 220         UCHAR ucRevId;
 221         UCHAR ucNumEntries;                                         /* Number of entries. */
 222         ATOM_Polaris10_PCIE_Record entries[1];                      /* Dynamically allocate entries. */
 223 } ATOM_Polaris10_PCIE_Table;
 224
 225
 226 typedef struct _ATOM_Tonga_MM_Dependency_Record {
 227         UCHAR   ucVddcInd;                                                                                       /* VDDC voltage */
 228         USHORT  usVddgfxOffset;                                                                   /* Offset relative to VDDC voltage */
 229         ULONG  ulDClk;                                                                                          /* UVD D-clock */
 230         ULONG  ulVClk;                                                                                          /* UVD V-clock */
 231         ULONG  ulEClk;                                                                                          /* VCE clock */
 232         ULONG  ulAClk;                                                                                          /* ACP clock */
 233         ULONG  ulSAMUClk;                                                                                       /* SAMU clock */
 234 } ATOM_Tonga_MM_Dependency_Record;
 235
 236 typedef struct _ATOM_Tonga_MM_Dependency_Table {
 237         UCHAR ucRevId;
 238         UCHAR ucNumEntries;                                                                             /* Number of entries. */
 239         ATOM_Tonga_MM_Dependency_Record entries[1];                        /* Dynamically allocate entries. */
 240 } ATOM_Tonga_MM_Dependency_Table;
 241
 242 typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
 243         USHORT usVdd;                                                                                      /* Base voltage */
 244         USHORT usCACLow;
 245         USHORT usCACMid;
 246         USHORT usCACHigh;
 247 } ATOM_Tonga_Voltage_Lookup_Record;
 248
 249 typedef struct _ATOM_Tonga_Voltage_Lookup_Table {
 250         UCHAR ucRevId;
 251         UCHAR ucNumEntries;                                                                             /* Number of entries. */
 252         ATOM_Tonga_Voltage_Lookup_Record entries[1];                            /* Dynamically allocate entries. */
 253 } ATOM_Tonga_Voltage_Lookup_Table;
 254
 255 typedef struct _ATOM_Tonga_Fan_Table {
 256         UCHAR   ucRevId;                                                 /* Change this if the table format changes or version changes so that the other fields are not the same. */
 257         UCHAR   ucTHyst;                                                 /* Temperature hysteresis. Integer. */
 258         USHORT  usTMin;                                                  /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
 259         USHORT  usTMed;                                                  /* The middle temperature where we change slopes. */
 260         USHORT  usTHigh;                                                 /* The high point above TMed for adjusting the second slope. */
 261         USHORT  usPWMMin;                                                /* The minimum PWM value in percent (0.01% increments). */
 262         USHORT  usPWMMed;                                                /* The PWM value (in percent) at TMed. */
 263         USHORT  usPWMHigh;                                               /* The PWM value at THigh. */
 264         USHORT  usTMax;                                                  /* The max temperature */
 265         UCHAR   ucFanControlMode;                                 /* Legacy or Fuzzy Fan mode */
 266         USHORT  usFanPWMMax;                                      /* Maximum allowed fan power in percent */
 267         USHORT  usFanOutputSensitivity;           /* Sensitivity of fan reaction to temepature changes */
 268         USHORT  usFanRPMMax;                                      /* The default value in RPM */
 269         ULONG  ulMinFanSCLKAcousticLimit;          /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
 270         UCHAR   ucTargetTemperature;                     /* Advanced fan controller target temperature. */
 271         UCHAR   ucMinimumPWMLimit;                        /* The minimum PWM that the advanced fan controller can set.  This should be set to the highest PWM that will run the fan at its lowest RPM. */
 272         USHORT  usReserved;
 273 } ATOM_Tonga_Fan_Table;
 274
 275 typedef struct _ATOM_Fiji_Fan_Table {
 276         UCHAR   ucRevId;                                                 /* Change this if the table format changes or version changes so that the other fields are not the same. */
 277         UCHAR   ucTHyst;                                                 /* Temperature hysteresis. Integer. */
 278         USHORT  usTMin;                                                  /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
 279         USHORT  usTMed;                                                  /* The middle temperature where we change slopes. */
 280         USHORT  usTHigh;                                                 /* The high point above TMed for adjusting the second slope. */
 281         USHORT  usPWMMin;                                                /* The minimum PWM value in percent (0.01% increments). */
 282         USHORT  usPWMMed;                                                /* The PWM value (in percent) at TMed. */
 283         USHORT  usPWMHigh;                                               /* The PWM value at THigh. */
 284         USHORT  usTMax;                                                  /* The max temperature */
 285         UCHAR   ucFanControlMode;                                 /* Legacy or Fuzzy Fan mode */
 286         USHORT  usFanPWMMax;                                      /* Maximum allowed fan power in percent */
 287         USHORT  usFanOutputSensitivity;           /* Sensitivity of fan reaction to temepature changes */
 288         USHORT  usFanRPMMax;                                      /* The default value in RPM */
 289         ULONG  ulMinFanSCLKAcousticLimit;               /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
 290         UCHAR   ucTargetTemperature;                     /* Advanced fan controller target temperature. */
 291         UCHAR   ucMinimumPWMLimit;                        /* The minimum PWM that the advanced fan controller can set.  This should be set to the highest PWM that will run the fan at its lowest RPM. */
 292         USHORT  usFanGainEdge;
 293         USHORT  usFanGainHotspot;
 294         USHORT  usFanGainLiquid;
 295         USHORT  usFanGainVrVddc;
 296         USHORT  usFanGainVrMvdd;
 297         USHORT  usFanGainPlx;
 298         USHORT  usFanGainHbm;
 299         USHORT  usReserved;
 300 } ATOM_Fiji_Fan_Table;
 301
 302 typedef struct _ATOM_Tonga_Thermal_Controller {
 303         UCHAR ucRevId;
 304         UCHAR ucType;              /* one of ATOM_TONGA_PP_THERMALCONTROLLER_* */
 305         UCHAR ucI2cLine;                /* as interpreted by DAL I2C */
 306         UCHAR ucI2cAddress;
 307         UCHAR ucFanParameters;  /* Fan Control Parameters. */
 308         UCHAR ucFanMinRPM;       /* Fan Minimum RPM (hundreds) -- for display purposes only. */
 309         UCHAR ucFanMaxRPM;       /* Fan Maximum RPM (hundreds) -- for display purposes only. */
 310         UCHAR ucReserved;
 311         UCHAR ucFlags;             /* to be defined */
 312 } ATOM_Tonga_Thermal_Controller;
 313
 314 typedef struct _ATOM_Tonga_VCE_State_Record {
 315         UCHAR  ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Tonga_MM_Dependency_Table' type */
 316         UCHAR  ucFlag;          /* 2 bits indicates memory p-states */
 317         UCHAR  ucSCLKIndex;             /*index into ATOM_Tonga_SCLK_Dependency_Table */
 318         UCHAR  ucMCLKIndex;             /*index into ATOM_Tonga_MCLK_Dependency_Table */
 319 } ATOM_Tonga_VCE_State_Record;
 320
 321 typedef struct _ATOM_Tonga_VCE_State_Table {
 322         UCHAR ucRevId;
 323         UCHAR ucNumEntries;
 324         ATOM_Tonga_VCE_State_Record entries[1];
 325 } ATOM_Tonga_VCE_State_Table;
 326
 327 typedef struct _ATOM_Tonga_PowerTune_Table {
 328         UCHAR  ucRevId;
 329         USHORT usTDP;
 330         USHORT usConfigurableTDP;
 331         USHORT usTDC;
 332         USHORT usBatteryPowerLimit;
 333         USHORT usSmallPowerLimit;
 334         USHORT usLowCACLeakage;
 335         USHORT usHighCACLeakage;
 336         USHORT usMaximumPowerDeliveryLimit;
 337         USHORT usTjMax;
 338         USHORT usPowerTuneDataSetID;
 339         USHORT usEDCLimit;
 340         USHORT usSoftwareShutdownTemp;
 341         USHORT usClockStretchAmount;
 342         USHORT usReserve[2];
 343 } ATOM_Tonga_PowerTune_Table;
 344
 345 typedef struct _ATOM_Fiji_PowerTune_Table {
 346         UCHAR  ucRevId;
 347         USHORT usTDP;
 348         USHORT usConfigurableTDP;
 349         USHORT usTDC;
 350         USHORT usBatteryPowerLimit;
 351         USHORT usSmallPowerLimit;
 352         USHORT usLowCACLeakage;
 353         USHORT usHighCACLeakage;
 354         USHORT usMaximumPowerDeliveryLimit;
 355         USHORT usTjMax;  /* For Fiji, this is also usTemperatureLimitEdge; */
 356         USHORT usPowerTuneDataSetID;
 357         USHORT usEDCLimit;
 358         USHORT usSoftwareShutdownTemp;
 359         USHORT usClockStretchAmount;
 360         USHORT usTemperatureLimitHotspot;  /*The following are added for Fiji */
 361         USHORT usTemperatureLimitLiquid1;
 362         USHORT usTemperatureLimitLiquid2;
 363         USHORT usTemperatureLimitVrVddc;
 364         USHORT usTemperatureLimitVrMvdd;
 365         USHORT usTemperatureLimitPlx;
 366         UCHAR  ucLiquid1_I2C_address;  /*Liquid */
 367         UCHAR  ucLiquid2_I2C_address;
 368         UCHAR  ucLiquid_I2C_Line;
 369         UCHAR  ucVr_I2C_address;        /*VR */
 370         UCHAR  ucVr_I2C_Line;
 371         UCHAR  ucPlx_I2C_address;  /*PLX */
 372         UCHAR  ucPlx_I2C_Line;
 373         USHORT usReserved;
 374 } ATOM_Fiji_PowerTune_Table;
 375
 376 #define ATOM_PPM_A_A    1
 377 #define ATOM_PPM_A_I    2
 378 typedef struct _ATOM_Tonga_PPM_Table {
 379         UCHAR   ucRevId;
 380         UCHAR   ucPpmDesign;              /*A+I or A+A */
 381         USHORT  usCpuCoreNumber;
 382         ULONG  ulPlatformTDP;
 383         ULONG  ulSmallACPlatformTDP;
 384         ULONG  ulPlatformTDC;
 385         ULONG  ulSmallACPlatformTDC;
 386         ULONG  ulApuTDP;
 387         ULONG  ulDGpuTDP;
 388         ULONG  ulDGpuUlvPower;
 389         ULONG  ulTjmax;
 390 } ATOM_Tonga_PPM_Table;
 391
 392 typedef struct _ATOM_Tonga_Hard_Limit_Record {
 393         ULONG  ulSCLKLimit;
 394         ULONG  ulMCLKLimit;
 395         USHORT  usVddcLimit;
 396         USHORT  usVddciLimit;
 397         USHORT  usVddgfxLimit;
 398 } ATOM_Tonga_Hard_Limit_Record;
 399
 400 typedef struct _ATOM_Tonga_Hard_Limit_Table {
 401         UCHAR ucRevId;
 402         UCHAR ucNumEntries;
 403         ATOM_Tonga_Hard_Limit_Record entries[1];
 404 } ATOM_Tonga_Hard_Limit_Table;
 405
 406 typedef struct _ATOM_Tonga_GPIO_Table {
 407         UCHAR  ucRevId;
 408         UCHAR  ucVRHotTriggeredSclkDpmIndex;            /* If VRHot signal is triggered SCLK will be limited to this DPM level */
 409         UCHAR  ucReserve[5];
 410 } ATOM_Tonga_GPIO_Table;
 411
 412 typedef struct _PPTable_Generic_SubTable_Header {
 413         UCHAR  ucRevId;
 414 } PPTable_Generic_SubTable_Header;
 415
 416
 417 #pragma pack(pop)
 418
 419
 420 #endif