Merge remote-tracking branches 'asoc/topic/ab8500', 'asoc/topic/adau17x1', 'asoc...
[cascardo/linux.git] / drivers / gpu / drm / amd / powerplay / hwmgr / tonga_pptable.h
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23
24 #ifndef TONGA_PPTABLE_H
25 #define TONGA_PPTABLE_H
26
27 /** \file
28  * This is a PowerPlay table header file
29  */
30 #pragma pack(push, 1)
31
32 #include "hwmgr.h"
33
34 #define ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
35 #define ATOM_TONGA_PP_FANPARAMETERS_NOFAN                                 0x80    /* No fan is connected to this controller. */
36
37 #define ATOM_TONGA_PP_THERMALCONTROLLER_NONE      0
38 #define ATOM_TONGA_PP_THERMALCONTROLLER_LM96163   17
39 #define ATOM_TONGA_PP_THERMALCONTROLLER_TONGA     21
40 #define ATOM_TONGA_PP_THERMALCONTROLLER_FIJI      22
41
42 /*
43  * Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
44  * We probably should reserve the bit 0x80 for this use.
45  * To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
46  * The driver can pick the correct internal controller based on the ASIC.
47  */
48
49 #define ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL   0x89    /* ADT7473 Fan Control + Internal Thermal Controller */
50 #define ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL   0x8D    /* EMC2103 Fan Control + Internal Thermal Controller */
51
52 /*/* ATOM_TONGA_POWERPLAYTABLE::ulPlatformCaps */
53 #define ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL              0x1            /* This cap indicates whether vddgfx will be a separated power rail. */
54 #define ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY                   0x2            /* This cap indicates whether this is a mobile part and CCC need to show Powerplay page. */
55 #define ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE            0x4            /* This cap indicates whether power source notificaiton is done by SBIOS directly. */
56 #define ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND      0x8            /* Enable the option to overwrite voltage island feature to be disabled, regardless of VddGfx power rail support. */
57 #define ____RETIRE16____                                0x10
58 #define ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC                 0x20            /* This cap indicates whether power source notificaiton is done by GPIO directly. */
59 #define ____RETIRE64____                                0x40
60 #define ____RETIRE128____                               0x80
61 #define ____RETIRE256____                              0x100
62 #define ____RETIRE512____                              0x200
63 #define ____RETIRE1024____                             0x400
64 #define ____RETIRE2048____                             0x800
65 #define ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL             0x1000            /* This cap indicates dynamic MVDD is required. Uncheck to disable it. */
66 #define ____RETIRE2000____                            0x2000
67 #define ____RETIRE4000____                            0x4000
68 #define ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL            0x8000            /* This cap indicates dynamic VDDCI is required. Uncheck to disable it. */
69 #define ____RETIRE10000____                          0x10000
70 #define ATOM_TONGA_PP_PLATFORM_CAP_BACO                    0x20000            /* Enable to indicate the driver supports BACO state. */
71
72 #define ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17         0x100000     /* Enable to indicate the driver supports thermal2GPIO17. */
73 #define ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL  0x1000000     /* Enable to indicate if thermal and PCC are sharing the same GPIO */
74 #define ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE       0x2000000
75
76 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification */
77 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK               0x0007
78 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT              0
79 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE               0
80 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY            1
81 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED           3
82 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE        5
83 /* 2, 4, 6, 7 are reserved */
84
85 #define ATOM_PPLIB_CLASSIFICATION_BOOT                  0x0008
86 #define ATOM_PPLIB_CLASSIFICATION_THERMAL               0x0010
87 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE    0x0020
88 #define ATOM_PPLIB_CLASSIFICATION_REST                  0x0040
89 #define ATOM_PPLIB_CLASSIFICATION_FORCED                0x0080
90 #define ATOM_PPLIB_CLASSIFICATION_ACPI                  0x1000
91
92 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */
93 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
94
95 #define ATOM_Tonga_DISALLOW_ON_DC                       0x00004000
96 #define ATOM_Tonga_ENABLE_VARIBRIGHT                    0x00008000
97
98 #define ATOM_Tonga_TABLE_REVISION_TONGA                 7
99
100 typedef struct _ATOM_Tonga_POWERPLAYTABLE {
101         ATOM_COMMON_TABLE_HEADER sHeader;
102
103         UCHAR  ucTableRevision;
104         USHORT usTableSize;                                             /*the size of header structure */
105
106         ULONG   ulGoldenPPID;
107         ULONG   ulGoldenRevision;
108         USHORT  usFormatID;
109
110         USHORT  usVoltageTime;                                   /*in microseconds */
111         ULONG   ulPlatformCaps;                                   /*See ATOM_Tonga_CAPS_* */
112
113         ULONG   ulMaxODEngineClock;                        /*For Overdrive.  */
114         ULONG   ulMaxODMemoryClock;                        /*For Overdrive. */
115
116         USHORT  usPowerControlLimit;
117         USHORT  usUlvVoltageOffset;                               /*in mv units */
118
119         USHORT  usStateArrayOffset;                               /*points to ATOM_Tonga_State_Array */
120         USHORT  usFanTableOffset;                                 /*points to ATOM_Tonga_Fan_Table */
121         USHORT  usThermalControllerOffset;                 /*points to ATOM_Tonga_Thermal_Controller */
122         USHORT  usReserv;                                                  /*CustomThermalPolicy removed for Tonga. Keep this filed as reserved. */
123
124         USHORT  usMclkDependencyTableOffset;       /*points to ATOM_Tonga_MCLK_Dependency_Table */
125         USHORT  usSclkDependencyTableOffset;       /*points to ATOM_Tonga_SCLK_Dependency_Table */
126         USHORT  usVddcLookupTableOffset;                   /*points to ATOM_Tonga_Voltage_Lookup_Table */
127         USHORT  usVddgfxLookupTableOffset;              /*points to ATOM_Tonga_Voltage_Lookup_Table */
128
129         USHORT  usMMDependencyTableOffset;                /*points to ATOM_Tonga_MM_Dependency_Table */
130
131         USHORT  usVCEStateTableOffset;                     /*points to ATOM_Tonga_VCE_State_Table; */
132
133         USHORT  usPPMTableOffset;                                 /*points to ATOM_Tonga_PPM_Table */
134         USHORT  usPowerTuneTableOffset;                   /*points to ATOM_PowerTune_Table */
135
136         USHORT  usHardLimitTableOffset;                    /*points to ATOM_Tonga_Hard_Limit_Table */
137
138         USHORT  usPCIETableOffset;                                /*points to ATOM_Tonga_PCIE_Table */
139
140         USHORT  usGPIOTableOffset;                                /*points to ATOM_Tonga_GPIO_Table */
141
142         USHORT  usReserved[6];                                     /*TODO: modify reserved size to fit structure aligning */
143 } ATOM_Tonga_POWERPLAYTABLE;
144
145 typedef struct _ATOM_Tonga_State {
146         UCHAR  ucEngineClockIndexHigh;
147         UCHAR  ucEngineClockIndexLow;
148
149         UCHAR  ucMemoryClockIndexHigh;
150         UCHAR  ucMemoryClockIndexLow;
151
152         UCHAR  ucPCIEGenLow;
153         UCHAR  ucPCIEGenHigh;
154
155         UCHAR  ucPCIELaneLow;
156         UCHAR  ucPCIELaneHigh;
157
158         USHORT usClassification;
159         ULONG ulCapsAndSettings;
160         USHORT usClassification2;
161         UCHAR  ucUnused[4];
162 } ATOM_Tonga_State;
163
164 typedef struct _ATOM_Tonga_State_Array {
165         UCHAR ucRevId;
166         UCHAR ucNumEntries;             /* Number of entries. */
167         ATOM_Tonga_State states[1];     /* Dynamically allocate entries. */
168 } ATOM_Tonga_State_Array;
169
170 typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
171         UCHAR  ucVddcInd;       /* Vddc voltage */
172         USHORT usVddci;
173         USHORT usVddgfxOffset;  /* Offset relative to Vddc voltage */
174         USHORT usMvdd;
175         ULONG ulMclk;
176         USHORT usReserved;
177 } ATOM_Tonga_MCLK_Dependency_Record;
178
179 typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
180         UCHAR ucRevId;
181         UCHAR ucNumEntries;                                                                             /* Number of entries. */
182         ATOM_Tonga_MCLK_Dependency_Record entries[1];                           /* Dynamically allocate entries. */
183 } ATOM_Tonga_MCLK_Dependency_Table;
184
185 typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
186         UCHAR  ucVddInd;                                                                                        /* Base voltage */
187         USHORT usVddcOffset;                                                                            /* Offset relative to base voltage */
188         ULONG ulSclk;
189         USHORT usEdcCurrent;
190         UCHAR  ucReliabilityTemperature;
191         UCHAR  ucCKSVOffsetandDisable;                                                    /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
192 } ATOM_Tonga_SCLK_Dependency_Record;
193
194 typedef struct _ATOM_Tonga_SCLK_Dependency_Table {
195         UCHAR ucRevId;
196         UCHAR ucNumEntries;                                                                             /* Number of entries. */
197         ATOM_Tonga_SCLK_Dependency_Record entries[1];                            /* Dynamically allocate entries. */
198 } ATOM_Tonga_SCLK_Dependency_Table;
199
200 typedef struct _ATOM_Tonga_PCIE_Record {
201         UCHAR ucPCIEGenSpeed;
202         UCHAR usPCIELaneWidth;
203         UCHAR ucReserved[2];
204 } ATOM_Tonga_PCIE_Record;
205
206 typedef struct _ATOM_Tonga_PCIE_Table {
207         UCHAR ucRevId;
208         UCHAR ucNumEntries;                                                                             /* Number of entries. */
209         ATOM_Tonga_PCIE_Record entries[1];                                                      /* Dynamically allocate entries. */
210 } ATOM_Tonga_PCIE_Table;
211
212 typedef struct _ATOM_Tonga_MM_Dependency_Record {
213         UCHAR   ucVddcInd;                                                                                       /* VDDC voltage */
214         USHORT  usVddgfxOffset;                                                                   /* Offset relative to VDDC voltage */
215         ULONG  ulDClk;                                                                                          /* UVD D-clock */
216         ULONG  ulVClk;                                                                                          /* UVD V-clock */
217         ULONG  ulEClk;                                                                                          /* VCE clock */
218         ULONG  ulAClk;                                                                                          /* ACP clock */
219         ULONG  ulSAMUClk;                                                                                       /* SAMU clock */
220 } ATOM_Tonga_MM_Dependency_Record;
221
222 typedef struct _ATOM_Tonga_MM_Dependency_Table {
223         UCHAR ucRevId;
224         UCHAR ucNumEntries;                                                                             /* Number of entries. */
225         ATOM_Tonga_MM_Dependency_Record entries[1];                        /* Dynamically allocate entries. */
226 } ATOM_Tonga_MM_Dependency_Table;
227
228 typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
229         USHORT usVdd;                                                                                      /* Base voltage */
230         USHORT usCACLow;
231         USHORT usCACMid;
232         USHORT usCACHigh;
233 } ATOM_Tonga_Voltage_Lookup_Record;
234
235 typedef struct _ATOM_Tonga_Voltage_Lookup_Table {
236         UCHAR ucRevId;
237         UCHAR ucNumEntries;                                                                             /* Number of entries. */
238         ATOM_Tonga_Voltage_Lookup_Record entries[1];                            /* Dynamically allocate entries. */
239 } ATOM_Tonga_Voltage_Lookup_Table;
240
241 typedef struct _ATOM_Tonga_Fan_Table {
242         UCHAR   ucRevId;                                                 /* Change this if the table format changes or version changes so that the other fields are not the same. */
243         UCHAR   ucTHyst;                                                 /* Temperature hysteresis. Integer. */
244         USHORT  usTMin;                                                  /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
245         USHORT  usTMed;                                                  /* The middle temperature where we change slopes. */
246         USHORT  usTHigh;                                                 /* The high point above TMed for adjusting the second slope. */
247         USHORT  usPWMMin;                                                /* The minimum PWM value in percent (0.01% increments). */
248         USHORT  usPWMMed;                                                /* The PWM value (in percent) at TMed. */
249         USHORT  usPWMHigh;                                               /* The PWM value at THigh. */
250         USHORT  usTMax;                                                  /* The max temperature */
251         UCHAR   ucFanControlMode;                                 /* Legacy or Fuzzy Fan mode */
252         USHORT  usFanPWMMax;                                      /* Maximum allowed fan power in percent */
253         USHORT  usFanOutputSensitivity;           /* Sensitivity of fan reaction to temepature changes */
254         USHORT  usFanRPMMax;                                      /* The default value in RPM */
255         ULONG  ulMinFanSCLKAcousticLimit;          /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
256         UCHAR   ucTargetTemperature;                     /* Advanced fan controller target temperature. */
257         UCHAR   ucMinimumPWMLimit;                        /* The minimum PWM that the advanced fan controller can set.  This should be set to the highest PWM that will run the fan at its lowest RPM. */
258         USHORT  usReserved;
259 } ATOM_Tonga_Fan_Table;
260
261 typedef struct _ATOM_Fiji_Fan_Table {
262         UCHAR   ucRevId;                                                 /* Change this if the table format changes or version changes so that the other fields are not the same. */
263         UCHAR   ucTHyst;                                                 /* Temperature hysteresis. Integer. */
264         USHORT  usTMin;                                                  /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
265         USHORT  usTMed;                                                  /* The middle temperature where we change slopes. */
266         USHORT  usTHigh;                                                 /* The high point above TMed for adjusting the second slope. */
267         USHORT  usPWMMin;                                                /* The minimum PWM value in percent (0.01% increments). */
268         USHORT  usPWMMed;                                                /* The PWM value (in percent) at TMed. */
269         USHORT  usPWMHigh;                                               /* The PWM value at THigh. */
270         USHORT  usTMax;                                                  /* The max temperature */
271         UCHAR   ucFanControlMode;                                 /* Legacy or Fuzzy Fan mode */
272         USHORT  usFanPWMMax;                                      /* Maximum allowed fan power in percent */
273         USHORT  usFanOutputSensitivity;           /* Sensitivity of fan reaction to temepature changes */
274         USHORT  usFanRPMMax;                                      /* The default value in RPM */
275         ULONG  ulMinFanSCLKAcousticLimit;               /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
276         UCHAR   ucTargetTemperature;                     /* Advanced fan controller target temperature. */
277         UCHAR   ucMinimumPWMLimit;                        /* The minimum PWM that the advanced fan controller can set.  This should be set to the highest PWM that will run the fan at its lowest RPM. */
278         USHORT  usFanGainEdge;
279         USHORT  usFanGainHotspot;
280         USHORT  usFanGainLiquid;
281         USHORT  usFanGainVrVddc;
282         USHORT  usFanGainVrMvdd;
283         USHORT  usFanGainPlx;
284         USHORT  usFanGainHbm;
285         USHORT  usReserved;
286 } ATOM_Fiji_Fan_Table;
287
288 typedef struct _ATOM_Tonga_Thermal_Controller {
289         UCHAR ucRevId;
290         UCHAR ucType;              /* one of ATOM_TONGA_PP_THERMALCONTROLLER_* */
291         UCHAR ucI2cLine;                /* as interpreted by DAL I2C */
292         UCHAR ucI2cAddress;
293         UCHAR ucFanParameters;  /* Fan Control Parameters. */
294         UCHAR ucFanMinRPM;       /* Fan Minimum RPM (hundreds) -- for display purposes only. */
295         UCHAR ucFanMaxRPM;       /* Fan Maximum RPM (hundreds) -- for display purposes only. */
296         UCHAR ucReserved;
297         UCHAR ucFlags;             /* to be defined */
298 } ATOM_Tonga_Thermal_Controller;
299
300 typedef struct _ATOM_Tonga_VCE_State_Record {
301         UCHAR  ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Tonga_MM_Dependency_Table' type */
302         UCHAR  ucFlag;          /* 2 bits indicates memory p-states */
303         UCHAR  ucSCLKIndex;             /*index into ATOM_Tonga_SCLK_Dependency_Table */
304         UCHAR  ucMCLKIndex;             /*index into ATOM_Tonga_MCLK_Dependency_Table */
305 } ATOM_Tonga_VCE_State_Record;
306
307 typedef struct _ATOM_Tonga_VCE_State_Table {
308         UCHAR ucRevId;
309         UCHAR ucNumEntries;
310         ATOM_Tonga_VCE_State_Record entries[1];
311 } ATOM_Tonga_VCE_State_Table;
312
313 typedef struct _ATOM_Tonga_PowerTune_Table {
314         UCHAR  ucRevId;
315         USHORT usTDP;
316         USHORT usConfigurableTDP;
317         USHORT usTDC;
318         USHORT usBatteryPowerLimit;
319         USHORT usSmallPowerLimit;
320         USHORT usLowCACLeakage;
321         USHORT usHighCACLeakage;
322         USHORT usMaximumPowerDeliveryLimit;
323         USHORT usTjMax;
324         USHORT usPowerTuneDataSetID;
325         USHORT usEDCLimit;
326         USHORT usSoftwareShutdownTemp;
327         USHORT usClockStretchAmount;
328         USHORT usReserve[2];
329 } ATOM_Tonga_PowerTune_Table;
330
331 typedef struct _ATOM_Fiji_PowerTune_Table {
332         UCHAR  ucRevId;
333         USHORT usTDP;
334         USHORT usConfigurableTDP;
335         USHORT usTDC;
336         USHORT usBatteryPowerLimit;
337         USHORT usSmallPowerLimit;
338         USHORT usLowCACLeakage;
339         USHORT usHighCACLeakage;
340         USHORT usMaximumPowerDeliveryLimit;
341         USHORT usTjMax;  /* For Fiji, this is also usTemperatureLimitEdge; */
342         USHORT usPowerTuneDataSetID;
343         USHORT usEDCLimit;
344         USHORT usSoftwareShutdownTemp;
345         USHORT usClockStretchAmount;
346         USHORT usTemperatureLimitHotspot;  /*The following are added for Fiji */
347         USHORT usTemperatureLimitLiquid1;
348         USHORT usTemperatureLimitLiquid2;
349         USHORT usTemperatureLimitVrVddc;
350         USHORT usTemperatureLimitVrMvdd;
351         USHORT usTemperatureLimitPlx;
352         UCHAR  ucLiquid1_I2C_address;  /*Liquid */
353         UCHAR  ucLiquid2_I2C_address;
354         UCHAR  ucLiquid_I2C_Line;
355         UCHAR  ucVr_I2C_address;        /*VR */
356         UCHAR  ucVr_I2C_Line;
357         UCHAR  ucPlx_I2C_address;  /*PLX */
358         UCHAR  ucPlx_I2C_Line;
359         USHORT usReserved;
360 } ATOM_Fiji_PowerTune_Table;
361
362 #define ATOM_PPM_A_A    1
363 #define ATOM_PPM_A_I    2
364 typedef struct _ATOM_Tonga_PPM_Table {
365         UCHAR   ucRevId;
366         UCHAR   ucPpmDesign;              /*A+I or A+A */
367         USHORT  usCpuCoreNumber;
368         ULONG  ulPlatformTDP;
369         ULONG  ulSmallACPlatformTDP;
370         ULONG  ulPlatformTDC;
371         ULONG  ulSmallACPlatformTDC;
372         ULONG  ulApuTDP;
373         ULONG  ulDGpuTDP;
374         ULONG  ulDGpuUlvPower;
375         ULONG  ulTjmax;
376 } ATOM_Tonga_PPM_Table;
377
378 typedef struct _ATOM_Tonga_Hard_Limit_Record {
379         ULONG  ulSCLKLimit;
380         ULONG  ulMCLKLimit;
381         USHORT  usVddcLimit;
382         USHORT  usVddciLimit;
383         USHORT  usVddgfxLimit;
384 } ATOM_Tonga_Hard_Limit_Record;
385
386 typedef struct _ATOM_Tonga_Hard_Limit_Table {
387         UCHAR ucRevId;
388         UCHAR ucNumEntries;
389         ATOM_Tonga_Hard_Limit_Record entries[1];
390 } ATOM_Tonga_Hard_Limit_Table;
391
392 typedef struct _ATOM_Tonga_GPIO_Table {
393         UCHAR  ucRevId;
394         UCHAR  ucVRHotTriggeredSclkDpmIndex;            /* If VRHot signal is triggered SCLK will be limited to this DPM level */
395         UCHAR  ucReserve[5];
396 } ATOM_Tonga_GPIO_Table;
397
398 typedef struct _PPTable_Generic_SubTable_Header {
399         UCHAR  ucRevId;
400 } PPTable_Generic_SubTable_Header;
401
402
403 #pragma pack(pop)
404
405
406 #endif