2 * Copyright 2015 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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24 #ifndef _GPU_SCHEDULER_H_
25 #define _GPU_SCHEDULER_H_
27 #include <linux/kfifo.h>
28 #include <linux/fence.h>
30 #define AMD_SCHED_FENCE_SCHEDULED_BIT FENCE_FLAG_USER_BITS
32 struct amd_gpu_scheduler;
35 extern struct kmem_cache *sched_fence_slab;
36 extern atomic_t sched_fence_slab_ref;
39 * A scheduler entity is a wrapper around a job queue or a group
40 * of other entities. Entities take turns emitting jobs from their
41 * job queues to corresponding hardware ring based on scheduling
44 struct amd_sched_entity {
45 struct list_head list;
46 struct amd_sched_rq *rq;
47 struct amd_gpu_scheduler *sched;
49 spinlock_t queue_lock;
50 struct kfifo job_queue;
53 uint64_t fence_context;
55 struct fence *dependency;
60 * Run queue is a set of entities scheduling command submissions for
61 * one specific ring. It implements the scheduling policy that selects
62 * the next entity to emit commands from.
66 struct list_head entities;
67 struct amd_sched_entity *current_entity;
70 struct amd_sched_fence {
73 struct list_head scheduled_cb;
74 struct amd_gpu_scheduler *sched;
77 struct delayed_work dwork;
78 struct list_head list;
81 struct amd_sched_job {
82 struct amd_gpu_scheduler *sched;
83 struct amd_sched_entity *s_entity;
84 struct amd_sched_fence *s_fence;
87 extern const struct fence_ops amd_sched_fence_ops;
88 static inline struct amd_sched_fence *to_amd_sched_fence(struct fence *f)
90 struct amd_sched_fence *__f = container_of(f, struct amd_sched_fence, base);
92 if (__f->base.ops == &amd_sched_fence_ops)
99 * Define the backend operations called by the scheduler,
100 * these functions should be implemented in driver side
102 struct amd_sched_backend_ops {
103 struct fence *(*dependency)(struct amd_sched_job *sched_job);
104 struct fence *(*run_job)(struct amd_sched_job *sched_job);
107 enum amd_sched_priority {
108 AMD_SCHED_PRIORITY_KERNEL = 0,
109 AMD_SCHED_PRIORITY_NORMAL,
110 AMD_SCHED_MAX_PRIORITY
114 * One scheduler is implemented for each hardware ring
116 struct amd_gpu_scheduler {
117 struct amd_sched_backend_ops *ops;
118 uint32_t hw_submission_limit;
121 struct amd_sched_rq sched_rq[AMD_SCHED_MAX_PRIORITY];
122 wait_queue_head_t wake_up_worker;
123 wait_queue_head_t job_scheduled;
124 atomic_t hw_rq_count;
125 struct list_head fence_list;
126 spinlock_t fence_list_lock;
127 struct task_struct *thread;
130 int amd_sched_init(struct amd_gpu_scheduler *sched,
131 struct amd_sched_backend_ops *ops,
132 uint32_t hw_submission, long timeout, const char *name);
133 void amd_sched_fini(struct amd_gpu_scheduler *sched);
135 int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
136 struct amd_sched_entity *entity,
137 struct amd_sched_rq *rq,
139 void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
140 struct amd_sched_entity *entity);
141 void amd_sched_entity_push_job(struct amd_sched_job *sched_job);
143 struct amd_sched_fence *amd_sched_fence_create(
144 struct amd_sched_entity *s_entity, void *owner);
145 void amd_sched_fence_scheduled(struct amd_sched_fence *fence);
146 void amd_sched_fence_signal(struct amd_sched_fence *fence);