drivers/gpu/drm/arm/hdlcd_drv.c

   1 /*
   2  * Copyright (C) 2013-2015 ARM Limited
   3  * Author: Liviu Dudau <Liviu.Dudau@arm.com>
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file COPYING in the main directory of this archive
   7  * for more details.
   8  *
   9  *  ARM HDLCD Driver
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/spinlock.h>
  14 #include <linux/clk.h>
  15 #include <linux/component.h>
  16 #include <linux/list.h>
  17 #include <linux/of_graph.h>
  18 #include <linux/of_reserved_mem.h>
  19 #include <linux/pm_runtime.h>
  20
  21 #include <drm/drmP.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_crtc.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26 #include <drm/drm_fb_cma_helper.h>
  27 #include <drm/drm_gem_cma_helper.h>
  28 #include <drm/drm_of.h>
  29
  30 #include "hdlcd_drv.h"
  31 #include "hdlcd_regs.h"
  32
  33 static int hdlcd_load(struct drm_device *drm, unsigned long flags)
  34 {
  35         struct hdlcd_drm_private *hdlcd = drm->dev_private;
  36         struct platform_device *pdev = to_platform_device(drm->dev);
  37         struct resource *res;
  38         u32 version;
  39         int ret;
  40
  41         hdlcd->clk = devm_clk_get(drm->dev, "pxlclk");
  42         if (IS_ERR(hdlcd->clk))
  43                 return PTR_ERR(hdlcd->clk);
  44
  45 #ifdef CONFIG_DEBUG_FS
  46         atomic_set(&hdlcd->buffer_underrun_count, 0);
  47         atomic_set(&hdlcd->bus_error_count, 0);
  48         atomic_set(&hdlcd->vsync_count, 0);
  49         atomic_set(&hdlcd->dma_end_count, 0);
  50 #endif
  51
  52         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  53         hdlcd->mmio = devm_ioremap_resource(drm->dev, res);
  54         if (IS_ERR(hdlcd->mmio)) {
  55                 DRM_ERROR("failed to map control registers area\n");
  56                 ret = PTR_ERR(hdlcd->mmio);
  57                 hdlcd->mmio = NULL;
  58                 return ret;
  59         }
  60
  61         version = hdlcd_read(hdlcd, HDLCD_REG_VERSION);
  62         if ((version & HDLCD_PRODUCT_MASK) != HDLCD_PRODUCT_ID) {
  63                 DRM_ERROR("unknown product id: 0x%x\n", version);
  64                 return -EINVAL;
  65         }
  66         DRM_INFO("found ARM HDLCD version r%dp%d\n",
  67                 (version & HDLCD_VERSION_MAJOR_MASK) >> 8,
  68                 version & HDLCD_VERSION_MINOR_MASK);
  69
  70         /* Get the optional framebuffer memory resource */
  71         ret = of_reserved_mem_device_init(drm->dev);
  72         if (ret && ret != -ENODEV)
  73                 return ret;
  74
  75         ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
  76         if (ret)
  77                 goto setup_fail;
  78
  79         ret = hdlcd_setup_crtc(drm);
  80         if (ret < 0) {
  81                 DRM_ERROR("failed to create crtc\n");
  82                 goto setup_fail;
  83         }
  84
  85         ret = drm_irq_install(drm, platform_get_irq(pdev, 0));
  86         if (ret < 0) {
  87                 DRM_ERROR("failed to install IRQ handler\n");
  88                 goto irq_fail;
  89         }
  90
  91         return 0;
  92
  93 irq_fail:
  94         drm_crtc_cleanup(&hdlcd->crtc);
  95 setup_fail:
  96         of_reserved_mem_device_release(drm->dev);
  97
  98         return ret;
  99 }
 100
 101 static void hdlcd_fb_output_poll_changed(struct drm_device *drm)
 102 {
 103         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 104
 105         if (hdlcd->fbdev)
 106                 drm_fbdev_cma_hotplug_event(hdlcd->fbdev);
 107 }
 108
 109 static int hdlcd_atomic_commit(struct drm_device *dev,
 110                                struct drm_atomic_state *state, bool nonblock)
 111 {
 112         return drm_atomic_helper_commit(dev, state, false);
 113 }
 114
 115 static const struct drm_mode_config_funcs hdlcd_mode_config_funcs = {
 116         .fb_create = drm_fb_cma_create,
 117         .output_poll_changed = hdlcd_fb_output_poll_changed,
 118         .atomic_check = drm_atomic_helper_check,
 119         .atomic_commit = hdlcd_atomic_commit,
 120 };
 121
 122 static void hdlcd_setup_mode_config(struct drm_device *drm)
 123 {
 124         drm_mode_config_init(drm);
 125         drm->mode_config.min_width = 0;
 126         drm->mode_config.min_height = 0;
 127         drm->mode_config.max_width = HDLCD_MAX_XRES;
 128         drm->mode_config.max_height = HDLCD_MAX_YRES;
 129         drm->mode_config.funcs = &hdlcd_mode_config_funcs;
 130 }
 131
 132 static void hdlcd_lastclose(struct drm_device *drm)
 133 {
 134         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 135
 136         drm_fbdev_cma_restore_mode(hdlcd->fbdev);
 137 }
 138
 139 static irqreturn_t hdlcd_irq(int irq, void *arg)
 140 {
 141         struct drm_device *drm = arg;
 142         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 143         unsigned long irq_status;
 144
 145         irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS);
 146
 147 #ifdef CONFIG_DEBUG_FS
 148         if (irq_status & HDLCD_INTERRUPT_UNDERRUN)
 149                 atomic_inc(&hdlcd->buffer_underrun_count);
 150
 151         if (irq_status & HDLCD_INTERRUPT_DMA_END)
 152                 atomic_inc(&hdlcd->dma_end_count);
 153
 154         if (irq_status & HDLCD_INTERRUPT_BUS_ERROR)
 155                 atomic_inc(&hdlcd->bus_error_count);
 156
 157         if (irq_status & HDLCD_INTERRUPT_VSYNC)
 158                 atomic_inc(&hdlcd->vsync_count);
 159
 160 #endif
 161         if (irq_status & HDLCD_INTERRUPT_VSYNC)
 162                 drm_crtc_handle_vblank(&hdlcd->crtc);
 163
 164         /* acknowledge interrupt(s) */
 165         hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status);
 166
 167         return IRQ_HANDLED;
 168 }
 169
 170 static void hdlcd_irq_preinstall(struct drm_device *drm)
 171 {
 172         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 173         /* Ensure interrupts are disabled */
 174         hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);
 175         hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0);
 176 }
 177
 178 static int hdlcd_irq_postinstall(struct drm_device *drm)
 179 {
 180 #ifdef CONFIG_DEBUG_FS
 181         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 182         unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);
 183
 184         /* enable debug interrupts */
 185         irq_mask |= HDLCD_DEBUG_INT_MASK;
 186
 187         hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask);
 188 #endif
 189         return 0;
 190 }
 191
 192 static void hdlcd_irq_uninstall(struct drm_device *drm)
 193 {
 194         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 195         /* disable all the interrupts that we might have enabled */
 196         unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);
 197
 198 #ifdef CONFIG_DEBUG_FS
 199         /* disable debug interrupts */
 200         irq_mask &= ~HDLCD_DEBUG_INT_MASK;
 201 #endif
 202
 203         /* disable vsync interrupts */
 204         irq_mask &= ~HDLCD_INTERRUPT_VSYNC;
 205
 206         hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask);
 207 }
 208
 209 static int hdlcd_enable_vblank(struct drm_device *drm, unsigned int crtc)
 210 {
 211         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 212         unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);
 213
 214         hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask | HDLCD_INTERRUPT_VSYNC);
 215
 216         return 0;
 217 }
 218
 219 static void hdlcd_disable_vblank(struct drm_device *drm, unsigned int crtc)
 220 {
 221         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 222         unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);
 223
 224         hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask & ~HDLCD_INTERRUPT_VSYNC);
 225 }
 226
 227 #ifdef CONFIG_DEBUG_FS
 228 static int hdlcd_show_underrun_count(struct seq_file *m, void *arg)
 229 {
 230         struct drm_info_node *node = (struct drm_info_node *)m->private;
 231         struct drm_device *drm = node->minor->dev;
 232         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 233
 234         seq_printf(m, "underrun : %d\n", atomic_read(&hdlcd->buffer_underrun_count));
 235         seq_printf(m, "dma_end  : %d\n", atomic_read(&hdlcd->dma_end_count));
 236         seq_printf(m, "bus_error: %d\n", atomic_read(&hdlcd->bus_error_count));
 237         seq_printf(m, "vsync    : %d\n", atomic_read(&hdlcd->vsync_count));
 238         return 0;
 239 }
 240
 241 static int hdlcd_show_pxlclock(struct seq_file *m, void *arg)
 242 {
 243         struct drm_info_node *node = (struct drm_info_node *)m->private;
 244         struct drm_device *drm = node->minor->dev;
 245         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 246         unsigned long clkrate = clk_get_rate(hdlcd->clk);
 247         unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000;
 248
 249         seq_printf(m, "hw  : %lu\n", clkrate);
 250         seq_printf(m, "mode: %lu\n", mode_clock);
 251         return 0;
 252 }
 253
 254 static struct drm_info_list hdlcd_debugfs_list[] = {
 255         { "interrupt_count", hdlcd_show_underrun_count, 0 },
 256         { "clocks", hdlcd_show_pxlclock, 0 },
 257         { "fb", drm_fb_cma_debugfs_show, 0 },
 258 };
 259
 260 static int hdlcd_debugfs_init(struct drm_minor *minor)
 261 {
 262         return drm_debugfs_create_files(hdlcd_debugfs_list,
 263                 ARRAY_SIZE(hdlcd_debugfs_list), minor->debugfs_root, minor);
 264 }
 265
 266 static void hdlcd_debugfs_cleanup(struct drm_minor *minor)
 267 {
 268         drm_debugfs_remove_files(hdlcd_debugfs_list,
 269                 ARRAY_SIZE(hdlcd_debugfs_list), minor);
 270 }
 271 #endif
 272
 273 static const struct file_operations fops = {
 274         .owner          = THIS_MODULE,
 275         .open           = drm_open,
 276         .release        = drm_release,
 277         .unlocked_ioctl = drm_ioctl,
 278 #ifdef CONFIG_COMPAT
 279         .compat_ioctl   = drm_compat_ioctl,
 280 #endif
 281         .poll           = drm_poll,
 282         .read           = drm_read,
 283         .llseek         = noop_llseek,
 284         .mmap           = drm_gem_cma_mmap,
 285 };
 286
 287 static struct drm_driver hdlcd_driver = {
 288         .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM |
 289                            DRIVER_MODESET | DRIVER_PRIME |
 290                            DRIVER_ATOMIC,
 291         .lastclose = hdlcd_lastclose,
 292         .irq_handler = hdlcd_irq,
 293         .irq_preinstall = hdlcd_irq_preinstall,
 294         .irq_postinstall = hdlcd_irq_postinstall,
 295         .irq_uninstall = hdlcd_irq_uninstall,
 296         .get_vblank_counter = drm_vblank_no_hw_counter,
 297         .enable_vblank = hdlcd_enable_vblank,
 298         .disable_vblank = hdlcd_disable_vblank,
 299         .gem_free_object_unlocked = drm_gem_cma_free_object,
 300         .gem_vm_ops = &drm_gem_cma_vm_ops,
 301         .dumb_create = drm_gem_cma_dumb_create,
 302         .dumb_map_offset = drm_gem_cma_dumb_map_offset,
 303         .dumb_destroy = drm_gem_dumb_destroy,
 304         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 305         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 306         .gem_prime_export = drm_gem_prime_export,
 307         .gem_prime_import = drm_gem_prime_import,
 308         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 309         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 310         .gem_prime_vmap = drm_gem_cma_prime_vmap,
 311         .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
 312         .gem_prime_mmap = drm_gem_cma_prime_mmap,
 313 #ifdef CONFIG_DEBUG_FS
 314         .debugfs_init = hdlcd_debugfs_init,
 315         .debugfs_cleanup = hdlcd_debugfs_cleanup,
 316 #endif
 317         .fops = &fops,
 318         .name = "hdlcd",
 319         .desc = "ARM HDLCD Controller DRM",
 320         .date = "20151021",
 321         .major = 1,
 322         .minor = 0,
 323 };
 324
 325 static int hdlcd_drm_bind(struct device *dev)
 326 {
 327         struct drm_device *drm;
 328         struct hdlcd_drm_private *hdlcd;
 329         int ret;
 330
 331         hdlcd = devm_kzalloc(dev, sizeof(*hdlcd), GFP_KERNEL);
 332         if (!hdlcd)
 333                 return -ENOMEM;
 334
 335         drm = drm_dev_alloc(&hdlcd_driver, dev);
 336         if (!drm)
 337                 return -ENOMEM;
 338
 339         drm->dev_private = hdlcd;
 340         dev_set_drvdata(dev, drm);
 341
 342         hdlcd_setup_mode_config(drm);
 343         ret = hdlcd_load(drm, 0);
 344         if (ret)
 345                 goto err_free;
 346
 347         ret = drm_dev_register(drm, 0);
 348         if (ret)
 349                 goto err_unload;
 350
 351         ret = component_bind_all(dev, drm);
 352         if (ret) {
 353                 DRM_ERROR("Failed to bind all components\n");
 354                 goto err_unregister;
 355         }
 356
 357         ret = pm_runtime_set_active(dev);
 358         if (ret)
 359                 goto err_pm_active;
 360
 361         pm_runtime_enable(dev);
 362
 363         ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
 364         if (ret < 0) {
 365                 DRM_ERROR("failed to initialise vblank\n");
 366                 goto err_vblank;
 367         }
 368
 369         drm_mode_config_reset(drm);
 370         drm_kms_helper_poll_init(drm);
 371
 372         hdlcd->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
 373                                           drm->mode_config.num_connector);
 374
 375         if (IS_ERR(hdlcd->fbdev)) {
 376                 ret = PTR_ERR(hdlcd->fbdev);
 377                 hdlcd->fbdev = NULL;
 378                 goto err_fbdev;
 379         }
 380
 381         return 0;
 382
 383 err_fbdev:
 384         drm_kms_helper_poll_fini(drm);
 385         drm_mode_config_cleanup(drm);
 386         drm_vblank_cleanup(drm);
 387 err_vblank:
 388         pm_runtime_disable(drm->dev);
 389 err_pm_active:
 390         component_unbind_all(dev, drm);
 391 err_unregister:
 392         drm_dev_unregister(drm);
 393 err_unload:
 394         drm_irq_uninstall(drm);
 395         of_reserved_mem_device_release(drm->dev);
 396 err_free:
 397         dev_set_drvdata(dev, NULL);
 398         drm_dev_unref(drm);
 399
 400         return ret;
 401 }
 402
 403 static void hdlcd_drm_unbind(struct device *dev)
 404 {
 405         struct drm_device *drm = dev_get_drvdata(dev);
 406         struct hdlcd_drm_private *hdlcd = drm->dev_private;
 407
 408         if (hdlcd->fbdev) {
 409                 drm_fbdev_cma_fini(hdlcd->fbdev);
 410                 hdlcd->fbdev = NULL;
 411         }
 412         drm_kms_helper_poll_fini(drm);
 413         component_unbind_all(dev, drm);
 414         drm_vblank_cleanup(drm);
 415         pm_runtime_get_sync(drm->dev);
 416         drm_irq_uninstall(drm);
 417         pm_runtime_put_sync(drm->dev);
 418         pm_runtime_disable(drm->dev);
 419         of_reserved_mem_device_release(drm->dev);
 420         drm_mode_config_cleanup(drm);
 421         drm_dev_unregister(drm);
 422         drm_dev_unref(drm);
 423         drm->dev_private = NULL;
 424         dev_set_drvdata(dev, NULL);
 425 }
 426
 427 static const struct component_master_ops hdlcd_master_ops = {
 428         .bind           = hdlcd_drm_bind,
 429         .unbind         = hdlcd_drm_unbind,
 430 };
 431
 432 static int compare_dev(struct device *dev, void *data)
 433 {
 434         return dev->of_node == data;
 435 }
 436
 437 static int hdlcd_probe(struct platform_device *pdev)
 438 {
 439         struct device_node *port, *ep;
 440         struct component_match *match = NULL;
 441
 442         if (!pdev->dev.of_node)
 443                 return -ENODEV;
 444
 445         /* there is only one output port inside each device, find it */
 446         ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
 447         if (!ep)
 448                 return -ENODEV;
 449
 450         if (!of_device_is_available(ep)) {
 451                 of_node_put(ep);
 452                 return -ENODEV;
 453         }
 454
 455         /* add the remote encoder port as component */
 456         port = of_graph_get_remote_port_parent(ep);
 457         of_node_put(ep);
 458         if (!port || !of_device_is_available(port)) {
 459                 of_node_put(port);
 460                 return -EAGAIN;
 461         }
 462
 463         component_match_add(&pdev->dev, &match, compare_dev, port);
 464
 465         return component_master_add_with_match(&pdev->dev, &hdlcd_master_ops,
 466                                                match);
 467 }
 468
 469 static int hdlcd_remove(struct platform_device *pdev)
 470 {
 471         component_master_del(&pdev->dev, &hdlcd_master_ops);
 472         return 0;
 473 }
 474
 475 static const struct of_device_id  hdlcd_of_match[] = {
 476         { .compatible   = "arm,hdlcd" },
 477         {},
 478 };
 479 MODULE_DEVICE_TABLE(of, hdlcd_of_match);
 480
 481 static int __maybe_unused hdlcd_pm_suspend(struct device *dev)
 482 {
 483         struct drm_device *drm = dev_get_drvdata(dev);
 484         struct hdlcd_drm_private *hdlcd = drm ? drm->dev_private : NULL;
 485
 486         if (!hdlcd)
 487                 return 0;
 488
 489         drm_kms_helper_poll_disable(drm);
 490
 491         hdlcd->state = drm_atomic_helper_suspend(drm);
 492         if (IS_ERR(hdlcd->state)) {
 493                 drm_kms_helper_poll_enable(drm);
 494                 return PTR_ERR(hdlcd->state);
 495         }
 496
 497         return 0;
 498 }
 499
 500 static int __maybe_unused hdlcd_pm_resume(struct device *dev)
 501 {
 502         struct drm_device *drm = dev_get_drvdata(dev);
 503         struct hdlcd_drm_private *hdlcd = drm ? drm->dev_private : NULL;
 504
 505         if (!hdlcd)
 506                 return 0;
 507
 508         drm_atomic_helper_resume(drm, hdlcd->state);
 509         drm_kms_helper_poll_enable(drm);
 510         pm_runtime_set_active(dev);
 511
 512         return 0;
 513 }
 514
 515 static SIMPLE_DEV_PM_OPS(hdlcd_pm_ops, hdlcd_pm_suspend, hdlcd_pm_resume);
 516
 517 static struct platform_driver hdlcd_platform_driver = {
 518         .probe          = hdlcd_probe,
 519         .remove         = hdlcd_remove,
 520         .driver = {
 521                 .name = "hdlcd",
 522                 .pm = &hdlcd_pm_ops,
 523                 .of_match_table = hdlcd_of_match,
 524         },
 525 };
 526
 527 module_platform_driver(hdlcd_platform_driver);
 528
 529 MODULE_AUTHOR("Liviu Dudau");
 530 MODULE_DESCRIPTION("ARM HDLCD DRM driver");
 531 MODULE_LICENSE("GPL v2");