2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
26 * Authors: Dave Airlie <airlied@redhat.com>
32 #include <drm/drm_fb_helper.h>
33 #include <drm/drm_crtc_helper.h>
35 #include "ast_dram_tables.h"
37 void ast_set_index_reg_mask(struct ast_private *ast,
38 uint32_t base, uint8_t index,
39 uint8_t mask, uint8_t val)
42 ast_io_write8(ast, base, index);
43 tmp = (ast_io_read8(ast, base + 1) & mask) | val;
44 ast_set_index_reg(ast, base, index, tmp);
47 uint8_t ast_get_index_reg(struct ast_private *ast,
48 uint32_t base, uint8_t index)
51 ast_io_write8(ast, base, index);
52 ret = ast_io_read8(ast, base + 1);
56 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
57 uint32_t base, uint8_t index, uint8_t mask)
60 ast_io_write8(ast, base, index);
61 ret = ast_io_read8(ast, base + 1) & mask;
66 static int ast_detect_chip(struct drm_device *dev, bool *need_post)
68 struct ast_private *ast = dev->dev_private;
71 if (dev->pdev->device == PCI_CHIP_AST1180) {
73 DRM_INFO("AST 1180 detected\n");
75 if (dev->pdev->revision >= 0x30) {
77 DRM_INFO("AST 2400 detected\n");
78 } else if (dev->pdev->revision >= 0x20) {
80 DRM_INFO("AST 2300 detected\n");
81 } else if (dev->pdev->revision >= 0x10) {
83 ast_write32(ast, 0xf004, 0x1e6e0000);
84 ast_write32(ast, 0xf000, 0x1);
86 data = ast_read32(ast, 0x1207c);
87 switch (data & 0x0300) {
90 DRM_INFO("AST 1100 detected\n");
94 DRM_INFO("AST 2200 detected\n");
98 DRM_INFO("AST 2150 detected\n");
102 DRM_INFO("AST 2100 detected\n");
105 ast->vga2_clone = false;
108 DRM_INFO("AST 2000 detected\n");
113 * If VGA isn't enabled, we need to enable now or subsequent
114 * access to the scratch registers will fail. We also inform
115 * our caller that it needs to POST the chip
116 * (Assumption: VGA not enabled -> need to POST)
118 if (!ast_is_vga_enabled(dev)) {
120 ast_enable_mmio(dev);
121 DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
126 /* Check if we support wide screen */
129 ast->support_wide_screen = true;
132 ast->support_wide_screen = false;
135 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
137 ast->support_wide_screen = true;
138 else if (jreg & 0x01)
139 ast->support_wide_screen = true;
141 ast->support_wide_screen = false;
142 /* Read SCU7c (silicon revision register) */
143 ast_write32(ast, 0xf004, 0x1e6e0000);
144 ast_write32(ast, 0xf000, 0x1);
145 data = ast_read32(ast, 0x1207c);
147 if (ast->chip == AST2300 && data == 0x0) /* ast1300 */
148 ast->support_wide_screen = true;
149 if (ast->chip == AST2400 && data == 0x100) /* ast1400 */
150 ast->support_wide_screen = true;
155 /* Check 3rd Tx option (digital output afaik) */
156 ast->tx_chip_type = AST_TX_NONE;
159 * VGACRA3 Enhanced Color Mode Register, check if DVO is already
160 * enabled, in that case, assume we have a SIL164 TMDS transmitter
162 * Don't make that assumption if we the chip wasn't enabled and
163 * is at power-on reset, otherwise we'll incorrectly "detect" a
164 * SIL164 when there is none.
167 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
169 ast->tx_chip_type = AST_TX_SIL164;
172 if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
174 * On AST2300 and 2400, look the configuration set by the SoC in
175 * the SOC scratch register #1 bits 11:8 (interestingly marked
176 * as "reserved" in the spec)
178 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
181 ast->tx_chip_type = AST_TX_SIL164;
184 ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL);
185 if (ast->dp501_fw_addr) {
186 /* backup firmware */
187 if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) {
188 kfree(ast->dp501_fw_addr);
189 ast->dp501_fw_addr = NULL;
194 ast->tx_chip_type = AST_TX_DP501;
198 /* Print stuff for diagnostic purposes */
199 switch(ast->tx_chip_type) {
201 DRM_INFO("Using Sil164 TMDS transmitter\n");
204 DRM_INFO("Using DP501 DisplayPort transmitter\n");
207 DRM_INFO("Analog VGA only\n");
212 static int ast_get_dram_info(struct drm_device *dev)
214 struct ast_private *ast = dev->dev_private;
215 uint32_t data, data2;
216 uint32_t denum, num, div, ref_pll;
218 ast_write32(ast, 0xf004, 0x1e6e0000);
219 ast_write32(ast, 0xf000, 0x1);
222 ast_write32(ast, 0x10000, 0xfc600309);
226 } while (ast_read32(ast, 0x10000) != 0x01);
227 data = ast_read32(ast, 0x10004);
230 ast->dram_bus_width = 16;
232 ast->dram_bus_width = 32;
234 if (ast->chip == AST2300 || ast->chip == AST2400) {
235 switch (data & 0x03) {
237 ast->dram_type = AST_DRAM_512Mx16;
241 ast->dram_type = AST_DRAM_1Gx16;
244 ast->dram_type = AST_DRAM_2Gx16;
247 ast->dram_type = AST_DRAM_4Gx16;
251 switch (data & 0x0c) {
254 ast->dram_type = AST_DRAM_512Mx16;
258 ast->dram_type = AST_DRAM_1Gx16;
260 ast->dram_type = AST_DRAM_512Mx32;
263 ast->dram_type = AST_DRAM_1Gx32;
268 data = ast_read32(ast, 0x10120);
269 data2 = ast_read32(ast, 0x10170);
276 num = (data & 0x3fe0) >> 5;
277 data = (data & 0xc000) >> 14;
290 ast->mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000);
294 static void ast_user_framebuffer_destroy(struct drm_framebuffer *fb)
296 struct ast_framebuffer *ast_fb = to_ast_framebuffer(fb);
298 drm_gem_object_unreference_unlocked(ast_fb->obj);
300 drm_framebuffer_cleanup(fb);
304 static const struct drm_framebuffer_funcs ast_fb_funcs = {
305 .destroy = ast_user_framebuffer_destroy,
309 int ast_framebuffer_init(struct drm_device *dev,
310 struct ast_framebuffer *ast_fb,
311 struct drm_mode_fb_cmd2 *mode_cmd,
312 struct drm_gem_object *obj)
316 drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd);
318 ret = drm_framebuffer_init(dev, &ast_fb->base, &ast_fb_funcs);
320 DRM_ERROR("framebuffer init failed %d\n", ret);
326 static struct drm_framebuffer *
327 ast_user_framebuffer_create(struct drm_device *dev,
328 struct drm_file *filp,
329 struct drm_mode_fb_cmd2 *mode_cmd)
331 struct drm_gem_object *obj;
332 struct ast_framebuffer *ast_fb;
335 obj = drm_gem_object_lookup(dev, filp, mode_cmd->handles[0]);
337 return ERR_PTR(-ENOENT);
339 ast_fb = kzalloc(sizeof(*ast_fb), GFP_KERNEL);
341 drm_gem_object_unreference_unlocked(obj);
342 return ERR_PTR(-ENOMEM);
345 ret = ast_framebuffer_init(dev, ast_fb, mode_cmd, obj);
347 drm_gem_object_unreference_unlocked(obj);
351 return &ast_fb->base;
354 static const struct drm_mode_config_funcs ast_mode_funcs = {
355 .fb_create = ast_user_framebuffer_create,
358 static u32 ast_get_vram_info(struct drm_device *dev)
360 struct ast_private *ast = dev->dev_private;
365 vram_size = AST_VIDMEM_DEFAULT_SIZE;
366 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff);
368 case 0: vram_size = AST_VIDMEM_SIZE_8M; break;
369 case 1: vram_size = AST_VIDMEM_SIZE_16M; break;
370 case 2: vram_size = AST_VIDMEM_SIZE_32M; break;
371 case 3: vram_size = AST_VIDMEM_SIZE_64M; break;
374 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff);
375 switch (jreg & 0x03) {
377 vram_size -= 0x100000;
380 vram_size -= 0x200000;
383 vram_size -= 0x400000;
390 int ast_driver_load(struct drm_device *dev, unsigned long flags)
392 struct ast_private *ast;
396 ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
400 dev->dev_private = ast;
403 ast->regs = pci_iomap(dev->pdev, 1, 0);
410 * If we don't have IO space at all, use MMIO now and
411 * assume the chip has MMIO enabled by default (rev 0x20
414 if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) {
415 DRM_INFO("platform has no IO space, trying MMIO\n");
416 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
419 /* "map" IO regs if the above hasn't done so already */
421 ast->ioregs = pci_iomap(dev->pdev, 2, 0);
428 ast_detect_chip(dev, &need_post);
430 if (ast->chip != AST1180) {
431 ast_get_dram_info(dev);
432 ast->vram_size = ast_get_vram_info(dev);
433 DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size);
439 ret = ast_mm_init(ast);
443 drm_mode_config_init(dev);
445 dev->mode_config.funcs = (void *)&ast_mode_funcs;
446 dev->mode_config.min_width = 0;
447 dev->mode_config.min_height = 0;
448 dev->mode_config.preferred_depth = 24;
449 dev->mode_config.prefer_shadow = 1;
451 if (ast->chip == AST2100 ||
452 ast->chip == AST2200 ||
453 ast->chip == AST2300 ||
454 ast->chip == AST2400 ||
455 ast->chip == AST1180) {
456 dev->mode_config.max_width = 1920;
457 dev->mode_config.max_height = 2048;
459 dev->mode_config.max_width = 1600;
460 dev->mode_config.max_height = 1200;
463 ret = ast_mode_init(dev);
467 ret = ast_fbdev_init(dev);
474 dev->dev_private = NULL;
478 int ast_driver_unload(struct drm_device *dev)
480 struct ast_private *ast = dev->dev_private;
482 kfree(ast->dp501_fw_addr);
485 drm_mode_config_cleanup(dev);
488 pci_iounmap(dev->pdev, ast->ioregs);
489 pci_iounmap(dev->pdev, ast->regs);
494 int ast_gem_create(struct drm_device *dev,
495 u32 size, bool iskernel,
496 struct drm_gem_object **obj)
498 struct ast_bo *astbo;
503 size = roundup(size, PAGE_SIZE);
507 ret = ast_bo_create(dev, size, 0, 0, &astbo);
509 if (ret != -ERESTARTSYS)
510 DRM_ERROR("failed to allocate GEM object\n");
517 int ast_dumb_create(struct drm_file *file,
518 struct drm_device *dev,
519 struct drm_mode_create_dumb *args)
522 struct drm_gem_object *gobj;
525 args->pitch = args->width * ((args->bpp + 7) / 8);
526 args->size = args->pitch * args->height;
528 ret = ast_gem_create(dev, args->size, false,
533 ret = drm_gem_handle_create(file, gobj, &handle);
534 drm_gem_object_unreference_unlocked(gobj);
538 args->handle = handle;
542 static void ast_bo_unref(struct ast_bo **bo)
544 struct ttm_buffer_object *tbo;
554 void ast_gem_free_object(struct drm_gem_object *obj)
556 struct ast_bo *ast_bo = gem_to_ast_bo(obj);
558 ast_bo_unref(&ast_bo);
562 static inline u64 ast_bo_mmap_offset(struct ast_bo *bo)
564 return drm_vma_node_offset_addr(&bo->bo.vma_node);
567 ast_dumb_mmap_offset(struct drm_file *file,
568 struct drm_device *dev,
572 struct drm_gem_object *obj;
576 mutex_lock(&dev->struct_mutex);
577 obj = drm_gem_object_lookup(dev, file, handle);
583 bo = gem_to_ast_bo(obj);
584 *offset = ast_bo_mmap_offset(bo);
586 drm_gem_object_unreference(obj);
589 mutex_unlock(&dev->struct_mutex);