drm/exynos: Allow overlays with sub-sized contents
[cascardo/linux.git] / drivers / gpu / drm / exynos / exynos_drm_plane.c
1 /*
2  * Copyright (C) 2011 Samsung Electronics Co.Ltd
3  * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4  *
5  * This program is free software; you can redistribute  it and/or modify it
6  * under  the terms of  the GNU General  Public License as published by the
7  * Free Software Foundation;  either version 2 of the  License, or (at your
8  * option) any later version.
9  *
10  */
11
12 #include "drmP.h"
13
14 #include "exynos_drm.h"
15 #include "exynos_drm_crtc.h"
16 #include "exynos_drm_drv.h"
17 #include "exynos_drm_encoder.h"
18
19 struct exynos_plane {
20         struct drm_plane                base;
21         struct exynos_drm_overlay       overlay;
22         bool                            enabled;
23 };
24
25 static const uint32_t formats[] = {
26         DRM_FORMAT_XRGB8888,
27         DRM_FORMAT_ARGB8888,
28         DRM_FORMAT_NV12,
29         DRM_FORMAT_NV12M,
30         DRM_FORMAT_NV12MT,
31 };
32
33 static int
34 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
35                      struct drm_framebuffer *fb, int crtc_x, int crtc_y,
36                      unsigned int crtc_w, unsigned int crtc_h,
37                      uint32_t src_x, uint32_t src_y,
38                      uint32_t src_w, uint32_t src_h)
39 {
40         struct exynos_plane *exynos_plane =
41                 container_of(plane, struct exynos_plane, base);
42         struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
43         struct exynos_drm_crtc_pos pos;
44         unsigned int x = src_x >> 16;
45         unsigned int y = src_y >> 16;
46         unsigned int w = src_w >> 16;
47         unsigned int h = src_h >> 16;
48         int ret;
49
50         DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
51
52         memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
53         pos.crtc_x = crtc_x;
54         pos.crtc_y = crtc_y;
55         pos.crtc_w = crtc_w;
56         pos.crtc_h = crtc_h;
57
58         pos.fb_x = x;
59         pos.fb_y = y;
60         pos.fb_w = w;
61         pos.fb_h = h;
62
63         /* TODO: scale feature */
64         ret = exynos_drm_overlay_update(overlay, fb, &crtc->mode, &pos);
65         if (ret < 0)
66                 return ret;
67
68         exynos_drm_fn_encoder(crtc, overlay,
69                         exynos_drm_encoder_crtc_mode_set);
70         exynos_drm_fn_encoder(crtc, &overlay->zpos,
71                         exynos_drm_encoder_crtc_plane_commit);
72
73         exynos_plane->enabled = true;
74
75         return 0;
76 }
77
78 static int exynos_disable_plane(struct drm_plane *plane)
79 {
80         struct exynos_plane *exynos_plane =
81                 container_of(plane, struct exynos_plane, base);
82         struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
83
84         DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
85
86         if (!exynos_plane->enabled)
87                 return 0;
88
89         exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
90                         exynos_drm_encoder_crtc_disable);
91
92         exynos_plane->enabled = false;
93         exynos_plane->overlay.zpos = DEFAULT_ZPOS;
94
95         return 0;
96 }
97
98 static void exynos_plane_destroy(struct drm_plane *plane)
99 {
100         struct exynos_plane *exynos_plane =
101                 container_of(plane, struct exynos_plane, base);
102
103         DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
104
105         exynos_disable_plane(plane);
106         drm_plane_cleanup(plane);
107         kfree(exynos_plane);
108 }
109
110 static struct drm_plane_funcs exynos_plane_funcs = {
111         .update_plane   = exynos_update_plane,
112         .disable_plane  = exynos_disable_plane,
113         .destroy        = exynos_plane_destroy,
114 };
115
116 int exynos_plane_init(struct drm_device *dev, unsigned int nr)
117 {
118         struct exynos_plane *exynos_plane;
119         uint32_t possible_crtcs;
120
121         exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
122         if (!exynos_plane)
123                 return -ENOMEM;
124
125         /* all CRTCs are available */
126         possible_crtcs = (1 << MAX_CRTC) - 1;
127
128         exynos_plane->overlay.zpos = DEFAULT_ZPOS;
129
130         return drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
131                               &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
132                               false);
133 }
134
135 int exynos_plane_set_zpos_ioctl(struct drm_device *dev, void *data,
136                                 struct drm_file *file_priv)
137 {
138         struct drm_exynos_plane_set_zpos *zpos_req = data;
139         struct drm_mode_object *obj;
140         struct drm_plane *plane;
141         struct exynos_plane *exynos_plane;
142         int ret = 0;
143
144         DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
145
146         if (!drm_core_check_feature(dev, DRIVER_MODESET))
147                 return -EINVAL;
148
149         if (zpos_req->zpos < 0 || zpos_req->zpos >= MAX_PLANE) {
150                 if (zpos_req->zpos != DEFAULT_ZPOS) {
151                         DRM_ERROR("zpos not within limits\n");
152                         return -EINVAL;
153                 }
154         }
155
156         mutex_lock(&dev->mode_config.mutex);
157
158         obj = drm_mode_object_find(dev, zpos_req->plane_id,
159                         DRM_MODE_OBJECT_PLANE);
160         if (!obj) {
161                 DRM_DEBUG_KMS("Unknown plane ID %d\n",
162                               zpos_req->plane_id);
163                 ret = -EINVAL;
164                 goto out;
165         }
166
167         plane = obj_to_plane(obj);
168         exynos_plane = container_of(plane, struct exynos_plane, base);
169
170         exynos_plane->overlay.zpos = zpos_req->zpos;
171
172 out:
173         mutex_unlock(&dev->mode_config.mutex);
174         return ret;
175 }