2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * Freescale DCU drm device driver
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/clk.h>
13 #include <linux/regmap.h>
16 #include <drm/drm_atomic.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_crtc.h>
19 #include <drm/drm_crtc_helper.h>
21 #include "fsl_dcu_drm_crtc.h"
22 #include "fsl_dcu_drm_drv.h"
23 #include "fsl_dcu_drm_plane.h"
25 static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc,
26 struct drm_crtc_state *old_crtc_state)
28 struct drm_pending_vblank_event *event = crtc->state->event;
31 crtc->state->event = NULL;
33 spin_lock_irq(&crtc->dev->event_lock);
34 if (drm_crtc_vblank_get(crtc) == 0)
35 drm_crtc_arm_vblank_event(crtc, event);
37 drm_crtc_send_vblank_event(crtc, event);
38 spin_unlock_irq(&crtc->dev->event_lock);
42 static void fsl_dcu_drm_disable_crtc(struct drm_crtc *crtc)
44 struct drm_device *dev = crtc->dev;
45 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
47 drm_crtc_vblank_off(crtc);
49 regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
50 DCU_MODE_DCU_MODE_MASK,
51 DCU_MODE_DCU_MODE(DCU_MODE_OFF));
52 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
53 DCU_UPDATE_MODE_READREG);
56 static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc)
58 struct drm_device *dev = crtc->dev;
59 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
61 regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
62 DCU_MODE_DCU_MODE_MASK,
63 DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
64 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
65 DCU_UPDATE_MODE_READREG);
67 drm_crtc_vblank_on(crtc);
70 static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
72 struct drm_device *dev = crtc->dev;
73 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
74 struct drm_connector *con = &fsl_dev->connector.base;
75 struct drm_display_mode *mode = &crtc->state->mode;
76 unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0;
78 index = drm_crtc_index(crtc);
79 clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000);
81 /* Configure timings: */
82 hbp = mode->htotal - mode->hsync_end;
83 hfp = mode->hsync_start - mode->hdisplay;
84 hsw = mode->hsync_end - mode->hsync_start;
85 vbp = mode->vtotal - mode->vsync_end;
86 vfp = mode->vsync_start - mode->vdisplay;
87 vsw = mode->vsync_end - mode->vsync_start;
89 /* INV_PXCK as default (most display sample data on rising edge) */
90 if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE))
91 pol |= DCU_SYN_POL_INV_PXCK;
93 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
94 pol |= DCU_SYN_POL_INV_HS_LOW;
96 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
97 pol |= DCU_SYN_POL_INV_VS_LOW;
99 regmap_write(fsl_dev->regmap, DCU_HSYN_PARA,
100 DCU_HSYN_PARA_BP(hbp) |
101 DCU_HSYN_PARA_PW(hsw) |
102 DCU_HSYN_PARA_FP(hfp));
103 regmap_write(fsl_dev->regmap, DCU_VSYN_PARA,
104 DCU_VSYN_PARA_BP(vbp) |
105 DCU_VSYN_PARA_PW(vsw) |
106 DCU_VSYN_PARA_FP(vfp));
107 regmap_write(fsl_dev->regmap, DCU_DISP_SIZE,
108 DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) |
109 DCU_DISP_SIZE_DELTA_X(mode->hdisplay));
110 regmap_write(fsl_dev->regmap, DCU_SYN_POL, pol);
111 regmap_write(fsl_dev->regmap, DCU_BGND, DCU_BGND_R(0) |
112 DCU_BGND_G(0) | DCU_BGND_B(0));
113 regmap_write(fsl_dev->regmap, DCU_DCU_MODE,
114 DCU_MODE_BLEND_ITER(1) | DCU_MODE_RASTER_EN);
115 regmap_write(fsl_dev->regmap, DCU_THRESHOLD,
116 DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) |
117 DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) |
118 DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL));
119 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
120 DCU_UPDATE_MODE_READREG);
124 static const struct drm_crtc_helper_funcs fsl_dcu_drm_crtc_helper_funcs = {
125 .atomic_flush = fsl_dcu_drm_crtc_atomic_flush,
126 .disable = fsl_dcu_drm_disable_crtc,
127 .enable = fsl_dcu_drm_crtc_enable,
128 .mode_set_nofb = fsl_dcu_drm_crtc_mode_set_nofb,
131 static const struct drm_crtc_funcs fsl_dcu_drm_crtc_funcs = {
132 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
133 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
134 .destroy = drm_crtc_cleanup,
135 .page_flip = drm_atomic_helper_page_flip,
136 .reset = drm_atomic_helper_crtc_reset,
137 .set_config = drm_atomic_helper_set_config,
140 int fsl_dcu_drm_crtc_create(struct fsl_dcu_drm_device *fsl_dev)
142 struct drm_plane *primary;
143 struct drm_crtc *crtc = &fsl_dev->crtc;
146 fsl_dcu_drm_init_planes(fsl_dev->drm);
148 primary = fsl_dcu_drm_primary_create_plane(fsl_dev->drm);
152 ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL,
153 &fsl_dcu_drm_crtc_funcs, NULL);
155 primary->funcs->destroy(primary);
159 drm_crtc_helper_add(crtc, &fsl_dcu_drm_crtc_helper_funcs);